POWER ENGINEERING AND ELECTRICAL ENGINEERING VOLUME: 20 |NUMBER: 4 |2022 |DECEMBER
WAMS-based Hie a chical Ac i e Powe
Di e en ial Signal Algo i hm o Backup
P o ec ion o a FACTS Compensa ed T ansmission
Ne wo k
S eelekha VENUGOPAL1, P ince ASOK 1, Sabha Raj ARYA2
1Depa men o Elec ical Enginee ing, Raji Gandhi Ins i u e o Technology,
APJ Abdul Kalam Technological Uni e si y, Ala ha a Rd, 695016 Ke ala, India
2Depa men o Elec ical Enginee ing, Sa da Vallabhbhai Na ional Ins i u e o Technology,
Ichchhana h, Su a , 395007 Guj a , India
[email p o ec ed], [email p o ec ed], sabha a[email p o ec ed]
DOI: 10.15598/aeee. 20i4.4512
A icle his o y: Recei ed Ma 22, 2022; Re ised Jul 20, 2022; Accep ed Jul 27, 2022; Published Dec 31, 2022.
This is an open access a icle unde he BY-CC license.
Abs ac . This pape p oposes a hie a chical
ac i e powe di e en ial signal-based gene alized
backup p o ec ion algo i hm using Wide A ea Mea-
su emen Sys em (WAMS) da a o Flexible AC
T ansmission Sys em (FACTS)-compensa ed ans-
mission ne wo ks. The p oposed algo i hm can be
used o backup p o ec ion o ansmission sys ems
wi h any shun and se ies- ype FACTS de ices.
The inc eased numbe o FACT compensa o s a ec s
he eliable ope a ion o p ima y and backup p o ec ion
o he ansmission lines. Bo h shun and se ies com-
pensa ed lines cause mal unc ioning o exis ing backup
p o ec ion schemes. The p oposed algo i hm u ilizes
he sequence componen s o bus ol ages and ac i e
powe di e en ial signals o lines o iden i y he aul y
line. The algo i hm is alida ed on a modi ied 9-bus
sys em unde MATLAB/SIMULINK pla o m. I is
obse ed ha he algo i hm is sui able o iden i ying
a aul y line in ansmission sys ems con aining bo h
uncompensa ed and compensa ed lines wi h se ies
o shun - ype FACTS con olle s. This algo i hm
has he ad an age ha i uses a gene alized backup
p o ec ion logic and can be used o he accu a e
iden i ica ion o a aul y line i espec i e o he ype
o compensa ion de ices.
Keywo ds
Backup p o ec ion, FACTS de ices, aul y line
iden i ica ion, PMU, Powe di e en ial p o ec-
ion, Supe imposed powe componen , WAMS.
1. In oduc ion
As he powe demand goes on inc easing wi h in-
dus ial de elopmen s and comme cial ac i i ies,
he powe ansmission sys em is being modi ied. Due
o en i onmen al easons and igh -o -way es ic-
ions, cons uc ion and he addi ion o a comple ely
new ansmission pa h may be di icul and im-
possible. The e icien u iliza ion o he exis ing
powe ansmission sys em by including Flexible AC
T ansmission Sys em (FACTS) de ices is a p e e ed
al e na i e o he p oblem, which inc eases he powe
ansmission capabili y o lines wi h imp o ed s a-
bili y ma gins and con ol o powe [1]. FACTS
compensa o s al e he magni ude and phase angle
o he appa en line impedance and line cu en ,
as seen by he p o ec ion de ices. The exis ing
elays a e designed o uncompensa ed lines and hei
se ings do no conside he p esence o compensa ing
de ices and he a ia ion o line impedance o cu en
alues due o hei compensa ing ac ions. Hence
he inco po a ion o FACTS de ices in ansmission
sys ems causes he mal unc ioning o dis ance elays,
©2022 ADVANCES IN ELECTRICAL AND ELECTRONIC ENGINEERING 390
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in oduces p oblems in he ope a ion o he
exis ing p o ec ion sys em, and a ec s he eli-
able ope a ion o p ima y and backup p o ec ion [2]
and [3]. Bo h shun and se ies compensa ed lines
cause p oblems in exis ing p o ec ion schemes.
In he p esen scena io, i is necessa y o de elop
a gene alized p o ec ion scheme ha can ake ca e
o he p o ec ion issues caused by he compensa ed
lines also.
The de elopmen o a secu ed emo e backup p o-
ec ion scheme using wide-a ea measu emen sys em-
based da a o he p esen -day ansmission sys em is
e y essen ial o secu e ope a ion [4]. Se e al ans-
mission line p o ec ion algo i hms ha e been de el-
oped using di e en echniques o elaying applica-
ions. T a eling wa e-based and ansien componen -
based aul de ec ion schemes need highe sampling
a es o he cap u e o de ails in he signals [6], [7],
[8] and [9]. Di e en ial cu en -based echniques [10],
[11], [12], [13] and [14] and impedance-based es ima ion
echniques [15], [16] and [17] a e also well desc ibed
in he li e a u e. Bu hese echniques canno be used
as gene alized algo i hms in he p esence o compen-
sa ing de ices.
Va ious echniques a e p oposed by he esea che s
o he backup p o ec ion o uncompensa ed lines
using Wide A ea Measu emen Sys em (WAMS)-based
da a. By es ima ing and analyzing he dis ibu ion
o sequence componen s o aul ol age he aul y bus
can be iden i ied [17]. Posi i e sequence ol age magni-
ude and absolu e angle di e ence o posi i e sequence
cu en angle a e e ec i e in iden i ying he aul y bus
and he aul y line in a sys em wi h uncompensa ed
lines [18]. In [19], he aul y egion is iden i ied us-
ing di e en ial cu en s, and he aul y line is de e -
mined by a aul co ela ion ac o calcula ed using
he s eady-s a e componen s o ol age and cu en .
An ac i e powe di e en ial-based logic is e ec i e o
he p ima y and backup p o ec ion schemes o un-
compensa ed lines u ilizing Phaso Measu emen Uni
(PMU) da a [20]. A synch ophaso -based s a e es ima-
o can be used o he backup p o ec ion o ansmis-
sion lines [21]. Bu hese algo i hms do no conside
he e ec s o compensa ing de ices.
FACTS de ices help o imp o e he s eady-s a e
and ansien pe o mance o he sys em. Bu
he p esence o hese con olle s poses many p oblems
in he ope a ion o he p o ec i e elays due o he as
con ol ac ions, impedance changes o he line, ol -
age and cu en injec ed om he con ol de ices,
and he ansien s p oduced by he con ol ac ions.
When he de ice is included in he aul loop, i
a ec s he appa en impedance seen by he dis ance
elay causing i s malope a ion. The ype o FACTS
de ice has also i s e ec on he appa en impedance
seen by he elay and ip bounda y. A backup
p o ec ion scheme o se ies compensa ed lines based
on he magni udes and angles o posi i e and nega i e
sequence ol ages and cu en s is ound mo e e ec i e
o a oid he mal unc ioning o he elay in he p esence
o se ies compensa ion [22]. The modi ied impedance
me hod o se ies compensa ed lines equi es he mea-
su emen o es ima ion o ol age ac oss he com-
pensa ing de ice [23]. Spec al ene gy calcula ions
based di e en ial p o ec ion scheme using he Dis-
c e e Wa ele T ans o m (DWT) echnique a e p o-
posed in [24] o SVC compensa ed lines. Faul de-
ec ion in Fixed Se ies Capaci o (FSC) compensa ed
lines can be achie ed using di e en ial admi ance [25].
Sequence and supe imposed componen s-based logic
can be used o aul de ec ion in he p esence
o Uni ied Powe Flow Con olle (UPFC) compen-
sa ed lines [26] and [27]. Impedance-based ech-
niques and di e en ial appa en powe -based ech-
niques a e also de eloped o a oid he mal unc ion-
ing o elays in he p esence o UPFC [28], [29]
and [30]. Bu hese algo i hms de eloped o compen-
sa ed sys ems ha e conside ed only one ype o de ice
and i s e ec s a a ime and canno be gene alized.
This wo k a emp s o de elop a gene alized backup
p o ec ion scheme based on WAMS-based da a which
u ilizes he powe di e en ial alue o iden i y
he aul y line. I u ilizes sequence componen s o bus
ol ages o iden i y he buses nea a aul and he hi-
e a chical magni udes o di e en ial ac i e powe sig-
nals o iden i y he aul y line. The p oposed algo-
i hm success ully de ec s he symme ical and un-
symme ical aul condi ions in a ansmission sys em
and he aul y line as well. The algo i hm is ali-
da ed in a modi ied WSCC 9 bus sys em inco po a ing
FACTS de ices and gi es a eliable pe o mance du -
ing di e en aul condi ions and di e en line load-
ing condi ions. This pape is o ganized as ollows.
In Sec. 2. desc ip ion o he powe di e en ial
concep is gi en. The p oposed algo i hm is explained
in de ail in Sec. 3. Simula ion esul s a e discussed in
Sec. 4. The conclusion is p esen ed in Sec. 5.
2. Ac i e Powe Di e en ial
o a T ansmission Line
A powe di e ence exis s be ween he wo e minals
o a ansmission line, due o he losses in he ansmis-
sion line, which inc ease wi h he load. Figu e 1 shows
πmodel o a ansmission line. Vx,Vya e he ol ages
Ix,Iya e he line cu en s a bus Xand bus Y.ZL,
Zxg and Zyg a e he pa ame e s o he πequi alen
model o he line. The sou ces Esand E wi h sou ce
impedances Zsand Z a e connec ed o he ansmis-
sion line a Xand Y. The appa en powe a e minal
Xand Ybe Sxand Sy espec i ely. The di e en ial
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ac i e powe P dxy is he eal pa o he di e en ial
appa en powe (Sx−Sy).
P dxy =R(Sx−Sy,(1)
Sx=Vx×Ix,(2)
Sy=Vy×Iy.(3)
VxVy
V
IsIx
Ixg Iyg
IyF I
I
Zs
Zxg Zyg Z
X L Y
EsE
Z
(a) Du ing ex e nal aul .
V
mZL (1-m)ZL
I
F
E
Z
Zyg
Z
Zs
Zxg
Es
Vy
IyI
Y
Ixg Iyg
Vx
IsIx
X
(b) Du ing in e nal aul .
Fig. 1: Equi alen ci cui o line.
The exp ession o his di e en ial powe is di e en
when he e is a aul wi hin he line and when he e is
a aul ou side.
Case 1. Di e en ial powe o an ex e nal aul .
In Fig. 1(a) an ex e nal aul occu s a poin
Fou side he line.
The di e en ial appa en powe :
S1−S2= Vx
2−Vy
2
zg!+ Vx
2−Vy
2
zL!.(4)
Case 2. Di e en ial powe o in e nal aul s.
Fo an in e nal aul a Fas shown in Fig. 1(b),
he exp ession o line e minal cu en s can be w i en
as ollows. mis he dis ance o aul poin om bus X
exp essed as a ac ion o he dis ance be ween bus X
and Y.
The di e en ial appa en powe :
Sx−Sy=Vx
2−Vy
2
zg
+Vx
2
mzLz
−Vy
2
(1 −m)zLz
.(5)
Compa ing Eq. (4) and Eq. (5), i can be obse ed
ha he di e en ial appa en powe alue is conside -
ably la ge in he case o in e nal aul s. Du ing aul s,
he eal pa o he di e en ial powe is la ge because
o he high alue o aul cu en s. Hence i can be
used o iden i y a aul in a line. In he case o FACTS
compensa ed lines, his di e en ial ac i e powe du ing
no mal ope a ion o he line includes he no mal losses
o he de ice in i s ope a ing ange. FACTS de ices
can injec o abso b eac i e powe in o he sys em,
bu canno p oduce ac i e powe on hei own unless
hey a e connec ed o a sou ce ha can supply ac i e
powe . Du ing abno mal condi ions, hese de ices ge
bypassed by hei p o ec ion ci cui s. So, he ac i e
powe di e en ial can be e ec i ely used o he de ec-
ion o a aul in he compensa ed lines also.
3. Hie a chial Ac i e Powe
Di e en ial Relaying Signal
Based Backup P o ec ion
Algo i hm
A WAMS-based di e en ial powe p o ec ion scheme
o ansmission sys ems con aining a FACTS com-
pensa ed line is p oposed in his sec ion. As shown
in Fig. 2, he in o ma ion om di e en subs a ions
o he p o ec ed a ea is collec ed a he PDC. The p o-
posed algo i hm u ilizes he sequence componen s
de i ed om bus ol ages, aking ad an age o he ac
ha he ol age o he bus nea he aul loca ion de i-
a es he mos , o iden i y he aul y bus. The aul y line
is iden i ied using a powe di e en ial c i e ion based
on he h ee-phase di e en ial powe .
3.1. Faul De ec ion and Faul A ea
Iden i ica ion
Unbalanced aul s occu ing in a sys em can be
de ec ed using he nega i e o ze o sequence ol age
componen s o bus ol ages [22]. The aul y si ua ion
can be iden i ied using he ollowing c i e ia.
Vb2≥K2VNo Vb0≥K0VN,(6)
whe e Vb2and Vb0a e he nega i e and ze o sequence
componen s o b h bus espec i ely in a B-bus sys-
em and is he a ed ol age magni ude o he bus
K2and K0a e he h esholds whose alues a e se-
lec ed such ha all unbalanced aul s in he sys em
can be de ec ed eliably. The occu ence o balanced
aul s can be iden i ied by posi i e sequence compo-
nen s o he bus ol ages using he c i e ion gi en
below:
Vb1≤K1VN,(7)
whe e Vb1is he posi i e sequence componen o b h
bus and K1is he h eshold, whose alue is app o-
p ia ely se o iden i y balanced aul s in he sys em.
The alues o h esholds K1,K2and K0 ange be ween
0 and 1. Du ing aul condi ions and no mal swi ching
©2022 ADVANCES IN ELECTRICAL AND ELECTRONIC ENGINEERING 392
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Bus ol age
magni udes
Bus Vol age
and
Line cu en
magni udes
Faul de ec ion and aul y bus iden i ica ion logic
Faul y bus
Faul y bus
and line
Faul y line iden i ica ion logic
Sequence
ol ages
and cu en s
om he
p o ec ed
a ea
Check whe he any o he
nega i e sequence and ze o
sequence bus ol age
magni udes indica e
unsymme ic aul
Check whe he any o he
posi i e sequence bus ol age
magni udes indica e
unsymme ic aul
Faul y bus iden i ica ion by so ing bus ol age magni udes
Yes Yes
No
Calcula e powe a
he line ends
Calcula e he powe
di e en ial elay signal
Faul y line
iden i ica ion
T ip Signal
P o ec ed a ea
PMU1PMU2
PMU4
PMU5
PMU6
L2
L3
L4
L5
L6
SS2
SS1
SS6
SS5
SS4
SS3
L1
Fig. 2: Schema ic diag am o p oposed WAMS-based p o ec ion scheme.
in o loads Vb1 educes o lowe alues om a ed alue.
The educ ion is highe du ing aul s. The h eshold
alue K1is selec ed such as o a oid equen pickup
du ing no mal swi ching o he sys em. Du ing un-
symme ical aul condi ions Vb2and Vb0inc eases,
which a e o he wise negligible. Low h eshold alues
o K2and K0a e selec ed such as o imp o e high
impedance aul sensi i i y. The aul y a ea is iden i-
ied by so ing he buses in he o de o sequence com-
ponen magni udes. In he case o an unbalanced aul ,
he buses a e so ed in he descending o de o nega i e
sequence bus ol age magni udes. In he case o bal-
anced aul , he buses a e so ed in he ascending o de
o posi i e sequence bus ol age magni udes. The bus
a he op o he so ed lis is iden i ied as a aul y bus.
3.2. Faul y Line Iden i ica ion
Fo aul y line iden i ica ion, a new c i e ion based
on he h ee-phase ac i e powe di e en ial alue is
p oposed in his sec ion. The schema ic o he ac i e
powe di e en ial elay is shown in Fig. 3. The h ee-
phase di e en ial powe o a line connec ed be ween
buses Xand Yis calcula ed as:
P dxy =|Pxy −Pyx|,(8)
whe e Pxy he h ee-phase powe measu ed a he line
e minal nea bus Xand Pyx is he h ee-phase powe
measu ed a he line e minal nea bus Y.
Bus XBus Y
Ac i e Powe
Di e en ial Relay
Fig. 3: Ac i e powe di e en ial elay schema ic.
A high alue o di e en ial powe P dxy abo e
he no mal line losses in a ansmission line is an in-
dica ion o abno mal cu en low in he line. I may
be due o an o e loaded condi ion o due o he occu -
ence o a aul . A h eshold alue P dxyT can be se
o de ec abno mal condi ions.
A elaying signal Rxy is ob ained using he ac i e
powe di e en ial alue as ollows:
Rxy =P dxy
P xy
,(9)
whe e
P xy =(|Pxy|+|Pxy|)
2.(10)
Fo he no mal ope a ing egion conside ing he line
loading and load powe ac o , he alue o elaying
signal Rxy is low o all he lines. When a aul occu s
in he sys em, Rxy shoo s up o highe alues.
As he magni ude Rxy depends on he leng h
and line pa ame e s, he no malized alue o Rxy each
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line is used o iden i y he aul y line. The no malized
alue is de ined as:
Rxy =Rxy
RxyT
.(11)
whe e RxyT is he h eshold alue se o he line
and i s alue is aken as he maximum alue o Rxy
a a ed line loading condi ion conside ing he no mal
ange o load powe ac o .
The line wi h he highes Rxy ha is connec ed
o he aul y bus is iden i ied as he aul y line. Equa-
ion (12) and Eq. (13) a e used o compu e supe im-
posed componen s Pxys and Pyxs o he eal powe
low a e minals Xand Y. I is he di e ence powe
be ween he n h and (n−1) h cycle:
Pxys =Pxy[n hcycle]−Pxy[(n−1) h cycle ,(12)
Pyxs =Pyx[n hcycle]−Pyx[(n−1) h cycle].(13)
A sudden change in he alue o Pxys o Pyxs abo e
a h eshold PxysT is an indica o o a sudden change
in he ansmission sys em and can be used o con i m
he occu ence o he aul and o a oid unnecessa y
pickup a powe oscilla ions.
3.3. Summa y o he P oposed
WAMS-based Hie a chial Powe
Di e en ial Algo i hm
In he p oposed algo i hm, he changes in he bus se-
quence magni udes, he h ee-phase di e en ial eal
powe o he ansmission lines, and supe imposed
h ee-phase eal powe componen s a he line ends
in each cycle a e moni o ed. The changes in eal
powe low due o he changes in load demand o
due o he change in ope a ing modes o he con ol
de ices a e slowe compa ed o ha due o a sud-
den aul in he sys em. The de ice losses can be
included in he ansmission line losses while calcu-
la ing he di e en ial powe . The alue o supe im-
posed componen s o eal powe is an indica o o sud-
den dis u bance in he sys em. The di e en ial eal
powe in a line and supe imposed eal powe compo-
nen s o he line ends a e used o con i m he aul y
s a e o he line. The s eps o be ollowed o iden i y
he aul y line (de ailed in Sec. 3.1. and Sec. 3.2. )
is summa ized below.
S ep 1: Collec all he ime-synch onized bus
ol ages and line cu en s h ough WAMS.
S ep 2: Calcula e he sequence componen s o all bus
ol ages.
S ep 3: Check whe he he condi ion Vb2≥K2VN
o Vb0≥K0VNis ue. I he condi ion is sa is ied,
an unsymme ical aul is suspec ed o ha e occu ed
in he sys em and go o s ep 5 else go o s ep 4.
S ep 4: Check whe he he condi ion Vb1≥K1VN
is ue. I he condi ion is sa is ied, a symme ical aul
is suspec ed o ha e occu ed in he sys em. Go o s ep
6 else go o s ep 1.
S ep 5: So he nega i e sequence bus ol ages
in descending o de and ind he buses wi h he high-
es alue o nega i e sequence ol age magni ude
and ag hem as he "Faul y/suspicious" buses and go
o s ep 7.
S ep 6: So he posi i e sequence bus ol ages
in ascending o de and display, ind he buses wi h
he lowes alue o posi i e sequence ol age magni-
ude and ag hem as he "Faul y/suspicious" buses.
Go o s ep 7
S ep 7: Calcula e he di e en ial powe P dxy
(Eq. (8)), elaying signal, Rxy (Eq. (11)), and he su-
pe imposed powe componen Pxys (Eq. (12)) o all
lines connec ed o he suspicious bus.
S ep 8: Iden i y he aul y line using he hie a chical
o de o he no malized magni udes o he signal Rxy
o he lines in he aul y a ea.
S ep 9: Check whe he :
1. The magni ude o di e en ial powe is g ea e
han he h eshold alue P dxyT .
2. The magni ude o supe imposed powe compo-
nen s in he line is g ea e han he h eshold alue
PsT .
3. The alue o alls in he aul y egion o he line
cha ac e is ics (ie Rxy is g ea e han RxyT ).
I all he abo e condi ions a e sa is ied o any
o he lines connec ed o he "Faul y/suspicious
bus" go o s ep 10, else go o s ep 1.
S ep 10: The aul is con i med, he aul y line num-
be is displayed and app op ia e p o ec i e ac ions a e
ini ia ed. Go o s ep1.
The algo i hm is depic ed in he low cha in Fig. 4.
4. Valida ion o he P oposed
Algo i hm
The p oposed WAMS-based algo i hm is alida ed
h ough simula ion unde MATLAB/SIMULINK en i-
onmen . Simula ion s udies a e ca ied ou on a modi-
ied WSCC 9 bus sys em inco po a ing a FACTS de ice
a he midpoin o he line connec ing buses 7 and 8 as
shown in Fig. 5.
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So he buses in he
ascending o de o
posi i e sequence bus
ol age magni ude
S a
Read all bus ol ages,
line cu en s and
b eake s a us o
all subs a ions
Se bus coun , b=0
Calcula e he posi i e sequence
componen Vb1, nega i e sequence
componen Vb2 and ze o sequence
componen Vb0 o he bus ol ages
b=b+1
is
b<B
is
eq(2) ue
o any o he
buses
is
eq(1) ue
o any o he
buses
So he buses in he
descending o de o
nega i e sequence bus
ol age magni ude
No
Yes
No
No
Yes Yes
Se buses a he op o he so ed
lis as he suspecious buses
Calcula e he di e en ial
powe Pdxy and elaying
signal Rxy and supe imposed
componen Pxys o all he lines
Selec he line wi h
maximum alue o Rxy
is
Pdxy>PdxyT,
Pxys>PxysT and
Rxy lies in he aul y
egion o di e en ial powe
cha ac e is ics
o he line
Issue signals o ini ia e app op ia e
p o ec i e ac ions
Selec he lines connec ed o he
suspicious buses
No
Yes
B
A
A
B
ha e
all lines
checked
Selec he nex line wi h
maximum alue o Rxy
No
Yes
Fig. 4: Flow cha o he p oposed WAMS-based hie a chical ac i e powe di e en ial elaying signal-based algo i hm.
PMU-B7
FACTS
DEVICE
PMU-B8 PMU-B9
27893
PMU-B5 PMU-B6
1
4
GEN_2 GEN_3
GEN_1
PMU-B4
5 6
LOAD A
LOAD B LOAD C
Fig. 5: Modi ied WSCC 9 bus sys em - single line diag am in-
cluding FACTS de ice a he midpoin o line connec ed
be ween bus 7 and bus 8.
The alues o h esholds a e se as ollows K1= 0.6,
K2=K0= 0.1. The alues o P dxyT and RxyT
a e se acco ding o he no mal alue o line losses
and powe di e en ial cha ac e is ics o each line.
The sys em is ope a ed a no mal ope a ing condi ions
and he h eshold alues P dxyT and RxyT o di e en
lines a e iden i ied and shown in Tab. 1.
Va ia ion o supe imposed componen s o ac i e
powe Pxys du ing he aul is used o con i m a sud-
den change in he powe low h ough he line.
PsT = 0.05 pu selec ed as a common h eshold o all
lines o con i m he occu ence o a aul . The alue
Tab. 1: Th eshold alues selec ed o di e en lines.
Line P dxyT (pu alue on RxyT
a common base o 400 MVA)
Line 7–8 0.03 0.015
Line 8–9 0.025 0.02
Line 9–6 0.022 0.022
Line 6–4 0.026 0.014
Line 4–5 0.026 0.014
Line 5–7 0.022 0.022
depends on he possible change o powe in one cycle
du ing he no mal ope a ion o he sys em.
Typical ypes o aul s a e simula ed a a ious dis-
ances wi h di e en aul esis ances a ying om 1
o 500 Ω. The algo i hm is alida ed by placing SVC,
TCSC, SSSC, and STATCOM a he midpoin o line
7–8. Va ia ions o Pxy, and Pxys a e shown in Fig. 6.
4.1. Simula ion Resul s o a Faul
on Line 7–8 wi h Di e en
FACTS De ices on Line 7–8
Faul s a e c ea ed a = 2 s on line 7–8 placing
di e en FACTS de ices on he same line. Possible
combina ions o a ious FACTS de ices wi h a ying
aul ypes, aul dis ance, and aul esis ance a e
simula ed o alida e he pe o mance o he p oposed
©2022 ADVANCES IN ELECTRICAL AND ELECTRONIC ENGINEERING 395
POWER ENGINEERING AND ELECTRICAL ENGINEERING VOLUME: 20 |NUMBER: 4 |2022 |DECEMBER
0 1 2 3
Time (s)
0.4
0.5
0.6
0.7
0.8
0.9
1
Pxy (pu)
P78
P87
(a)
0 1 2 3
Time (s)
-0.6
-0.5
-0.4
-0.3
-0.2
-0.1
0
Pxys (pu)
P78s
P87s
(b)
1 2 3
Time (s)
-1.5
-1
-0.5
0
0.5
1
1.5
Pxy (pu)
P78
P87
(c)
1 2 3
Time (s)
-1
0
1
Pxys (pu)
P78s
P87s
(d)
Fig. 6: Va ia ion o Pxy, and Pxys signal o a aul in Line 7–8. (a) and (b) LG aul nea bus 8 when he line is hea ily loaded
in he p esence o STATCOM. (c) and (d) LLLG aul nea bus 8 when he line is ligh ly loaded in he p esence o SSSC.
0 1 2 3
Time (s)
0
0.2
0.4
0.6
0.8
1
Vol age (pu)
Vpm5
Vpm6
Vpm7
Vpm8
Vpm9
(a)
0 1 2 3
Time (s)
0
0.2
0.4
0.6
0.8
1
Vol age (pu)
Vnm5
Vnm6
Vnm7
Vnm8
Vnm9
(b)
0 1 2 3
Time (s)
0
0.2
0.4
0.6
0.8
1
Vol age (pu)
Vzm5
Vzm6
Vzm7
Vzm8
Vzm9
(c)
Fig. 7: Case A1: Va ia ion o magni udes o (a) posi i e sequence, (b) nega i e sequence and (c) ze o-sequence bus ol ages o
an LG aul a = 2 s nea bus 8 in line 7–8 con aining STATCOM.
0
0.5
1
Powe (pu)
P78
P87
0 0.5 1 1.5 2 2.5 3
Time (s)
(a)
-1
-0.5
0
Powe (pu)
P46
P64
0 0.5 1 1.5 2 2.5 3
Time (s)
(b)
-1
-0.5
0
Powe (pu)
P89
P98
0 0.5 1 1.5 2 2.5 3
Time (s)
(c)
-1
-0.5
0
Powe (pu)
P45
P54
0 0.5 1 1.5 2 2.5 3
Time (s)
(d)
0 0.5 1 1.5 2 2.5 3
Time (s)
0
0.5
1
Powe (pu)
P96
P69
(e)
0 0.5 1 1.5 2 2.5 3
Time (s)
0
0.5
1
Powe (pu)
P75
P57
( )
Fig. 8: Case A1: Va ia ion o Pxy in di e en lines o an LG aul nea bus 8 in line 7–8 con aining STATCOM.
©2022 ADVANCES IN ELECTRICAL AND ELECTRONIC ENGINEERING 396
POWER ENGINEERING AND ELECTRICAL ENGINEERING VOLUME: 20 |NUMBER: 4 |2022 |DECEMBER
algo i hm. Fou ypical cases a e demons a ed he e,
namely:
•Case A1: Faul Type: LG, FACTS de ice: STAT-
COM.
•Case A2: Faul Type: LL, FACTS de ice: TCSC.
•Case A3: Faul Type: LLLG, FACTS de ice:
SSSC.
•Case A4: Faul Type: LLG, FACTS de ice: SVC.
When he occu ence o a aul is de ec ed in he sys-
em, he suspicious bus is selec ed based on he magni-
udes o bus ol age sequence componen s. The alues
o P dxy and Rxy a e calcula ed o all he lines con-
nec ed o he suspicious bus. The line wi h maximum
˜
Rxy sa is ying he h eshold condi ions is iden i ied as
he aul y line.
Case A1: Faul Type: LG, FACTS de ice: STAT-
COM.
An LG aul wi h g ound esis ance 10 Ωis simu-
la ed a line 7–8 nea bus 8. Va ia ion o bus ol -
age sequence componen s and line end powe s du ing
he simula ion pe iods a e shown in Fig. 7 and Fig. 8
espec i ely. The magni ude o nega i e sequence bus
ol age has he highes alue o bus 8, and i s alue is
abo e he h eshold se . This con i ms he occu ence
o an asymme ical aul in a line connec ed o bus 8.
The algo i hm compa es he alues o ˜
Rxy o he lines
connec ed o bus 8. The magni ude o ˜
R78 is he high-
es a e he aul as shown in Fig. 9 and line 7–8 is
iden i ied as he aul y line. The occu ence o he aul
on line 7–8 is con i med by he change in supe imposed
componen s.
0123
Time (s)
0
0.5
1
1.5
2
Rxy
R78
R89
R96
R64
R45
R57
Fig. 9: Case A1: Va ia ion o Rxy o a ious lines (R78,R89,
R96,R64,R45,R57 ) o an LG aul (R = 10 Ω) a =
2s nea bus 7 on line 7–8 wi h STATCOM in line 7–8.
Case A2: Faul Type: LL, FACTS de ice: TCSC.
A line- o-line aul wi h 0.1 Ωis c ea ed a line
7–8 nea bus 7 a = 2 s. Line 7–8 con ains TCSC.
Bus 7 is iden i ied as he aul y bus as he nega i e
sequence bus ol age o bus 7 sa is ies he c i e ion.
The magni ude o ˜
R78 is he highes as in Fig. 10.
So, line 7–8 is iden i ied as he aul y line.
Case A3: Faul Type: LLLG, FACTS de ice:
SSSC.
An LLLG aul wi h g ound esis ance o 10 Ωis
simula ed nea bus 8. The occu ence o a symme ical
aul on a line connec ed o bus 8 is con i med acco d-
ing o he aul y bus iden i ica ion s eps. The mag-
ni ude ˜
R78 is he highes a e he aul (Fig. 11)
and indica es a aul in line 7–8.
Case A4: Faul Type: LLG, FACTS de ice: SVC.
An LLG aul wi h g ound esis ance 100 Ωis sim-
ula ed nea bus 7. An asymme ical aul on a line
connec ed o bus 7 is iden i ied. The magni ude ˜
R78
is he highes a e he aul (Fig. 12) and line 7–8 is
iden i ied as he aul y one. The esul s o di e en
cases simula ed a e summa ized in Tab. 2.
0123
Time (s)
0
0.2
0.4
0.6
0.8
1
Rxy
R78
R89
R96
R64
R45
R57
Fig. 10: Case A2: Va ia ion o Rxy o a ious lines (R78,R89 ,
R96,R64,R45,R57 ) o an LL aul (R = 0.1 Ω)
a = 2 s on line 7–8 nea bus 8 wi h TCSC on line
7–8.
0123
Time (s)
0
0.5
1
1.5
2
Rxy
R78
R89
R96
R64
R45
R57
Fig. 11: Case A3: Va ia ion o Rxy o a ious lines (R78,R89 ,
R96,R64,R45,R57 ) o an LLLG aul (R = 10 Ω)
a = 2 s nea bus 8 on line 7–8 wi h SSSC in line 7–8.
4.2. Simula ion Resul s o a Faul
on Line O he han Line 7–8
wi h Di e en FACTS De ices
in Line 7–8
In his case, di e en FACTS de ices a e placed on line
7–8. Faul s a e c ea ed on o he lines in he sys em.
I is obse ed ha he algo i hm iden i ies he aul y
line eliably in hese cases also. Fou ypical cases a e
demons a ed he e, namely:
©2022 ADVANCES IN ELECTRICAL AND ELECTRONIC ENGINEERING 397
POWER ENGINEERING AND ELECTRICAL ENGINEERING VOLUME: 20 |NUMBER: 4 |2022 |DECEMBER
Tab. 2: Pe o mance o he algo i hm o a aul on line 7–8.
FACTS de ice in line 7–8 Faul y bus and line Faul ype Faul esis ance Line and bus iden i ied
STATCOM
Bus 7 Line 7–8 LG 1, 10, 100, 500 Bus 7, Line 7–8
Bus 8, Line 7–8 LG 1, 10, 100, 500 Bus 8, Line 7–8
Bus 7, Line 7–8 LLG 1, 10, 100, 500 Bus 7, Line 7–8
Bus 8, Line 7–8 LLG 1, 10, 100, 500 Bus 8, Line 7–8
Bus 7, Line 7–8 LLLG 1, 10, 100, 500 Bus 7, Line 7–8
Bus 8, Line 7–8 LLLG 1, 10, 100, 500 Bus 8, Line 7–8
Bus 7, Line 7–8 LL 0.1, 1, 10 Bus 7, Line 7–8
Bus 8, Line 7–8 LL 0.1, 1, 10 Bus 8, Line 7–8
Bus 7, Line 7–8 LLL 0.1, 1, 10 Bus 7, Line 7–8
Bus 8, Line 7–8 LLL 0.1, 1, 10 Bus 8, Line 7–8
SVC
Bus 7, Line 7–8 LG 1, 10, 100, 500 Bus 7, Line 7–8
Bus 8, Line 7–8 LG 1, 10, 100, 500 Bus 8, Line 7–8
Bus 7, Line 7–8 LLG 1, 10, 100, 500 Bus 7, Line 7–8
Bus 8, Line 7–8 LLG 1, 10, 100, 500 Bus 8, Line 7–8
Bus 7, Line 7–8 LLLG 1, 10, 100, 500 Bus 7, Line 7–8
Bus 8, Line 7–8 LLLG 1, 10, 100, 500 Bus 8, Line 7–8
Bus 7, Line 7–8 LL 0.1, 1, 10 Bus 7, Line 7–8
Bus 8, Line 7–8 LL 0.1, 1, 10 Bus 8, Line 7–8
Bus 7, Line 7–8 LLL 0.1, 1, 10 Bus 7, Line 7–8
Bus 8, Line 7–8 LLL 0.1, 1, 10 Bus 8, Line 7–8
SSSC
Bus 7, Line 7–8 LG 1, 10, 100, 500 Bus 7, Line 7–8
Bus 8, Line 7–8 LG 1, 10, 100, 500 Bus 8, Line 7–8
Bus 7, Line 7–8 LLG 1, 10, 100, 500 Bus 7, Line 7–8
Bus 8, Line 7–8 LLG 1, 10, 100, 500 Bus 8, Line 7–8
Bus 7, Line 7–8 LLLG 1, 10, 100, 500 Bus 7, Line 7–8
Bus 8, Line 7–8 LLLG 1, 10, 100, 500 Bus 8, Line 7–8
Bus 7, Line 7–8 LL 0.1, 1, 10 Bus 7, Line 7–8
Bus 8, Line 7–8 LL 0.1, 1, 10 Bus 8, Line 7–8
Bus 7, Line 7–8 LLL 0.1, 1, 10 Bus 7, Line 7–8
Bus 8, Line 7–8 LLL 0.1, 1, 10 Bus 8, Line 7–8
TCSC
Bus 7, Line 7–8 LG 1, 10, 100, 500 Bus 7, Line 7–8
Bus 8, Line 7–8 LG 1, 10, 100, 500 Bus 8, Line 7–8
Bus 7, Line 7–8 LLG 1, 10, 100, 500 Bus 7, Line 7–8
Bus 8, Line 7–8 LLG 1, 10, 100, 500 Bus 8, Line 7–8
Bus 7, Line 7–8 LLLG 1, 10, 100, 500 Bus 7, Line 7–8
Bus 8, Line 7–8 LLLG 1, 10, 100, 500 Bus 8, Line 7–8
Bus 7, Line 7–8 LL 0.1, 1, 10 Bus 7, Line 7–8
Bus 8, Line 7–8 LL 0.1, 1, 10 Bus 8, Line 7–8
Bus 7, Line 7–8 LLL 0.1, 1, 10 Bus 7, Line 7–8
Bus 8, Line 7–8 LLL 0.1, 1, 10 Bus 8, Line 7–8
0 1 2 3
Time (s)
0
0.5
1
1.5
2
Rxy
R78
R89
R96
R64
R45
R57
Fig. 12: Case A4: Va ia ion o Rxy o a ious lines (R78,R89 ,
R96,R64,R45,R57 ) o an LLG aul (R = 100 Ω)
a = 2 s nea bus 7 on line 7–8 wi h SVC in line 7–8.
•Case B1: Faul Type: LLL, Line: 8–9 FACTS
de ice: SSSC.
•Case B2: Faul Type: LL, Line:6–4 FACTS
de ice: STATCOM.
•Case B3: Faul Type: LG, Line: 5–7 FACTS
de ice: SVC.
•Case B4: Faul Type: LLG, Line: 9–6 FACTS
de ice: TCSC.
Case B1: Faul Type: LLL, Line:8–9 FACTS
de ice: SSSC.
Va ia ions o bus ol age sequence componen s
and line end powe s du ing he simula ion pe iods a e
shown in Fig. 13 and Fig. 14 espec i ely o an LLL
aul , wi h aul esis ance 1 Ω, nea bus 9 in Line
8–9. Magni udes o nega i e and ze o sequence com-
ponen s a e negligible o symme ic aul s. The mag-
ni ude o posi i e sequence bus ol age is he lowes
o bus 9 and is below he h eshold alue. This indi-
ca es he occu ence o a symme ical aul on a line
connec ed o bus 9. The magni ude o ˜
R89 is he high-
es a e he aul as shown in Fig. 15 and line 7–8 is
iden i ied as he aul y line.
Case B2: Faul Type and line: LL aul a line 6–4,
FACTS de ice: STATCOM.
©2022 ADVANCES IN ELECTRICAL AND ELECTRONIC ENGINEERING 398