Citations refer to the original publication, not to a Scieee localized version.
Núñez Martínez, J., & Avedillo de Juan, M. J. (2016). Comparative Analysis of Projected Tunnel and CMOS Transistors for Different Logic Application Areas. Institute of Electrical and Electronics Engineers. https://doi.org/10.1109/TED.2016.2616891
Núñez Martínez, Juan, and María José Avedillo de Juan. Comparative Analysis of Projected Tunnel and CMOS Transistors for Different Logic Application Areas. Institute of Electrical and Electronics Engineers, 2016. https://doi.org/10.1109/TED.2016.2616891.
Núñez Martínez, Juan, and María José Avedillo de Juan. Comparative Analysis of Projected Tunnel and CMOS Transistors for Different Logic Application Areas. Institute of Electrical and Electronics Engineers, 2016. https://doi.org/10.1109/TED.2016.2616891.
Núñez Martínez, J. and Avedillo de Juan, M. J. (2016) Comparative Analysis of Projected Tunnel and CMOS Transistors for Different Logic Application Areas. Institute of Electrical and Electronics Engineers. Available at: https://doi.org/10.1109/TED.2016.2616891.
J. Núñez Martínez and M. J. Avedillo de Juan, “Comparative Analysis of Projected Tunnel and CMOS Transistors for Different Logic Application Areas,” Institute of Electrical and Electronics Engineers, 2016, doi: 10.1109/TED.2016.2616891.
@misc{nunezmartinez2016comparative,
author = {Núñez Martínez, Juan and Avedillo de Juan, María José},
title = {Comparative Analysis of Projected Tunnel and CMOS Transistors for Different Logic Application Areas},
year = {2016},
publisher = {Institute of Electrical and Electronics Engineers},
doi = {10.1109/TED.2016.2616891},
url = {https://doi.org/10.1109/TED.2016.2616891}
}
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