Citations refer to the original publication, not to a Scieee localized version.
Földesy, P., Carmona Galán, R., Rekeczky, C., Zarandy, A., Rodríguez Vázquez, Á. B., & Roska, T. (2010). Digital processor array implementation aspects of a 3D multi-layer vision architecture. Institute of Electrical and Electronics Engineers. https://doi.org/10.1109/CNNA.2010.5430274
Földesy, Peter, et al. Digital processor array implementation aspects of a 3D multi-layer vision architecture. Institute of Electrical and Electronics Engineers, 2010. https://doi.org/10.1109/CNNA.2010.5430274.
Földesy, Peter, Ricardo Carmona Galán, Csaba Rekeczky, A. Zarandy, Ángel Benito Rodríguez Vázquez, and Tamás Roska. Digital processor array implementation aspects of a 3D multi-layer vision architecture. Institute of Electrical and Electronics Engineers, 2010. https://doi.org/10.1109/CNNA.2010.5430274.
Földesy, P. et al. (2010) Digital processor array implementation aspects of a 3D multi-layer vision architecture. Institute of Electrical and Electronics Engineers. Available at: https://doi.org/10.1109/CNNA.2010.5430274.
P. Földesy, R. Carmona Galán, C. Rekeczky, A. Zarandy, Á. B. Rodríguez Vázquez, and T. Roska, “Digital processor array implementation aspects of a 3D multi-layer vision architecture,” Institute of Electrical and Electronics Engineers, 2010, doi: 10.1109/CNNA.2010.5430274.
@misc{foldesy2010digital,
author = {Földesy, Peter and Carmona Galán, Ricardo and Rekeczky, Csaba and Zarandy, A. and Rodríguez Vázquez, Ángel Benito and Roska, Tamás},
title = {Digital processor array implementation aspects of a 3D multi-layer vision architecture},
year = {2010},
publisher = {Institute of Electrical and Electronics Engineers},
doi = {10.1109/CNNA.2010.5430274},
url = {https://doi.org/10.1109/CNNA.2010.5430274}
}
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