Citations refer to the original publication, not to a Scieee localized version.
Fiorelli, R., Peralías Macías, E., & Silveira Noguerol, F. (2011). LC-VCO design optimization methodology based on the gm/ID ratio for nanometer CMOS technologies. Institute of Electrical and Electronics Engineers. https://doi.org/10.1109/TMTT.2011.2132735
Fiorelli, Rafaella, et al. LC-VCO design optimization methodology based on the gm/ID ratio for nanometer CMOS technologies. Institute of Electrical and Electronics Engineers, 2011. https://doi.org/10.1109/TMTT.2011.2132735.
Fiorelli, Rafaella, Eduardo Peralías Macías, and Fernando Silveira Noguerol. LC-VCO design optimization methodology based on the gm/ID ratio for nanometer CMOS technologies. Institute of Electrical and Electronics Engineers, 2011. https://doi.org/10.1109/TMTT.2011.2132735.
Fiorelli, R., Peralías Macías, E. and Silveira Noguerol, F. (2011) LC-VCO design optimization methodology based on the gm/ID ratio for nanometer CMOS technologies. Institute of Electrical and Electronics Engineers. Available at: https://doi.org/10.1109/TMTT.2011.2132735.
R. Fiorelli, E. Peralías Macías, and F. Silveira Noguerol, “LC-VCO design optimization methodology based on the gm/ID ratio for nanometer CMOS technologies,” Institute of Electrical and Electronics Engineers, 2011, doi: 10.1109/TMTT.2011.2132735.
@misc{fiorelli2011lcvco,
author = {Fiorelli, Rafaella and Peralías Macías, Eduardo and Silveira Noguerol, Fernando},
title = {LC-VCO design optimization methodology based on the gm/ID ratio for nanometer CMOS technologies},
year = {2011},
publisher = {Institute of Electrical and Electronics Engineers},
doi = {10.1109/TMTT.2011.2132735},
url = {https://doi.org/10.1109/TMTT.2011.2132735}
}
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