Citations refer to the original publication, not to a Scieee localized version.
Viejo Cortés, J., Juan Chico, J., Bellido Díaz, M. J., Ruiz de Clavijo Vázquez, P., Guerrero Martos, D., Ostúa Arangüena, E., & Cano Quiveu, G. (2019). High-Performance Time Server Core for FPGA System-on-Chip. MDPI. https://doi.org/10.3390/electronics8050528
Viejo Cortés, Julián, et al. High-Performance Time Server Core for FPGA System-on-Chip. MDPI, 2019. https://doi.org/10.3390/electronics8050528.
Viejo Cortés, Julián, Jorge Juan Chico, Manuel Jesús Bellido Díaz, Paulino Ruiz de Clavijo Vázquez, David Guerrero Martos, Enrique Ostúa Arangüena, and Germán Cano Quiveu. High-Performance Time Server Core for FPGA System-on-Chip. MDPI, 2019. https://doi.org/10.3390/electronics8050528.
Viejo Cortés, J. et al. (2019) High-Performance Time Server Core for FPGA System-on-Chip. MDPI. Available at: https://doi.org/10.3390/electronics8050528.
J. Viejo Cortés et al., “High-Performance Time Server Core for FPGA System-on-Chip,” MDPI, 2019, doi: 10.3390/electronics8050528.
@misc{viejocortes2019highperformance,
author = {Viejo Cortés, Julián and Juan Chico, Jorge and Bellido Díaz, Manuel Jesús and Ruiz de Clavijo Vázquez, Paulino and Guerrero Martos, David and Ostúa Arangüena, Enrique and Cano Quiveu, Germán},
title = {High-Performance Time Server Core for FPGA System-on-Chip},
year = {2019},
publisher = {MDPI},
doi = {10.3390/electronics8050528},
url = {https://doi.org/10.3390/electronics8050528}
}
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