Welding data adquisition based on FPGA

Welding Data Adquisition based on FPGA R. Mill´ an, J. M. Quero and L. G. Franquelo Dpto. de Ingenier´ıaElectr´ onica EscuelaSuperior de Ingenieros, Avda. ReinaMercedes s/n, Sevilla–41012(SPAIN) Tel.: +34(9)5 45568 57 FAX: +34(9)5 45568 49 e–mail: [email protected] Conference Topic: IC’s for instrumentation and control Abstract— This paper presents the use of FPGA in data acquisition and digital preprocessing of the electric current signal of resistance welding stations. This work demonstrates that electric current has enoughinformationtoclassifythiskindof weldsinmassproduction industries. ParametersextractedwiththeFPGAexcitea classifierthat accepto rejecttheweldingjunction. This systemhas beendeveloped using aneuralclassifierandinstalledin a weldingstationof General Motors in C´adiz (Spain). Results confirm the validity of this novel approach. I. INTRODUCTION Resistiveweldinghasbeenconsidered asaninherently safe and reliable method for joining metals since its invention. Resistive welding techniques have reached a high degree of fiability and are widelyemployedasamanufacturingprocess. The destructive test have played a critically important role in quality control of resistive welding. In destructivetestsa weldisqualified bymeasuringthe failure load of the junction. However this kind of test can only be applied toa representative pieces. Competitiveness has obliged to use high productivity weldings in conjunction with quality controls of all welding junctions. Non-destructive testing techniques find widespread applications for evaluating the integrity of critical components. Among them, ultrasonic waves and x-rays [1] are more often used because of their precision. However, these techniques are costly and unreliable and they have an adverse effect on the productivity. For these reasons they are not feasible for on-line applications. Studies of welding process modeling and control are based on the physics of the weld or the empirical data [2]. However, these approaches are notrobustbecauseoftheexistenceofuncontrolled parameters. Thispaperproposesamonitoringsystembasedon FPGA to estimate, on-line, the failure load of the junction as a function of the welding parameters obtained directly during the process. If the failure load is under acertain bound, thepiece isrefused. The supervision system has been carried out using neural networkswhoseapplicationsto several domainslikepatternrecognition orindustrial process control have [3] been successful. All the work presented have been developed using the welding stations installed in the suspension production lines of General MotorsEspa˜na in the factory at Puerto Real (C´ adiz). These stations welds one rod to one reed. In figure 1 is shown a rod and reed before and after the weld process. Figure 1: Pieces before and after the weld. Below the welding process is described, with special emphasis in its control parameters and their relationshipwiththefailureload. InsectionIII,the data acquisition and process done by the FPGA is studied. Finally, in section IV, an on-line application is shown, analyzing thedata obtained during the process. II. PARAMETERS OF THE WELDING PROCESS A scheme of the welding process is shown in fig. 2. The welding station has a PRODIGI controller of Pertron Controls Corp. [4]. This system can control accurately the heat given to the junction during the welding. Electrode Electrode junction F Figure 2: Welding scheme. Many factorsaffect thefailure load obtainedin the junction. Controlled parametersare the geometric andenergetic, andamongtheuncontrolledparameters is necessary to take into account impurities, corrosion and surface treatments such as chromation,environmentalpollution,etc. Thepresenceof alltheseuncontrolled parametersjustifytheuseof asystemthatsupervisesthequalityofthewelding. In this work we assume that the shape of the current waveform contains all the information about the junction. If there is not any defect during its execution, the current waveform is very regular. Any problem can be detected because the current waveform presents distortion. Figure 3 represents the current waveform involved in the generation of the junction and in figure 4 we can see a detail of the previous one. These waveforms have been captured using a digital oscilloscope with a base time of 50 s . The periodicity of this waveform corresponds to one sixth of the 50 Hz three phase supply voltage waveform. -1.4 -1.2 -1 -0.8 -0.6 -0.4 -0.2 0 0.2 0 1000 2000 3000 4000 5000 6000 7000 8000 9000 10000 Current Number of cycles Figure 3: Oscilloscope view ofthe welding current. -1.4 -1.2 -1 -0.8 -0.6 -0.4 -0.2 0 0.2 1000 1050 1100 1150 1200 1250 1300 1350 1400 1450 1500 Current Number of cycles Figure 4: Detail of figure 3 It has been essayed 36 probes to study the relationshipbetweentheshapesoftherecorded waves andtheirfailureloads. Theseprobesaredivided in fourgroupsaccording tothestateoftheirsurfaces. The resulting failure loads are shownin Table 1. A B C D 1 5090 3886 3400 4500 2 4802 4402 3902 4850 3 5190 3872 4386 3966 4 5600 3786 4516 5010 5 4884 2810 3810 4896 6 4862 3358 4384 3792 7 5022 2390 2900 4138 8 4720 3610 4270 4026 9 5080 2450 4098 4672 Table 1: Failure loads. A: Normal; B:oxides; C,D: chromatted The shape factor of thecurrent waveis defined by I csf = s N P k = 1 i 2 k N ( 1 ) where iis the sampled value of the current that goesacrossthewelderelectrodesandNisthenumber of samples. This equation has been applied to all current waveforms and the results are shown in Table 2, being normalized between 0 and 1. A B C D 1 0.3574 0.0122 0.2211 0.2960 2 0.4587 0.2283 0.2198 0.2977 3 0.5629 0.1170 0.3240 0.2877 4 0.4723 0.1348 0.3148 0.3133 5 0.4430 0.1140 0.2939 0.3586 6 0.4590 0.0830 0.2531 0.3980 7 0.4102 0.0168 0.1995 0.3176 8 0.3857 0.0000 0.3015 0.3068 9 0.3980 0.0456 0.3372 0.2954 Table 2: Current shape factors. The statistic analysis of Tables 1 and 2 based on T-Student function confirms the existence of a correlationship greater that 95 % between the failure load and I csf , that validates the hypothesis of the existence of a function that relates both magnitudes. The relationship between the failure load and I csf is shown in figure 5. The linear correlation coefficient between both variables is low (0.63), that indicates the necessity of using more complicated functions than the linear one, employing a larger volumeofinformationandusinganon-linearclassifier. 0.0 0.2 0.4 0.6 0.8 1.0 CSF 2.0 3.0 4.0 5.0 6.0 Failure Load (1000Kg) Figure 5: Loadfailure vs. current shape factor. To increase the volume of information involved, a discrete histogram has been used, dividing the sampled current curve in 8 level ranges of energy. One of the advantages of using this histogram is that it can be easily obtained with a simple digital circuitry, and therefore it can be calculated in real time. The histograms obtained for the probes in Table 1 are shown in Table 3. The linear correlation coefficient between the histograms and the failure load is high (0.98). This study hasbeen done excluding 3columns because theirvaluesarepractically constants. They are0.51V, 2-2.5V and 2.5-3V respectively. The high value of the correlation coefficient indicates that these histogramscontains all the information of the failure load so they can be used as a parametersfor a neural classifier. III. DATA ACQUISITION AND DIGITAL PROCESSING USING FPGA A Welding Monitoring System has been designed to test the validity of the formulated method. Basically, ithasadataacquisitioncard connected toa computer which simulates the classifier. The electric current is sampled and a FPGA process the digital results of the A/D converter. The wholedigitalpreprocessing circuitry hasbeen implemented using an Altera (EPM5128) FPGA [5]. It also supports the communication protocol with the computer. In order toget thehistogramsof thecurrent waveform, the FPGA has 8 counters that increase their values as a function of the analog/digital conversion of the current signal. The period of the samples is 50 s during the whole process of welding (little less than 0.5 s). For this reason, the number of samples for each weld are 10000, equivalent to 0.5 seconds. The ALTERA EPM5128FPGAcontains128macrocells thatare enough toimplementdigitalprocess240 240 0 0 1182 9 230 A 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 B 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 C 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 D 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 163 198 0 1 2 0 0 0 0 18 75 93 96 49 84 117 82 67 102 147 177 107 0 0 4 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 26 71 29 240 240 19 0 240 240 77 0 75 89 8 229 240 224 227 216 144 184 1 2 3 4 5 6 7 8 9 2 3 4 5 6 7 8 9 3 4 5 6 7 8 9 2 3 4 5 6 7 8 9 2 1 1 16 15 16 16 15 16 16 16 16 17 17 17 17 17 18 18 17 17 17 17 17 17 17 17 17 17 17 17 17 16 17 16 16 17 16 2 3 2 2 3 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 4 3 5 3 2 3 5 4 5 5 9 8 8 8 9 13 11 5 3 3 4 4 4 4 3 3 3 4 3 2 4 3 3 4 5 34 25 25 16 28 37 30 33 22 46 121 113 150 178 227 236 201 60 28 35 37 46 72 37 31 36 33 37 31 18 34 34 36 55 39 0-0.5V 0.5-1V 1-1.5V 1.5-2V 2-2.5V 2.5-3V 3-3.5V 3.5-4V probe Table 3: Current histograms of the probes employed in the learning phase. ing. Firstofall, itcontrolstheA/D converter toacquire data every 50  s. The three most significant bits of the converter (D7, D8 and D9) are inputs to the FPGA (see figure 6). These bits divide the current waveform in 8 levels whose histograms the FPGA should calculate. Depending on the values of these bitsa different counter is increased in one unit. The histogram of each level is the number of points stored in its counter when the weld has finished. D9 D8 D7 count Control Level B1 Level B2 Level B3 Level B4 Level B8 Decoder Level B7 Level B6 Level B5 shift Host Computer control Communication Figure 6: Logic to obtain the histograms The FPGA, also, controls the communication protocol with the personal computer. To minimize digital logic, all counters are connected as a shift register to send their information to the PC. This structure avoid implementing a large multiplexer. IV. APPLICATION The functional diagram and the block diagram of the specific acquisition system proposed for this applicationisshowninfigures7and8respectively. A data acquisition card (figure 9) has been designed to acquire and digital process the electric current. This card correspond with data acquisition system proposed in figure 7. The current input signal is filtered before being converted to a digital number. A low-passfilter has been defined to avoid aliasing in the sampled current signal. This specific hardware lets us calculate the histogram during the welding process and these resultsarereadbythehostcomputerattheendofthe welding. The computer also emulates the behavior of the neural network using the captured data as stimulus, both in the learning and recognition phases. Figure 9: Data acquisition card. Inthisworkhasbeenchosenaneural networkasa classifier. The reasons for using thiskind ofclassifieraretheirlearningabilityandabstractioncapacity. The neuralnetworkusedhasbeenamultilayer perceptron that had one hidden layer of 25 units and outputneuron. Basically, the learning process of a perceptron calculates the weight adjustment using the backpropagation method (equation 2) after each iteration. In equation 2, Eis the sum of the squares of the differences between the neural network output and the expected output. The initial weight values were set to random numbers between 0 and 0.1.  and  are parameters that affect the speed at which the network learns and its final accuracy.  ! ( t )= ,  @E @! +   ! ( t , 1 ) ( 2 ) Theneuralnetworkhasbeenconfigured inalearning phase, using the data of Table 3. The number ofiterationsneeded inthelearning phasehasbeen 450000. This systemhasbeen installedin aproduction line to test it. The number of essayed probes has been 450. 98% of the probes were correctly classified (438 were correctly welded and 3 had failure load lessthantheminimum),and theremaining 2%has given intermediate results in the neural network, that is, they belong to an uncertain area which has failure loads very close to the admissible minimum. V. CONCLUSIONS Digital signal processing is one of the most outstanding applications of FPGAs. In our work we make use of them to calculate histograms of analoginputsignals. Theproposedarchitectureisembedded in a a weld monitoring system based on neural networks. The systemlearns to classify the welds thanks todata obtainedby the FPGA based card during the welding process. Once configured, the supervision system hasbeen installed in START WELDER PASS/FAIL I WELDING MACHINE A/D DIGITAL PREPROCESSOR NEURAL CLASSIFICATOR CUSTOM CARD CONTROLLER Figure 7: Weld quality monitor system. Computer Host Control Block Shunt IR V Welding Equipment ADC Histograms and Adaptation Step Counters Control Comunication Amplification ALTERA EPM5128 FPGA Data Acquisition Card Figure 8: Data acquisition system. a production line allowing for the real time supervision of welding quality. It has been tested using 450 probes, having classified the vast majority of them correctly. Nowadays the same technique is being appliedtocontinuouswelding usingsliding windows [6]. VI. ACKNOWLEDGMENT The authors thank General Motors Espa˜na for the facilities given in the tests carried out in its production line of its factory in Puerto Real (C´ adiz). Moreover, TheyalsothankMrManuelMaraverfor his valuable advises and dedication in the elaboration of this research work. REFERENCES [1] Hull, B., John, V.: Non-destructive testing. MacMillan Education. London 1988. [2] Andersen, K., Cook, G.E., Karsai, G., Ramswamy, K.: Artificial Neural Networks Applied to Arc Welding Process Modeling and Control. IEEE Trans. onIndustry Applications, vol. 26 n05, September/October, 1990. [3] J.M. Quero, L.G. Franquelo and E.F. Camacho. “Networks for constrained Predictive Control”. IEEE Trans. on Circuits and Systems, vol. 40, 621-626, 1993. [4] Weld Quality Monitor Instruction Manual. SRL Controls Division, 1981 [5] Data book. Altera Corporation, 1992. [6] J.A. ANDERSON and E. ROSENFELD. Neurocomputing. MIT press, 1988.