DISPAR: A tool to model bottom trawl fishing gears

Instrumentation ViewPoint. Autumn 2005 77 Bottom trawl fishing is a relevant extractive economic activity. However, the limitation of resources and the impact on the environment demand for a more rational exploitation in order to render the activity sustainable and productive in a near future. To this purpose it is important to understand and to analyze the behaviour of fishing gears. DISPAR is a collaboration project between the UPC-CTVG and the CSIC aimed to move towards this direction. DISPAR includes a simulation module and a user-friendly interface software. The module of simulation solves the governing equations for different components of a bottom trawl gear (warps, otterboards, sweeps and net) and uses an iterative staggered strategy to account for coupling effects. Relevant outcomes are the configuration of the gear and the distribution of tensions under different fishing conditions such as fishing depth or towing speed. The former includes, for instance, otterboard opening, angle of attack, or warp geometry. The later allows to analyse the contribution of each component to the total gear drag. This simulation module is interfaced in order to facilitate data inputs and visualization of results to the final user. The resulting product is a multifunctional aid tool that complements data measurements, helps fishermen and sector companies to optimize bottom trawl gears, and deserves to pedagogic purposes. DISPAR: A tool to model bottom trawl fishing gears J. Antonijoan, A. Folch, O. Gualdo, A. Manuel, J. Prat, F. Sardà, A. Torrijos Design Flow for DSP&FPGA algorithms with Matlab J. del Río, M. López, A. Mànuel, E. Molino (1), A. Carlosena (2) Rambla Exposición s/n, 08800 Vilanova i la Geltrú, Spain Telf: +34 938 967 200, [email protected] (2)Dpt. Electrical and Electronic Engineering Universidad Pública de Navarra, E-31006 Pamplona, Spain Keywords: C Intrinsics, Matlab, DSP Software, Smart Sensor, Simulation, Verification 1. Introduction The tangible aim of this Project is the design of a smart accelerometer, having a very low cost, making use of a piezoelectric element as basic sensing material, and adding a mixed mode conditioning circuit. This synthetic goal, consist of a number of combined objectives as: -Development of techniques for the calibration, compensation and frequency range extension of basic sensing elements made typically of piezoelectric ceramics -Adaptation or development of novel techniques of calibration, to make possible the above mentioned methods -development and implementation of novel signal processing techniques as they apply to the above mentioned sensors for the estimation (parametric, non-parametric, blind,..) of mechanical systems, and excitation signals (impact). Both multiple and single sensor applications will be considered. This paper presents a proposed methodologi in order to evaluate the execution over programable hardware platforms (DSPs, FPGAs) of diferents algorithms debelopped and tested in Matlab. In a more general view about the blobal project this paper is related about Digital Signal Processing block in figure 1. Analog Signal Conditioning block is related in references[7][9]. The algorithms debelopped are explained in[3][4][5][6] and are related to process impulsive signals from impact sensors. The aim of this work is to implement and synthetize this algorithms over a specific hardware or a programmable hardware like FPGA or DSPs in order to evaluate the algorithm complexity and the viability of its implementation about computational cost, processing time, necessary memory, etc... in order to integrate the signal processing algorithm in an integrated circuit with the sensor (accelerometer), the analog signal conditioning, and the analog to digital conversion. The work is framed inside the project DIATRIBA, “Design a low cost smart accelerometer” CICyT DPI 2003-08637-C3-03. 2. State of the art At present the simulation environments as Matlab make possible the implementation and simulation of algorithms using PCs or workstations for execute algorithms. Often these signal processing algorithms finally will be implemented in a specific hardware platform Figure 1: Global Project esqueme