Citations refer to the original publication, not to a Scieee localized version.
Boneti, C., Cazorla, F., Gioiosa, R., Buyuktosunoglu, A., Cher, C.-Y., & Valero Cortés, M. (2008). Software-controlled priority characterization of POWER5 processor. Institute of Electrical and Electronics Engineers (IEEE). https://doi.org/10.1109/ISCA.2008.8
Boneti, Carlos, et al. Software-controlled priority characterization of POWER5 processor. Institute of Electrical and Electronics Engineers (IEEE), 2008. https://doi.org/10.1109/ISCA.2008.8.
Boneti, Carlos, Francisco Cazorla, Roberto Gioiosa, Alper Buyuktosunoglu, Chen-Yong Cher, and Mateo Valero Cortés. Software-controlled priority characterization of POWER5 processor. Institute of Electrical and Electronics Engineers (IEEE), 2008. https://doi.org/10.1109/ISCA.2008.8.
Boneti, C. et al. (2008) Software-controlled priority characterization of POWER5 processor. Institute of Electrical and Electronics Engineers (IEEE). Available at: https://doi.org/10.1109/ISCA.2008.8.
C. Boneti, F. Cazorla, R. Gioiosa, A. Buyuktosunoglu, C.-Y. Cher, and M. Valero Cortés, “Software-controlled priority characterization of POWER5 processor,” Institute of Electrical and Electronics Engineers (IEEE), 2008, doi: 10.1109/ISCA.2008.8.
@misc{boneti2008softwarecontrolled,
author = {Boneti, Carlos and Cazorla, Francisco and Gioiosa, Roberto and Buyuktosunoglu, Alper and Cher, Chen-Yong and Valero Cortés, Mateo},
title = {Software-controlled priority characterization of POWER5 processor},
year = {2008},
pages = {415--426},
publisher = {Institute of Electrical and Electronics Engineers (IEEE)},
doi = {10.1109/ISCA.2008.8},
url = {https://doi.org/10.1109/ISCA.2008.8}
}
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