Ci a ion: Segu a, M.; Calde ón, A.J.;
Poggi, T.; Ba cena, R. Tes ing he
Ve i ica ion and Valida ion Capabili y
o a DCP-Based In e ace o
Dis ibu ed Real-Time Applica ions.
Elec onics 2023,12, 4919. h ps://
doi.o g/10.3390/elec onics12244919
Academic Edi o : And ei Kela e
Recei ed: 8 No embe 2023
Re ised: 29 No embe 2023
Accep ed: 4 Decembe 2023
Published: 6 Decembe 2023
Copy igh : © 2023 by he au ho s.
Licensee MDPI, Basel, Swi ze land.
This a icle is an open access a icle
dis ibu ed unde he e ms and
condi ions o he C ea i e Commons
A ibu ion (CC BY) license (h ps://
c ea i ecommons.o g/licenses/by/
4.0/).
elec onics
A icle
Tes ing he Ve i ica ion and Valida ion Capabili y o a
DCP-Based In e ace o Dis ibu ed Real-Time Applica ions
Mikel Segu a 1,* , Alejand o J. Calde ón 1, Tomaso Poggi 2and Ra ael Ba cena 3
1Dependable Embedded Sys ems Team, Ike lan, José Ma ía A izmendia ie a, 2, 20500 A asa e, Spain;
[email p o ec ed]
2Robo ics & Au oma ion Resea ch G oup, Mond agon Unibe si a ea, Lo amendi Kalea, 4, 20500 A asa e,
Spain; [email p o ec ed]
3Depa men o Elec onic Technology, Uni e si y o he Basque Coun y (UPV-EHU), To es Que edo
Ingenia ia en Enpa an za, 1, 48013 Bilbao, Spain; a a.ba [email p o ec ed]
*Co espondence: [email p o ec ed]
Abs ac :
Cybe –physical sys ems (CPS) in eg a e di e se elemen s de eloped by a ious endo s,
o en dispe sed geog aphically, posing signi ican de elopmen challenges. This pape p esen s an
imp o ed e sion o ou p e iously de eloped co-simula ion in e ace based on he non-p op ie a y
Dis ibu ed Co-Simula ion P o ocol (DCP) s anda d, now op imized o b oade ha dwa e pla o m
compa ibili y. The co e con ibu ions include a demons a ion o he in e ace’s ha dwa e-agnos ic
capabili ies and i s s aigh o wa d adap abili y ac oss di e en pla o ms. Fu he mo e, we p o-
ide a compa a i e analysis o ou in e ace agains he o iginal DCP. I is alida ed ia a ious
X-in- he-Loop simula ions, ein o cing he in e ace’s e sa ili y and applicabili y in di e se scena -
ios, such as dis ibu ed eal- ime execu ions, e i ica ion and alida ion p ocesses, o In ellec ual
P ope y p o ec ion.
Keywo ds:
Dis ibu ed Co-Simula ion P o ocol; simula ion in e ace; eal- ime; e i ica ion and
alida ion; in ellec ual p ope y p o ec ion
1. In oduc ion
Model-based design (MBD) is a widely adop ed me hodology o he de elopmen o
cybe –physical sys ems (CPS) [
1
]. This p ocess consis s o de eloping i ual models ha
ep oduce ce ain beha io s o a eal sys em, a oiding he need o c ea e cos ly physical
p o o ypes and acili a ing he p ocess o alida ion and e i ica ion [
2
]. These models o en
eside in dispa a e modeling and simula ion (M&S) en i onmen s, ei he because hey
ha e been de eloped by di e en endo s and hey wan o p ese e con iden iali y [
3
], o
because i is wan ed o implemen pa o he model on a speci ic ha dwa e pla o m in
o de o e i y i s pe o mance in a speci ic en i onmen [
4
]. Tes ing he co ec in e ac ion
be ween hese elemen s a an ea ly s age o he de elopmen phase acili a es he p ocess
o alida ion and e i ica ion o hem. Howe e , as s a ed in [
5
], i is common o sol e he
challenge o linking such elemen s using ad hoc me hods.
The mo i a ion o his wo k is o de elop a ool-agnos ic me hod ha enables he
linking o di e en modeling and simula ion ools and a ious ha dwa e pla o ms. In [
6
],
we a gued he lack o a language and pla o m-independen co-simula ion a chi ec u e o
add ess his p oblem, and in [
7
], we p oposed a solu ion, p esen ing an a chi ec u e based
on he non-p op ie a y Dis ibu ed Co-Simula ion P o ocol (DCP) s anda d. Ne e heless,
we did no explo e how his could be deployed on di e en ha dwa e pla o ms no
demons a e how he e i ica ion and alida ion p ocess can be simpli ied. Implemen ing
such a ool would no only sa e ime and esou ces, bu also educe cos s, as i acili a es
he coupling o elemen s, minimizes he need o physical in eg a ion es ing, and aids in
p ese ing In ellec ual P ope y.
Elec onics 2023,12, 4919. h ps://doi.o g/10.3390/elec onics12244919 h ps://www.mdpi.com/jou nal/elec onics
Elec onics 2023,12, 4919 2 o 14
Fu he mo e, beyond i s applica ions in CPS, his me hodology can be also highly
bene icial o any dis ibu ed sys em ha equi es synch onized and uni ied ope a ions
ac oss di e en componen s. I can be pa icula ly aluable in he de elopmen o ba e y
managemen sys ems (BMS), which in ol e combining inpu s om a ious so wa e and
ha dwa e componen s [
8
], o in sma -g id sys ems ha need he coupling o simula o s o
dynamically simula e se e al aspec s o hei in as uc u es [
9
]. By o e ing a s anda dized
app oach o co-simula ion, ou in e ace can signi ican ly assis in simpli ying he de elop-
men p ocess, allowing use s o ocus on he sys em’s de elopmen while i handles he
complexi ies o in e connec ion asks.
Acco dingly, his a icle con ibu es o he ield o dis ibu ed co-simula ion by p e-
sen ing he new capabili ies added o he co-simula ion in e ace we ha e de eloped. I
has been designed o acili a e co-simula ion in he de elopmen o CPSs; howe e , i can
also be applicable o he communica ion needs o o he dis ibu ed sys ems. Speci ically,
we discuss h ee dis inc capabili ies o his in e ace.
Fi s , we illus a e he adap abili y and ease o implemen a ion o ou in e ace ac oss
a ious ha dwa e pla o ms, including bu no limi ed o he Xilinx Zynq Ul aScale+, Xilinx
Zynq-7000 SoC ZC702, NVIDIA Je son Nano, and Raspbe y Pi. Ou ha dwa e-agnos ic
app oach, de eloped in Simulink and adap able o s anda d C/C++ code gene a ion,
enables e o less mig a ion be ween pla o ms, ein o cing i s e sa ili y and educing he
need o complex econ igu a ion.
Second, aking in o accoun ha he use o X-in- he-Loop (XIL) simula ions is widely
ex ended in he de elopmen o CPSs, we assess i s abili y o manage a eal- ime communi-
ca ion be ween Simulink and hese di e se pla o ms.
Finally, we demons a e he in e ace’s e ec i eness in enabling communica ion be-
ween sys ems de eloped by geog aphically dis ibu ed supplie s. This is exempli ied by
es ablishing a eal- ime simula ion ha connec s he Xilinx Zynq-7000 SoC ZC702 wi h he
Raspbe y Pi using UDP communica ion ia ou in e ace.
The pape is s uc u ed as ollows. Sec ion 2add esses he need o a gene ic a chi ec-
u e o co-simula ion. Sec ion 3in oduces he gene ic in e ace ha enables pe o ming
co-simula ions be ween a a ie y o simula ion en i onmen s. Sec ion 4explains he es s
ha we execu ed o demons a e he applicabili y o he in e ace. Sec ion 5exposes he
esul s o he conduc ed es s. Sec ion 6analyses he esul s o he p e ious sec ion. Finally,
Sec ion 7p esen s he conclusions and u u e wo k.
2. Backg ound and Rela ed Wo k
Co-simula ion is used o couple di e en simula ion en i onmen s (e.g., a con inuous
and an e en d i en simula ion en i onmen ) in o de o use an app op ia e simula ion
en i onmen o each pa o he sys em [
10
]. I is also applicable o linking spa ially
dis ibu ed models [
11
]. Addi ionally, in he de elopmen and e i ica ion p ocess o
con ol sys ems, di e en co-simula ion echniques e e ed o as X-in- he-Loop (XIL) [
12
]
a e used, encompassing he well-known Model-in- he-Loop (MIL), So wa e-in- he-Loop
(SIL), P ocesso -in- he-Loop (PIL), o Ha dwa e-in- he-Loop (HIL) echniques. Despi e
being a widely used echnique, coupling p oblems o en a ise and he e is no gene ic
me hodology o linking di e en simula ion en i onmen s. This p oblem is de ec ed in
se e al wo ks, whe e di e en co-simula ion a chi ec u es a e p oposed o sol e i .
Some esea ch ocuses on domain-speci ic solu ions, such as [
13
], which p esen ed a
co-simula ion a chi ec u e o ele a o alida ion and es ing, o [
14
], which in oduces an
a chi ec u e o he co-simula ion o ene gy sys ems in eg a ion. Al hough hese solu ions
a e aluable, hei applicabili y is limi ed o speci ic use cases.
Ou ocus is on gene ic co-simula ion solu ions ha enable he linking o so wa e
models and ha dwa e applica ions ega dless o he applica ion domain. In his a ea, wo ks
like [
12
] p opose an a chi ec u e applicable ac oss a ious XIL app oaches, designed o
eal- ime and dis ibu ed co-simula ions ac oss di e en geog aphical loca ions. Howe e ,
i elays on a p op ie a y a chi ec u e ha is no s anda dized, and de ails on i s implemen-
Elec onics 2023,12, 4919 3 o 14
a ion in di e se modeling and simula ion en i onmen s a e no p o ided, sugges ing ha
in eg a ion may no be s aigh o wa d.
In he sea ch o language- and pla o m-independen solu ions, s udies such as [
15
],
which p esen s a co-simula ion amewo k based on he Func ional Mock-up In e ace
(FMI), and [
16
], which u ilizes he High-Le el A chi ec u e (HLA) s anda d, a e no ewo hy.
The au ho s o [
5
] also p opose an a chi ec u e aiming o a oid ad hoc app oaches, ocusing
on gua an eeing IP p o ec ion. Howe e , hei majo d awback is ha hey ha e no
conside ed he in eg a ion o eal- ime sys ems o ha dwa e-in- he-loop simula ions.
To b idge his gap, we p oposed [
6
] and p esen ed [
7
], a co-simula ion a chi ec u e
based on non-p op ie a y s anda ds ha acili a es coupling be ween di e en M&S en i-
onmen s and ha dwa e pla o ms. By elying on a non-p op ie a y s anda d such as he
Dis ibu ed Co-Simula ion P o ocol (DCP) [
17
], he a chi ec u e is implemen able wi hou
any in ellec ual p ope y es ic ions and, on op o ha , i is compa ible wi h any o he
DCP seconda y. Addi ionally, hanks o he DCP na u e, i enables bo h non- eal- ime and
eal- ime co-simula ion.
DCP is a non-p op ie a y s anda d designed o in eg a e eal- ime sys ems in o co-
simula ion en i onmen s. I ollows he p ima y–seconda y p inciple and i is independen
o he communica ion medium, as i wo ks o e common anspo p o ocols such as
Blue oo h, UDP, o CAN. Howe e , as he DCP is a ela i ely new s anda d, i has a limi ed
applicabili y in e ms o simula ion en i onmen s. Fu he mo e, i s ope a ion esides in
encapsula ing he sys ems o be communica ed; hus, a pa icula DCP seconda y mus
be c ea ed o each applica ion. In compa ison wi h he DCP, we p opose a gene ic co-
simula ion in e ace, i.e., he sys em o be communica ed is independen o he in e ace
and he e is no need o de elop a speci ic seconda y o each applica ion. This is explained
in [
7
], whe e we ex ended he scope o he DCP by c ea ing a Simulink lib a y, allow-
ing o Simulink o be easily in eg a ed no only in o ou a chi ec u e, bu also in o any
DCP applica ion.
P e iously, we p esen ed he Simulink implemen a ion o he p oposed co-simula ion
in e ace, es ing i agains a DCP seconda y de eloped ia he C++ DCP lib a y [
18
],
p o ided by Modelica Associa ion. In his new wo k, we imp o ed i o be compa ible
wi h he au oma ic code gene a ion capabili y o Simulink, allowing he use o con e ou
in e ace in o sou ce code (e.g., C o C++) and o deploy i on a wide a ie y o pla o ms.
This enhancemen enables c oss-pla o m mig a ion and acili a es he alida ion o he
sys em unde de elopmen . Consequen ly, we o e a solu ion o eal- ime communica ion
be ween models execu ed on hese pla o ms.
Addi ionally, as ou a chi ec u e is agnos ic o bo h he simula ion pla o m and he
communica ion medium, i enables he inclusion o echnologies like FPGAs o GPUs in co-
simula ions, opening up possibili ies o i s applica ion in a eas like simula ion accele a ion
o a i icial in elligence. Indeed, o ou knowledge, his ep esen s he i s ins ance o
he DCP being u ilized on a pla o m wi h an FPGA execu ion. This a icle del es in o
demons a ing his ha dwa e-agnos ic enhancemen ia a ious X-in- he-Loop simula ions.
As his pape deals wi h eal- ime (RT) simula ions, i is wo h ha ing a li le back-
g ound on he cha ac e is ics o hese sys ems. Fi s , i is wo h men ioning ha , in eal- ime
sys ems, he ins an in which he esponse occu s is as impo an as he esponse i sel [
19
].
I he esponse does no a i e a a p ede ined ime, called deadline, he esponse may be
unusable and may ha e ad e se consequences o he sys em. Ano he cha ac e is ic o
hese sys ems is he so-called wall clock. All compu a ional elemen s in ol ed in a eal- ime
simula ion mus ha e a common clock e e ence and be synch onized o i . The highe he
accu acy o his synch oniza ion, he be e he sys em will be able o empo ally ca y ou
mo e cons ained simula ions. De e minism is ano he cha ac e is ic o hese sys ems, o
which i indica es he ep oducibili y o he sys em. Tha is, i we un se e al simula ions
o he same sys em, whe e all i s componen s s a a he same ime and wi h he same
s a ing condi ions, hen he de e minism means he abili y o he sys em o eplica e he
esul s a he same ime ins an s.
Elec onics 2023,12, 4919 4 o 14
On he o he hand, he e a e non- eal- ime (NRT) simula ions. These a e con olled
simula ions ha usually epea a ead-compu e-w i e sequence, whe e hey i s wai o
he ecei ing da a, hen p ocess i , and inally w i e he esul a he ou pu po . Once
his cycle is inished, he nex cycle s a s ollowing he same sequence. Compa ing wi h
eal- ime sys ems, hey do no ha e o p o ide a empo ally accu a e esponse. I is o
say, he message anspo la ency can a y wi hou a ec ing he beha io o he sys em.
Simulink, o example, is a ool ha , by de aul , uns in NRT; howe e , i also has a ool
called Simulink Desk op Real-Time [
20
], which allows us o synch onize he simula ion
wi h he wall clock. This ool has wo modes o use: I/O mode and ke nel mode. The
i s one synch onizes he I/O d i e s wi h he eal- ime clock and allows us o pe o m
eal- ime execu ions up o 1 kHz (1 ms sampling ime); his is he one ha we use in
his wo k.
3. P oposed In e ace
The in e ace we p opose is based on he non-p op ie a y DCP s anda d; hus, i mus
be con igu ed as a DCP seconda y. Ne e heless, as depic ed in Figu e 1, i s beha io is
no ha o a con en ional DCP seconda y. Ou implemen a ion ocuses on ansmi ing
in o ma ion om one en i onmen o ano he and i is comple ely model independen ,
whe eas in con en ional usage, he seconda y w aps he model [
21
], ha ing o link hem
in e nally by hand. F om a p ac ical poin o iew, he e is a big di e ence, since in he
o iginal pa adigm, a speci ic DCP seconda y has o be de eloped o each applica ion,
whe eas ou p oposal is designed o indica e only he numbe o inpu /ou pu s plus an
easy con igu a ion o hem.
Model
DCP Sla e I/O
(a)
Model
DCP Sla e I/O
I/O
(b)
Figu e 1.
Compa ison be ween o iginal DCP Seconda y design and ou in e ace. (
a
) O iginal DCP
Seconda y design ep esen a ion: in e nally linked DCP Seconda y and Model, wi h one speci ic DCP
Seconda y o each Model; (
b
) P oposed in e ace o new DCP Seconda y design: ex e nally linked
DCP Seconda y and Model, using he same seconda y wi h easily con igu able Inpu /Ou pu s.
To achie e his independence be ween he model and he DCP seconda y, in addi ion o
implemen ing a speci ic DCP seconda y, we also de eloped a se ies o pe iphe al modules,
which a e explained in [
7
]. Thus, ou in e ace is composed o hese modules and a DCP
seconda y. Ou goal in de eloping his in e ace as a Simulink lib a y was o ake ad an age
o i s ools so ha we could gene a e C/C++ code o ou in e ace and implemen i on a
a ie y o ha dwa e pla o ms wi hou addi ional modi ica ions.
This modula i y, apa om p o iding lexibili y du ing he design p ocess, allows
o he sepa a ion o modeling asks om communica ion asks, enabling he use o ocus
on he sys em de elopmen aspec s. Mo eo e , i ex ends he applicabili y o he DCP
s anda d i sel , as will be demons a ed la e , allowing o he inclusion o echnologies
such as FPGAs in co-simula ions, which is a no el applica ion o he s anda d. All his
con ibu es o ime sa ings in conduc ing co-simula ions and o e s g ea e adap abili y
ega ding he so wa e and ha dwa e echnologies one wishes o employ.
Elec onics 2023,12, 4919 5 o 14
3.1. Con igu a ion o he In e ace
We ha e ad anced ha he con igu a ion o he in e ace is based on he DCP s anda d;
he e o e, we will use he DCP s anda d speci ica ion documen [
22
] o he explana ions o
his sec ion. The e e ences o speci ic clauses o he s anda d will be in i alics o be e guide
he eade . In his sec ion, we will only ocus on he essen ial pa ame e s (in monospace
on ) o de ine ou in e ace; howe e , he e a e also o he op ionally modi iable pa ame e s
whose explana ion can be ound in he s anda d speci ica ion documen . Figu e 2will be
help ul o unde s and ce ain concep s.
In e ace Mas e (ID 0)
Hos : 192.168.0.20
Po : 8080
Ubun u 18.04
da aId_cn l = 1
single
da aId_enable = 3
boolean
da aId_ db = 2
single
Co-simula ion pla o m 2
Model 2:
Plan & Sync.
algo i hm
da aId_in e ace = 0
In e ace Sla e 2 (ID 2)
Hos : 192.168.0.10
Po : 8082
in_cn l
( = 2)
ou _enable
( = 6)
in_enable
( = 5)
ou _cn l
( = 1)
ou _ db
( = 3)
in_ db
( = 4)
Co-simula ion pla o m 1
Model 1:
Con ol
Algo i hm
da aId_in e ace = 0
In e ace Sla e 1 (ID 1)
Hos : 192.168.0.30
Po : 8081
in_cn l
( = 1)
ou _enable
( = 5)
in_enable
( = 6)
ou _cn l
( = 2)
ou _ db
( = 4)
in_ db
( = 3)
Figu e 2. In e ace con igu a ion o he employed use case.
Some pa ame e s a e se in each seconda y, while o he s a e se in he p ima y. The
seconda ies a e limi ed o se hei in e nal pa ame e s (see 5.4 De ini ion o dcpSla eDesc ip-
ion Elemen , pp. 80–82), o which he essen ial pa ame e s o con igu ing he in e ace a e
de ined by he ollowing elemen s:
•
Time esolu ion (5.9 De ini ion o TimeRes Elemen , pp. 87–88). I de ines one a omic s ep
o he seconda y and is ep esen ed by an elemen ha con ains a lis o pe missible
single ime esolu ions o a lis o esolu ion anges. To se a single esolu ion, which
is wha we a e going o do nex , we ha e o se wo sub-pa ame e s:
nume a o
and
denomina o
, whe e he
nume a o
di ided by he
denomina o
ep esen s he ime
esolu ion o he seconda y.
•
T anspo p o ocol (5.11 De ini ion o T anspo P o ocols Elemen , p. 88). The DCP
suppo s mul iple anspo p o ocols and his elemen is used o s o e hei speci ic
se ings. Fo ins ance, i he UDP anspo p o ocol is used, his elemen mus indica e
i and con ain he hos and po da a o he seconda y.
•
Va iables (5.13 De ini ion o Va iables Elemen , pp. 92–98). This elemen con ains he in-
o ma ion abou he a iables o he seconda y, hey can be ei he an Inpu , an Ou pu ,
a Pa ame e , o a S uc u al Pa ame e . Among i s sub-pa ame e s, he indispensable
ones o con igu e ou in e ace a e
alueRe e ence
,
da aType
, and
decla edType
.
alueRe e ence
is he iden i ie o each a iable and i s alue mus be unique; in
Figu e 2, i can be seen how each I/O o each seconda y has di e en
alueRe e ence
( ) alues. Wi h
da aType
, we decla e he da a ype o he a iable, see Table 174:
Da a ype elemen s o know he accep ed da a ypes by he DCP s anda d. Finally, wi h
decla edType
, we indica e whe he he a iable is used as an inpu /ou pu ha con-
nec s o ano he seconda y, o as an inpu /ou pu ha connec s o an ex e nal model.
Fo his pu pose, we ha e wo p ede ined op ions:
de aul
, o communica ion
be ween seconda ies, and in e ace o communica ion wi h he models.
As he ask o he in e ace is o communica e be ween di e en co-simula ion en i-
onmen s, inpu s and ou pu s will always ha e o be decla ed in pai s. Each pai will be
Elec onics 2023,12, 4919 6 o 14
in e nally linked in an au oma ic way as long as hei
alueRe e ences
a e consecu i e. In
o he wo ds, he
alueRe e ence
pa ame e s o an inpu –ou pu pai mus be consecu i e.
These alues shall consis o he pai s 1–2, 3–4, ..., ega dless o which o he wo is he
alue o he inpu and which o he ou pu . Addi ionally, i an ou pu o one in e ace com-
munica es wi h an inpu o ano he in e ace, bo h mus ha e he same
alueRe e ence
.
This is shown in Figu e 2. In his way, we de e mine he link be ween in e aces and ce i y
a co ec communica ion.
The p ima y, on he o he hand, con igu es how he inpu s and ou pu s o he secon-
da ies should communica e wi h each o he . Tha is o say, i indica es o each seconda y
whe e he inpu s co esponding o i s ou pu s a e and ice e sa. In addi ion, i es ab-
lishes he sending equency o each ou pu . To do his, he ollowing pa ame e s mus
be con igu ed:
•
S ep Size. The p ima y de ines he s ep size o each ou pu o all seconda ies. The
s ep size is a mul iple o he ime esolu ion pa ame e men ioned in he seconda y
con igu a ion. Tha is, he s ep size o each ou pu is de ined by he ime esolu ion o
i s seconda y mul iplied by he s ep pa ame e .
•
Da a Iden i ie (
da a_id
). When exchanging in o ma ion be ween seconda ies, Ou -
pu s a e communica ed o Inpu s ia DAT_inpu _ou pu PDUs. Thanks o he
da a_id
pa ame e , he alues o se e al ou pu s o a seconda y can be g ouped in a single
DAT_inpu _ou pu PDU. Only ou pu s ha ha e he same con igu a ion, i.e., sende ,
ecei e , and s ep size, can be g ouped oge he .
4. Me hodology
In his sec ion, we explain he expe imen s ha we pe o med o show how he
a chi ec u e p esen ed in [
6
] is applicable on se e al ha dwa e pla o ms and how i is
applicable on a dis ibu ed eal- ime co-simula ion applica ion. To do so, we apply i on
ou di e en pla o ms, which a e in oduced in Sec ion 4.1. As he p oo -o -concep use
case, we use a closed-loop con ol model explained in Sec ion 4.2. In Sec ion 4.3, we p esen
he co-simula ion scena ios we use o demons a e he applicabili y o he in e ace. Finally,
in Sec ion 4.4, we explain how o con igu e ou gene ic co-simula ion in e ace o his
pa icula use case.
4.1. Ha dwa e Pla o ms
In o de o es he applicabili y o ou a chi ec u e, and hus o ou in e ace, i has
been decided o wo k wi h ha dwa e pla o ms designed o di e en pu poses, whe e
conc e ely we used
•
Ha dwa e pla o ms wi h in eg a ed FPGA, such as Xilinx Zynq Ul aScale+ and
Xilinx Zynq-7000 SoC ZC702.
• Ha dwa e pla o ms wi h in eg a ed GPU, such as NVIDIA Je son Nano.
•
Gene ic ha dwa e pla o ms such as Raspbe y Pi 3B, which is e y accessible and
widely used.
By wo king wi h pla o ms ha in eg a e FPGAs o GPUs, we a e able o in oduce
hese echnologies in o co-simula ions, expanding ou design o new applica ions such as
simula ion accele a o s, a i icial in elligence, o image p ocessing.
Howe e , o now, ou in e ace has wo limi a ions. Fi s ly, i is only implemen ed
o un on so eal- ime (SRT) and ha d eal- ime (HRT) ope a ion modes, o which he
non- eal- ime (NRT) ope a ion mode has no ye been implemen ed. The e o e, as bo h
implemen ed modes equi e a common clock e e ence sha ed by all compu ing elemen s,
he in e ace mus be implemen ed in an en i onmen ha can p o ide i . Secondly, o he
momen , we ha e only implemen ed UDP communica ion, so he boa ds mus ha e an
E he ne po .
Elec onics 2023,12, 4919 7 o 14
4.2. Use Case: Con ol o a Closed-Loop Sys em
As was pe o med in [
7
], as a p oo o concep , we use a closed-loop con ol sys em.
This sys em consis s o wo pa s: a plan , which is modeled as a disc e e ime i s -o de
sys em, ep esen ed by Equa ion (1), and a PI con ol algo i hm, ep esen ed by Equa ion (2).
The simula ion analysis is pe o med by obse ing he ime e olu ion o he closed-loop
sys em esponse o a s ep inpu , compa ing bo h he ansien and s eady-s a e pa s. I
is wo h poin ing ou ha his wo k is ocused on es ing he capabili y o he in e ace
o communica e dis ibu ed sys ems in eal ime. The e o e, in o de o acili a e he
demons a ion p ocess, we ha e chosen his simple use case.
y(k) = a·y(k−1) + b·u(k)(1)
whe e
•uis he con ol signal;
•yis he plan ou pu o eedback signal;
•ais a cons an pa ame e , and i was pe manen ly se o a=0.99;
•bis a cons an pa ame e , and i was pe manen ly se o b=0.01.
u(k) = Kp+KiTs1
z−1e(k)(2)
whe e
•uis he con ol signal;
•Kpis he p opo ional gain coe icien ;
•Kiis he in eg al gain coe icien ;
•Tsis he sampling pe iod;
•e(k) = (k)−y(k)is he e o signal;
• (k)is he a ge e e ence signal;
•zis he uni delay ope a o .
4.3. Co-Simula ion Scena ios
In [
7
], we p esen ed di e en scena ios o explain he de elopmen p ocess o he
in e ace. We s a ed wi h a scena io composed only o Simulink and ended up wi h
a scena io whe e he con ol algo i hm was unning in an Ul aScale+ and he plan in
Simulink. Howe e , in o de o implemen he con ol subsys em on he Ul aScale+ boa d,
we manually c ea ed a DCP seconda y using C++ code ha was speci ically adap ed
o wo k on his boa d and be compa ible wi h he con ol algo i hm. Now, we wan o
p og ess in he de elopmen o he in e ace and es i s applicabili y. To do so, ollowing
he MBD me hodology, we ha e au oma ically gene a ed in e ace code om he Simulink
model, using he Embedded Code ool. In o de o be able o gene a e code co ec ly, we
adap ed he Simulink model by adding blocks and c ea ing unc ions compa ible wi h his
gene a ion. A e ha , we we e able o gene a e di ec ly implemen able code, wi hou he
need o any changes, in any o he pla o ms p esen ed in Sec ion 4.1.
Figu e 2 ep esen s he co-simula ion scena io. In i , we can see he wo models
ha compose he use case, de ined in he Sec ion 4.2, loca ed in di e en simula ion
en i onmen s and communica ed ia wo en i ies/seconda ies o ou in e ace. On he le ,
we can see Model 1, whe e he con ol algo i hm is loca ed. On he igh , we can see Model
2, which is composed o he plan and a synch oniza ion mechanism. The la e has he
unc ion o ensu ing a con olled s a o closed-loop con ol applica ions. Gua an eeing
iden ical s a s in all execu ions help us analyze he in e ace beha io . Fo a de ailed
desc ip ion o i s ope a ion, e e o [
7
]. The communica ion medium used o link bo h
sys ems is UDP.
To demons a e he easy implemen a ion capabili y o he in e ace on di e en ha d-
wa e pla o ms and, a he same ime, o analyze i s scope o pe o ming eal- ime XIL
simula ions, we ha e conside ed he ollowing scena ios:
Elec onics 2023,12, 4919 8 o 14
•
Scena io 1.A: Con ol algo i hm and in e ace in he ARM-based p ocesso o he
ZC702 and Plan in Simulink.
•
Scena io 1.B: Con ol algo i hm and in e ace in he ARM-based p ocesso o he
Ul aScale+ and Plan in Simulink.
•
Scena io 2: Con ol algo i hm and in e ace in he ARM-based p ocesso o he Je son
Nano and Plan in Simulink.
•
Scena io 3: Con ol algo i hm and in e ace in he CPU o he Raspbe y-Pi and Plan
in Simulink.
•
Scena io 4.A: Con ol algo i hm in he FPGA o he ZC702, in e ace in he ARM-based
p ocesso o he ZC702, and Plan in Simulink.
•
Scena io 4.B: Con ol algo i hm in he FPGA o he Ul aScale+, in e ace in he ARM-
based p ocesso o he Ul aScale+, and Plan in Simulink.
Addi ionally, o demons a e i s applicabili y in dis ibu ed eal- ime execu ions, we
ha e p oposed he ollowing scena io:
•
Scena io 5: Con ol algo i hm in he FPGA o he ZC702, in e ace in he ARM-based
p ocesso o he ZC702, and Plan in he CPU o he Raspbe y-Pi, see Figu e 3.
Figu e 3. Scena io 5.
I is wo h men ioning ha in all scena ios, we ha e kep he same in e ace con igu a-
ion (see Sec ion 4.4), hus acili a ing he in e ope abili y be ween simula ion ools.
As we men ioned in Sec ion 4.1, ou in e ace is limi ed o wo k in eal- ime ope a ion
mode; he e o e, all he scena ios ha e o be execu ed in eal ime. The DCP s anda d de ines
ha in i s eal- ime mode, all componen s wi hin he simula ion mus be synch onized
wi h POSIX ime. Tha is o say, hey ha e o synch onize hei clock by e e ence o
1 Janua y 1970, 00:00:00 UTC. Consequen ly, we ha e o make all he componen s un in an
en i onmen ha suppo s i and make hem synch onized wi h each o he . To make his
possible on he pla o ms, we ha e ins alled an Ubun u ope a ing sys em on he CPUs o
all o hem, whose clock will be synch onized wi h he POSIX ime. The e o e, he in e ace
and he sys em (plan o con olle ) will un on i . Rega ding Simulink, as explained abo e,
by de aul , i wo ks in non- eal- ime mode. Howe e , we will use i s Simulink Desk op
Real-Time ool in I/O mode, which allows us o synch onize he UDP po s wi h he wall
clock. This way, i will be also be synch onized o he POSIX ime. I should be no ed
ha we will un Simulink on a con en ional PC ha con ains a 6-co e In el Co e i7 CPU
p ocesso and uses a Windows 10 ope a ing sys em.
The use o he in e ace mus no al e he beha io o he closed-loop sys em in any o
he scena ios. The e o e, we need a e e ence in o de o be compa ed wi h he scena ios.
To his end, using he Embedded Code and HDL Code ools p o ided ia Simulink, we
Elec onics 2023,12, 4919 9 o 14
conduc ed P ocesso -in- he-Loop (PIL) and FPGA-in- he-Loop (FIL) simula ions equi alen
o he scena ios. In his way, we ob ained a e e ence esponse o each o he scena ios.
In o he wo ds, o scena ios 1.A, 1.B, 2, and 3, we pe o med PIL simula ions, one wi h
each ha dwa e pla o m, while o scena ios 4.A and 4.B, we pe o med FIL simula ions.
Each o hese simula ions a e used as a e e ence o hei espec i e scena io. Rega ding
scena io 5, we compa e i s esponses o hose o he sys em unning en i ely in Simulink.
4.4. In e ace and Simula ions Con igu a ion
Two ypes o con igu a ions we e applied o conduc he expe imen : he con igu a ion
o he models o be simula ed and he con igu a ion o he in e ace.
Rega ding he con igu a ion o he models, in [
7
], we saw ha he beha io o he
in e ace a ied depending on he execu ion ime; he e o e, we pe o med he es s using
six di e en con igu a ions. In he cu en a icle, ins ead, we a e going o ocus on wo king
only wi h he mos limi ing con igu a ion ha we encoun e ed, which is shown a Table 1.
Table 1. Con igu a ion o he simula ion.
Con igu a ion I Ts=10 ms Kp=10 Ki=10
Rega ding he con igu a ion o he co-simula ion in e ace. In Sec ion 3.1, we explain
he indispensable pa ame e s o be con igu ed. Now, we speci y which alues we chose o
ou pa icula use case:
•
Time esolu ion. Wi h his pa ame e , we indica e unde which s ep size he s a e
machine o he in e ace is execu ed. We se i o he lowes esolu ion ha Simulink
Desk op Real-Time allows o when wo king in I/O mode. The e o e, we se i o 1 ms:
nume a o =
1 and
denomina o =
1000. I is also wo h men ioning ha he s ep size
o he in e ace mus be lowe han ha o he model [7].
•
T anspo p o ocol. As men ioned, we use UDP. In Figu e 2, we can see he chosen
hos and po alues.
•
Va iables. We decla ed h ee inpu s and h ee ou pu s o each in e ace. In Figu e 2,
we can see he da a ypes and he alue e e ence o each one.
•
Da a iden i ie . In Figu e 2, we can see ha each seconda y has been assigned ou
da a_id. This means ha each a iable ha is ansmi ed be ween seconda ies has
g ouped independen ly, while he ou pu s ha go om he in e aces o each o he
models ha e been g ouped oge he .
•
S ep size. We assigned a s ep alue o 3 o he h ee da a_ids ha a e ansmi ed
be ween seconda ies (i.e., da aId_cn l, da aId_ db, and da aId_enable) and a s ep
alue o 10 o da aId_in e ace. Wi h his con igu a ion, we could ha e assigned he
same da a_id o he h ee signals ha a e ansmi ed be ween seconda ies, bu his
makes i easie in case o u u e modi ica ions.
5. Resul s
In his sec ion, we p esen he simula ion esul s o he scena ios explained in
Sec ion 4.3
.
They will be discussed in Sec ion 6. In o de o p o e ha he sys em beha es iden ically o
e e y execu ion, as conduc ed in [
7
], we pe o m 25 execu ions o each scena io. Be ween
each un, he sys em is ese in o de o ensu e iden ical s a ing condi ions in each o hem.
Subsequen ly, we compa e he ime esponse o he
y(k)
ou pu o each scena io wi h he
espec i e e e ence. F om his compa ison, we ob ain he e o , which is calcula ed by
means o Equa ion (3).
e =
u
u
1
N
N
∑
k=1y(k)−y e (k)2(3)
whe e
N
ep esen he s eps execu ed in a simula ion,
y(k)
is he esponse o he closed-loop
sys em a s ep
k
unde a speci ic scena io, and
y e (k)
is he esponse o he closed-loop
