499
CMOS Cu en -Mode
Chao ic
Neu ons
Manuel Delgado-Res i u o and Angel Rod iguez-V&quez
Depa amen o Analog Design
Cen o Nacional de Mic oelec onica, cma lia sn, 41 012-Se illa, Spain
This pape p esen s wo nonlinea CMOS cu en -mode
ci cui s ha implemen neu on soma equa ions o chao ic
neu al ne wo ks, and ano he ci cui o ealize p og ammable
cu en -mode synapse using CMOS-compa ible BJT's. They
ha e been ab ica ed in a double-me al, single-poly 1.6pm
CMOS echnology and hei measu ed pe o mance eached
he expec ed unc ion and speci ica ions. The neu on soma
ci cui s use a no el, highly accu a e CMOS ci cui s a egy o
ealize piecewise-linea cha ac e is ics in cu en -mode
domain. Thei p o o ypes ob ain educed a ea and low
ol age powe supply (down o 3 ) wi h clock equency o
5OOkHz. As ega d o he synapse ci cui , i ob ains la ge
linea i y and con inuous, linea , weigh adjus men by
explo a ion
o
he exponen ial-law ope a ion o
CMOS-BJT's. The ull acco dance obse ed be ween heo y
and measu emen s suppo s he de elopmen o u u e analog
VLSI chao ic neu al ne wo ks o emula e biological sys ems
and ad anced compu a ion.
INTRODUCTION
Recen s udies on eal ne e memb anes in
neu ophysiological expe imen s ha e shown ha he
dynamical beha io o biological neu ons a e much mo e
complex (including chao ic esponse) han ha exhibi ed by
con en ional models used
in
a i icial ne wo ks, ypically
ep esen ed by simple h eshold
o
sigmoid elemen s [l], [2].
Consequen ly,
in
he las yea s, new schemes o a i icial
neu al ne wo ks ha e eme ged whose pu pose is o mo e
ealis ically emula e he chao ic esponses expe imen ally
obse ed om biological sys ems. One o he simples
chao ic neu al ne wo ks has been epo ed in [3], and
cons i u es a modi ica ion o he Nagumo-Sa 0 model
[4],
whe e ins ead o ollowing an all-o -none law o he ac ion
po en ial, modelled by an uni s ep ou pu unc ion
U(*),
he
neu on shows a con inuously g aded s imulus- esponse
cu e, ep esen ed by a non-linea unc ion
Am).
The model
in [3], illus a ed in Fig.
1,
is de ined by he ollowing
ini e-di e ence equa ions:
ni(n
+
1)
=
kxi(n)
-
a&(n))
+Ai@)
,
n
=
0,
1,
...
(1)
yi(n
+
1)
=&(n
+
I))
whe ex,(n+l) and y,(n+l) a e he in e nal s a e and he ou pu
o he i h chao ic neu on a he disc e e ime n+l, espec-
i ely;
a
and
k
a e he scaling and damping ac o s o e ac-
o iness ( esidual e ec o a neu on once i ed), espec i ely;
and A,(n) is he inpu exci a ion a he ins an n, gi en by
Figu e
1
Analog
compu e concep
o
he chao ic neu on
ci cui . The nonlinea
block
is gi en
by
g(x)
=
k
-
ax),
acco ding o
(1).
M
N
Ai(n)
=
Wjjyj(n)
+
Vj,Ij(n)
-
Bi
(2)
j=
1
j=
1
whe e he i s e m compu es he in luence o he
A4
neu ons
d i ing he i h neu on; he second, he exci a ion om he
N
ex e nal inpu s,
4;
and
0,
is he h eshold
o
he i h neu on.
Las ly,A-) cons i u es he neu on ou pu unc ion ep esen ed
by he piecewise-linea model
whe e
E
is a posi i e numbe de ining he s eepness o he
unc ion.
Many s udies on chao ic neu al ne wo ks in gene al, and
using he p e ious model in pa icula , e eal ha such
ne wo ks no only se e
as
an expe imen al ehicle in he
s udy o senso y ne e sys ems, bu also p o ide he means
o impo an enginee ing applica ions. In his sense, chao ic
neu al ne wo ks ha e been p oposed o sol e di icul
op imiza ion p oblems
[5],
[6]
;
o
dynamical associa i e
pa em classi ica ion
[7];
and o signal de ec ion and
classgca ion in noisy en i onmen s
[8],
and i is o eseeable
ha new applica ions will a ise in he nea u u e.
In spi e o he s ong economical in e es in ol ing hese
applica ions, ew up- o-da e physical implemen a ions o
chao ic neu ons ha e been p oposed. Thus, i is ad isable o
gi e ci cui ealiza ions o hese models. Fu he mo e, due
o
he echnological end owa ds sys em in eg a ion, hese
ci cui s mus be well-sui ed o VLSI, and, i possible,
compa ible wi h s anda d low cos CMOS echnologies.
The pu pose o his communica ion is o p o ide
monoli hic implemen a ions o he disc e e- ime chao ic
500
neu on desc ibed
in
(l), as well as o he Nagumo-Sa o
model ha , p e iously s a ed, subs i u es he nonlinea
unc ion
in
(3) by a uni s ep
U(*).
Also, a synapse ci cui
wi h con inuous, linea p og ammabili y which employs
CMOS-compa ible
BJT's
is epo ed.
CURRENT MODE IMPLEMENTATIONS
Cu en -mode
echniques ha e been employed o
implemen bo h neu ons, ollowing he concep ual diag am
shown
in
Fig.1. Summa ion is easily ealized exploi ing
KCL. The delay ope a ion can be ealized as a cascade
o
wo ack-and-hold swi ched-cu en s ages,
as
p oposed by
Hughes e al. [9]. Fig.
2
shows he schema ics o his block.
Nonlinea i ies ha e been achie ed using a no el, highly
accu a e CMOS ci cui s a egy o ealize PL cha ac e is ics
in
cu en -mode domain. I is based on he ec i ying
cha ac e is ics o he cu en swi ch
[lo],
which p o ides
e y high esolu ion and i ually ze o cu en o se , no
9
I
:
1+1
:
B
Figu e 2 Cu en -mode ack and
hold
ci cui .
+
-a
I
(a)
(b)
Nagumo-Sa o
Model
(4
Aiha a
Mode
Figu e
3
Piecewise linea mapping
:I
ci cui s o he neu ons.
in luenced by ansis o misma ches (indeed, minimum size
ansis o s we e used in bo h p o o ypes). Fig. 3 shows he
co esponding schema ics o bo h PL unc ions. Cu en
ampli ie s can be implemen ed by p ope ly a ioed bila e al
cu en mi o s.
Fi s ly, le us conside implemen a ion
o
he nonlinea
block,
g(-),
o he Nagumo-Sa 0 model, acco ding o he
concep o Fig.1. Fig.3(a), which consis s o wo cu en
sou ces ( ealized
in
p ac ice by cu en mi o ou pu
b anches), ou ansis o s and wo digi al in e e s, shows a
concep ual schema ic o he ealiza ion o he PL
cha ac e is ics o Fig.3(b). T ansis o s MCSn and M,, in
Fig.3(a) ope a e as a cu en -con olled-cu en -swi ch, wkle
ansis o s MVSn and MVSp ope a e as ol age-con olled
cu en swi ches. Any posi i e inpu cu en inc eases he
inpu ol age, u ning
Qs
de ice ON, and since bo h
de ices in he cu en swi ci ha e he same ga e ol age,
MCSn
OFF.
Simul aneously, he ol age a he second
in e e ou pu e ol es o he high logic s a e, u ning M s,,
ON and
M s
OFF.
Thus,
a cu en
h(n)
-a
(ob ained
by KCL a noBe NI) is di ec ed o he ou pu node h ough
he ansis o M Sn
--
he igh -hand piece o Fig.3(b) is
implemen ed
in
his manne . Simila ly, nega i e inpu
cu en s u n MCSn and MVsp ON,
so
ha a cu en
kx(n)
+
a
ci cula es h ough
M sp
o
he ou pu node. The ou pu
esponse
o
he neu on can
be
aken om he ol age a he
ou pu o he in e e IN2 which swings om ail o ail
depending upon he sign o he inpu cu en , hus esembling
he equi ed uni s ep unc ion in ol age mode. Ob iously
his bina y signal mus be combined wi h analog swi ches
and cu en sou ces o p ope ly d i ing o he neu ons in he
ne wo k.
Since cu en disc imina ion in he p oposed ci cui
elies on in eg a ion unc ion pe o med a he inpu node,
esolu ion is e y high, no in luenced by ansis o
misma ches (measu emen s om he CMOS p o o ype
display esolu ion o
12pA's).
Ope a ion speed is also e y
high, limi ed mainly by nonlinea ansien s
in
he ansis o s
ha implemen he cu en sou ces used o d i e nodes
NI
and N2. Also, he eedback c ea ed by in e e IN1 yields
signi ican educ ion o he dead-zone exhibi ed by he
d i ing poin cha ac e is ics measu ed a he inpu node, ha
is p opo ional o
(VTn
+
IVTp()
/
Ai",,
whe e
VTn
and
VTp
a e
he h eshold ol ages
o
he ansis o s and
A,,
is he
in e e
DC
gain. This is an appealing ea u e ha enables
educ ion
o
in e s age loading e o s caused by ini e
equi alen
MOS
ansis o s Ea ly ol ages.
Conce ning he implemen a ion o he PL cha ac e is ic
shown in
Fig.
3(d) o he Aiha a model, Fig. 3(c) shows he
co esponding schema ic. The cu en swi ches, oge he
wi h he cu en sou ces, a e used o disc imina e he inpu
cu en in o h ee pa hs acco ding i
x(n)
is lowe han
-E,
g ea e han
E,
o
is
comp ised be ween bo h alues. In he
wo i s cases, he pa hs a e ou ed o he same node and
ampli ied by
k,
while i
x(n)E
[-E,
E] he cu en is ampli ied
by
-y,
whe e
y
=
WE
-
k,
acco ding o (1) and (3). The ou pu
o he neu on can be easily aken in his case by eplica ion
and scaling he ou pu cu en o he ampli ie wi h gain
-y.
50
1
PROGRAMMABILITY ISSUES
FOR
CURRENT
MODE BLOCKS
In cu en -mode domain wo di e en app oaches o
p og ammabili y can be conside ed depending on he na u e
o he associa ed con olling signals: disc e e
p og ammabili y, whe e con olling signals a e digi al, and
con inuous p og ammabili y, whe e con olling signals a e
analog. Disc e e p og ammabili y can be inco po a ed
in
a
e y simple way, by analog mul iplexing o cu en
con ibu ions om di e en mi o s. These mi o s can
ei he implemen ixed empla es (wi h applica ion, o
ins ance,
in
cases whe e well-de ined asks mus be
sequen ially pe o med), o be bina y-weigh ed ( o mo e
gene al applica ion). Disc e e p og ammabili y p o ides
ease o con ollabili y and accu a e esul s, a he cos o a
s ong a ea penal y.
Fo educed a ea and con inuous weigh adjus men ,
analog p og ammabili y should be conside ed. A simple way
o achie e analog p og ammabili y is using unable
ansconduc o s, as he one shown
in
Fig. 4(a). Fig. 4(b)
shows a p og ammable cu en mi o using his
ansconduc o . Two di e en si ua ions a ise depending on
whe he ansis o s ope a e
in
weak o
in
s ong in e sion.
Analysis o bo h ope a ing condi ions shows he ollowing,
-
iq
=
1s
21
=
2
(4)
i.
In
s ong
PllBl
'In
weak
'El
As can be seen, he dependence is linea o weak
in e sion; hence, his la e case p o ides la ge weigh
adjus men anges. I is illus a ed
in
Fig.
5,
showing he
cu en weigh as a unc ion o
IB2/IB
o di e en alues o
IB,/I,,
whe e
IB
is a no maliza ion ac o o alue lOnA o
weak in e sion (Fig. 5(a)) and 50pA o s ong in e sion
(Fig. 5(b)). Also, nonlinea i y cancella ion is exac
in
weak
in e sion due o he exponen ial na u e o cu en o ol age
cha ac e is ics, while
i
is only app oxima e o s ong
in e sion: nonlinea i y
in
he weak in e sion case is less han
I%
up o
io=IB2,
while he co esponding alue o s ong
in e sion is
i,=O.13lB2.
D awbacks
o
weak in e sion a e
low accu acy, due o misma ch, and educed speed. These
can be o e come by using CMOS compa ible la e al BJTs
[
1
I],
which exhibi exponen ial ea u e o la ge cu en
anges, and wi h excellen ma ching p ope ies
[
121.
EXPERIMENTAL RESULTS
Bo h neu ons ha e been ab ica ed
in
a double-me al,
single-poly 1.6pm CMOS echnology. Fig.
6
shows he
co esponding mic opho og aphs. Some ex a
miscellaneous ci cui y has been added o bo h ci cui s o
enable es ing he ou pu cu en and he possibili y o ei he
open
o
close he eedback loop. Dummy swi ches we e also
added o educe he in luence o clock eed h ough. All
cu en ampli ie s we e bina y-weigh ed o he issue o
p og ammabili y. Bias cu en
I,
o
he delay s ages was se
(4
(b)
Figu e 4 (a)Tunable ansconduc o . (b) P og ammable
cu en mi o .
i
-
P
Figu e
5
Weigh
(iJih)
a ia ion wi h
IBZIIB
o di e en
alues
o
IB~IlB
in Fig. 4(b).
(a) T ansconduc o s ope a ing in weak in e sion
I
-
10nA.
(b) 'kansconduc o s ope a ing in s ong in e sio;, 50pA.
o 50pA. To al a ea occupa ion is 0.096mmL o he
Nagumo-Sa 0 neu on, and 0.225mm2 o he Aiha a neu on.
Fig.
7
shows he cha ac e is ics measu ed
in
open loop
o bo h ci cui s, using he HP41 45 semiconduc o analyze ,
wi h a ail- o ail powe supply o only 3 . Fo he
Nagumo-Sa 0 neu on (Fig.7(a)),
a
=
20pA,
k
=
1
and he
inpu anges om -20pA o 20pA. Fo he Aiha a neu on
(Fig.7(b)),
E
=
2pA,
y=
10
,
k
=
1
and he inpu sweeps
om
-1OpA
o
IOW.
In bo h p o o ypes de ia ion om
linea i y is less han 0.2%, and he measu ed cu en o se
amoun s o ew PA'S.
(a) Nagumo-Sa o Model (b) Aiha a Model
Figu e
6
Mic opho og aphs o he p o o ypes.
ah)
6w
20.0
4.0
Idi
0.0
-20.0
-20.0
0.0
20.0
I
2.Wdl
(U)
(a)
Nagumo-Sa o Model
-20.0
0.0
20.0
I
2.Wdi
(pA)
(b)
Aiha a Model
Figu e 7 Measu ed open-loop cha ac e is ics.
Fig.
8
shows he expe imen al bi u ca ion ees o bo h
neu ons, when he damping ac o
k
=
0.5
and he neu on
exci a ion
A,
aken as he bi u ca ion pa ame e , anes om
-20pA
o
20~A. All
o he pa ame e s we e ixed o he
alues p e iously ci ed. Clock equency was se o
500kHz.
All
hese measu emen s a e
in
ull
acco dance wi h he
heo e ical esul s.
Also,
gi en he educed a ea,
as
well as
ope a ing wi h only 3 powe supply, we belie e bo h
neu on implemen a ions a e e y app op ia e o high
densi y chao ic neu al ne wo ks
on
a
single chip.
RERERENCES
G.
Ma sumo o, K. Aiha a, Y. Hanyu,
N.
Takahashi,
S.
Yoshi-
zawa and
J.
Nagumo: “Chaos and Phase Locking
in
No mal
Squid Axons”.
Physics Le e s
A,
Vol. 123 pp. 162-166, Aug.
1987.
C. A. Ska da and W. J. F eeman: “How B ains make chaos
in
o de o make sense
o
he
wo ld’.
B ain and Beha io al
Science,
Vol.
10,
pp. 161-195, 1987.
K.
Aiha a, T. Takabe and M. Toyoda: “Chao ic Neu al Ne wo -
ks”.
Phys.
Le .
A,
Vol.
144.
pp. 333-340,
Ma .
1990.
502
(a)
Nagumo-Sa o Model
(b) Aiha a Model
Figu e
8
Bi u ca ion.diag ams.
J.
Nagumo and
S.
Sa o:
“On a Response Cha ac e is ic
o
a
Ma-
hema ical Neu on Model”.
Kybe ne ics,
Vol.
10. pp. 155-164.
1972.
K. Judd and K. Aiha a: “Neu al Ne wo ks and Chaos”.
P oc.
o
he
1992
IEEE In .
Synp.
on
Ci cui s and S?s ems.
pp.
2765-2768, May 1992.
M. lnoue and A. Nagayoshi:
“A
Chaos Neu o-Compu e ”.
M. Adachi e
al.:
“Nonlinea Associa i e Dynamics
in
a
Chao-
ic Neu al Ne wo k”.
P oc. o he 2nd In e na ional Con e en-
ce on
Fuzzy
Logic
&
Neu al Ne wo ks,
pp. 947-950.
Jul.
1992.
D.
L.
Bi x and
S.
J. Pipenbe g: “Chao ic Oscilla o s and Com-
plex Mapping Feed Fo wa d Ne wo ks (CMFFNS)
o
Signal
De ec ion
in
Noisy En i onmen s”.
ln . Join
Con
on
Nei ul
Ne wo ks,
Vol.11, pp. 881-888, Jun. 1992.
J.
B.
Hughes,
I.
C. Macbe h and D. M. Pa ullo: “Swi ched
Cu-
en s Fil e s”.
IEE P oceedings,
Vol. 137.
P .
G,
No.
2,
pp.
156-162, Ap il 1990.
Z.
Wang:
“Cu en -Mode Analog In eg a ed Ci cui s and
Li-
nea iza ion Techniques in CMOS Technology“.
Ha ung-Go e
Ve lag, Kons anz 1990.
E.A. Vi oz: “MOS T ansis o s Ope a ed
in
he La e al Bipola
Mode and Thei Applica ion
in
CMOS Technology”.
IEEE
J.
Solid-S a e Ci cui s,
Vol.
SC-18,
pp 273-279. 1983.
T.
Pan and A.A. Abidi: “A
50dB
Va iable Gain Ampli ie
Using he Pa asi ic
Bipola
T ansis o s
in
CMOS”.
IEEE
J.
So-
lid-s a e Ci cui s,
Vol. SC-24. pp 95 1-961, 1989.
Phy~. Le .
A,
V01.158, pp. 373-376, 1991.