Cu en -Mode Piecewise-Linea Func ion Gene a o s
Manuel Delgado-Res i u o, Joaquin Ceballos-Chce es, and Angel Rod iguez-Vhzquez
Cen o Nacional de Mic oelec 6nica (CNM)
Ed. CICA, A da. Reina Me cedes s/n
41012
-
Se ille, SPAIN.
Abs ac
-
We p esen a sys ema ic design echnique
o cu en -mode piecewise-linea
(PWL)
unc ion
gene a o s. I uses wo building blocks: a high- eso-
lu ion cu en ec i ie , and a p og ammable cu en
ampli ie . We show how o a ange hese blocks o
ob ain basic non-linea i ies om which gene ic cha -
ac e is ics a e buil h ough agg ega ions. Measu e-
men s om a l.Op.m CMOS p o o ype chip show
lOpA esolu ion in he ec i ica ion ope a ion and
0.6%
non-linea i y e o s
in
he p og ammable scal-
ing ope a ion o 2p.A inpu cu en ange.
1.In oduc ion
Func ion gene a o s
ealize pa ame izable non-
linea unc ions o gi en inpu signal ange [1]-[3].
The pa ame e iza ion may be de e mined by compo-
nen a ios
(non-p og ammable
gene a o s);
o
h ough ex e nal con ol signals and elec ically-ad-
jus able ci cui s
(p og ammable
gene a o s).
Ope a o s
1
I
I
In e connec- App oxima ion
ion
Law
Techniques
I
I
Ci cui P oblem
FIGURE
1.
Hie a chical decomposi ion o he syn hesis
o
unc ion gene a o s.
II.Piecewise Linea Rep esen a ions
--
-
Rega dless o he p og ammabili y issue, he de-
sign
o
elec onic unc ion gene a o s encompasses
se e al subp oblems (shown concep ually in Fig.
1):
.
Realiza ion
o
nonlinea
ope a o s
hough
he
in e connec ion o p imi i e componen s.
Realiza ion o
elemen a y unc ions
as he in e -
connec ion o ci cui blocks which syn hesize
nonlinea ope a o s.
o he a ge
as
a
combina ion
O
elemen a y unc ions and i s ealiza ion as he
in-
e connec ion o he ci cui blocks associa ed o
hese unc ions.
A numbe o epo ed solu ions
o
hese p oblems
employ
piecewise-linea
(PWL) app oximan unc-
ions
[4].
Thei main ad an age is simplici y o ep e-
sen a ion, which eases he calcula ion o he
adjus men pa ame e s. PWL unc ions a e also easily
ealized a a ci cui le el. In ac , di e se solu ion
ha e been p oposed pa ing om di e en p imi i e
componen s and assuming dis inc physical ep esen-
This
pape p esen s a me hodology o PWL ap-
p oxima ion o a bi a y unidimensional unc ions
(including hose wi h ini e jump discon inui ies)
us-
Many o he ci cui schemes p oposed o he im-
plemen a ion o PWL unc ion gene a o s a e based
on he concep o
ex ension
ope a o p esen ed in
PI.
Le us conside ha he unc ion
y
= (x)
is de ined in-
side a eal in e al
[&,,
&+,] and desc ibed by a col-
lec ion o da a measu ed a he
kno s
o a gi en
The basic idea behind he concep o an ex ension
ope a o is o build he app oxima e unc ion,
g(x),
ollowing an i e a i e p ocedu e. A each i e a ion,
he p ocedu e
om
a
p e ious app oxima ion
o
a
o (x)
,
and hen adds
new
e ms
o
i he da a associa ed wi h he adjacen subin e als.
Gene ally, some pieces a e adjus ed o he le and
o he s o he igh , o yield,
A
=
{60,
a,,
%,,..,jM
sN+,
1.
1=1
I
=
-N
whe e,
+
a ions o he elec ical a iables
[5]-[
101.
A
g(X)
=
WU+(X-@
GW(X-~).Y~~(X-~)
A-g
(x)
=
wu-
(x
-
6)
3
w
(x-6)
sgn
(6-x)
(2)
ing cu en mode echniques. Sec ion
11
discusses
some
PWL
ep esen a ion echniques, and p esen he
0
g
(x)
=
ax+b
basic non-linea i ies in ol ed. Sec ion
111
p esen s he
building blocks o he basic unc ions and desc ibes
some examples whe e he global opology o he gen-
e a o can be simpli ied by aking ad an age
o
sym-
me ies. sec ion
IV
shows expe imen al
ob ained om a chip which has been ab ica ed
in
a
ame e s
o
he ci cui a e elec ically con ollable
o
enable ully p og ammable ope a ion.
and
sgn(*)
deno es
he
sign
unc ion, Fig.2(a) shows
an example
o
his p ocedu e.
Based
on
he
ex ension ope a o , Chua and Kang
ha e de eloped a
canonical
ep esen a ion
o
unidi-
mensional
pm
unc ions
gi en
by
1pm s anda d digi al CMOS echnology. All he pa-
N
i=
1
g(x)
=
ax+b+
(3)
0-7803-3073-0/96/$5
.OO
@I996
IEEE
469
I
I
(a)
8
@)
FIGURE
2.
Piecewise linea decomposi ion
o
a
unc ion
(a)
using he ex ension ope a o concep , and
@)
using basic lin-
ea unc ions.
which in ol es only one non-linea i y, he
absolu e
alue
unc ion, wi h he addi ional ad an age ha i
equi es a minimal numbe o i ing pa ame e s
[9].
A di e en app oach o he ep esen a ion o
nonlinea unc ions
is
o exp ess he ans e cha ac-
e is ic as a linea combina ion o
basis
unc ions,
each ha ing compac suppo o e a co esponding
subin e al o he pa i ion. In he case o
PWL
unc-
ions, basis unc ions a e called
linea basis unc ions
(LBF), and lead o he ollowing exp ession,
(4)
Fig.3 shows he shape o he i h LBF, which equals
1
a
6i
and dec eases o
0
a
Fig.2(b) illus a es he ep esen a ion echnique
based on LBFs, using he same unc ion
(x)
used o
desc ibe
he
ex ension ope a o . No e ha he
LBF
ep esen a ion is mo e modula han he app oxima-
ion based on he ex ension ope a o . Howe e , his
modula i y is no o ee; hei implemen a ion
is
no
he cheapes in e ms o componen s and consequen -
ly,
may no be op imal o applica ions in which he
a ge unc ion is ixed. On he con a y, he ep esen-
a ion (4) is an excellen op ion
in
he design o ully
p og ammable unc ion gene a o s.
and
Si+*.
In.
Cu en -Mode Linea Basis Func ions
The p oposed design echnique o linea basis
unc ions is based on he in e connec ion
o
wo basic
building blocks:
cu en
swi ches
and
p og ammable
cu en ampli8e s.
Cu en Swi ch
Fig.4(a) and (b) show espec i ely he symbol
and schema ic o he cu en swi ch p oposed
in
[IO].
This block ou es he inpu cu en o ei he he uppe
o he lowe e minal depending on i s sign. Besides,
i
gene a es a logical signal
V,
which codi ies he cu -
en sign
(V,
=
'1
'
o
Zi,
>
0,
and
V,
=
'0'
o he wise).
The ci cui exhibi s e y high esolu ion (a ound
IOpA), and is insensi i e o ansis o misma ch.
Thus,
i
can be ealized h ough minimum size de ic-
(C)
FIGURE
4.
(a) Cu en swi ch symbol;
(b)
P oposal in
[lo];
(c) Al e na i e design using cu en mi o s and in e e s.
es. Addi ionally, he eedback loop c ea ed by
he
in-
e e
In l
allows signi ican educ ion o he dead
zone non-linea i y shown by he inpu d i ing-poin
cha ac e is ic, which alle ia e loading e o s
o
he
ci cui wi h he en i onmen .
An al e na i e design o he cu en swi ch is
shown
in
Fig.4(c). As opposed o he p e ious case,
posi i e (nega i e) cu en s a e now ou ed o he
lowe (uppe ) e minal, as a consequence o he mi -
o s included
in
he cu en pa h. Simula ion esul s
show ha he ci cui is especially sui ed o low ol -
age ope a ion (co ec pe o mance has been no ed o
supply ol ages
o
less han 2
V).
The main d awback
o his s uc u e
is
ha cu en s
I+
and
I-
a e a ec ed
by he misma ch o he ansis o s making up he cu -
en mi o s.
P og ammable Cu en Ampli e
Fig.S(a) shows he concep ual block diag am o a
p og ammable cu en ampli ie . I is o med by he
se ies connec ion o a g ounded esis o and a unable
linea ized ansconduc o . The schema ics
in
Fig.S(b)
(ou pu s age) and Fig.S(c) (co e block) o m he com-
ple e ci cui ampli ie . The g ounded esis o is eal-
ized h ough a pai o
p
channel ansis o s
in
diode
con igu a ion, connec ed
in
cascode wi h he ex e nal
nodes connec ed o he ails.
As
shown
in
FigS(c), he
linea
I-V
con e sion is done
in
he co e block. The
con igu a ion desc ibed
in
[
1
13
has been chosen o
he linea ized ansconduc o , in oducing some mod-
i ica ions o inc ease he gain adjus men ange. Fi s ,
he inpu
PMOS
di e en ial pai
in
[
1
I]
has been e-
placed by a
NMOS
pai and wo p-channel cascode
mi o s o inc ease he a ia ion ange o ol ages
VI
and
V,.
Nex , he
common-sou ce node
o
he
ou pu
di e en ial pai has been connec ed o a ol age ol-
lowe o e y low ou pu esis ance o supply a ai ly
cons an ol age d op,
V,.
On one hand, his ob ains
low cu en gain alues. On he o he , gi es an in-
c eased e iciency o he cu en lowing h ough he
ou pu s age. Finally a se o analog swi ches d i en
by he bina y signal
V,y
has been included
in
he ou pu
pai o de e mine he sign o he ou pu cu en ,
Using he quad a ic law o a
MOS
ansis o
in
sa u a ion, he gain
o
he
ampli ie eads as:
470
p-mi o
p-mi o
W$W
p-channel
cascode
mi o
p-channel
cascode
mi o
FIGURE
5.
P og ammable cu en ampli ie : (a) Concep ;
(b)
Ampli ie ou pu
s age;
(c) Co e block.
whe e he sign is de ined by he bina y signal
V,.
As
i is seen, he gain depends linea ly on he con ol
ol age
V,.
Co ec pe o mance en o ces he ollow-
ing condi ions on he elec ical a iables:
Cu en -Mode Basic Func ions
Fig.6(a) shows he block diag am o a
LBF
o med by h ee cu en swi ches, wo cu en ampli-
ie s, and ou analog swi ches
in
he ou pu s age.
No e ha he cen al cu en swi ch supplies he bina-
y
signal ha de e mines he sign
o
he cu en ampli-
ie s and he ou pu b anch h ough which
I,,,
lows.
The combina ion o cu en swi ches and ol age
ampli ie s also enables implemen ing he elemen a y
unc ions o he o he app oxima ion echniques ci -
ed in Sec ion
11.
Thus, Fig.6(b) shows an example o
ex ension ope a o cons uc ion and Fig.6(c), he eal-
iza ion o he absolu e alue unc ion.
Fig.6(d) shows he ealiza ion o a apezoidal
unc ion, equen ly used
as
a
membe ship+ unc ion
in
uzzy logic. No e ha ins ead o using wo linea basis
unc ion like hose in Fig.6(a), he unc ion symme y
enables educing he numbe o ci cui componen s.
Finally, Fig.6(e) shows an example o cons uc ion
o
unc ions wi h ini e jump discon inui y, aking ad-
an age o he bina y signal gene a ed by he cu en
swi ches, oge he wi h he logic ga es.
IV.Expe imen a1
Resul s
Fig.7 p esen s a mic opho og aph o he in eg a -
ed p o o ype o a p og ammable linea basis unc ion
ab ica ed
in
single poly
1
.Opm
CMOS
echnology.
The cu en swi ches used
in
he design a e shown
in
Fig,4(b). Fig,8(a) shows he ans e cha ac e is ics o
16
'in
-e*=
I*"
SI
s2
(e)
FIGURE
6.
Block diag ams
o :
(a) linea basis unc ion;
(b)
ex ension ope a o ; (c) absolu e alue;
(d)
apezoidal unc-
ion, and (e) discon inuous unc ion.
400
pm
FIGURE
7.
Mic opho og aph
o
he
ci cui .
he implemen ed cu en ampli ie . The ampli ie
gain anges om
0
o
25
o inpu linea i y be ween
lpAmP. This gain a ia ion is gi en by he con ol
signal adjus men ,
Vc,
whose alid ange is be ween
-
0.5
V and
1.3
V. Vol age
VF
and bias cu en we e
se a
-1.8
'V
and15 pAmps, espec i ely. Fig.8(b)
shows
he
de ia ions
o
he
linea
beha io
o
he
cu -
en ampli ie
o
di e en alues o con ol ol age
Vc.
The ela i e e o
in
all
cases was less han
0.6%.
Fig.9
shows
a g oup o expe imen al cu es o
he ans e unc ion o he whole ci cui , ob ained
h ough indi idual a ia ion o each o he He mi e
471
TI
-i
.
000
(a)
0.5
w
0.3
bo
h
9-9
E
y
0.1
2
-0.1
>
.“
I
-
-0.3
0.0
0.2
0.4
0.6
0.8
1.0
,
=
-0.5
,
=
0.2
V,
=
1.3
Inpu
Cu en
@Amp)
(b)
FIGURE
8.
Expe imen al esponse o a p og amable cu en
ampli ie .
(a) T ans e cha ac e is ic;
(b)
Nonlinea i y e o
o
di e en alues
o
he con ol a iable.
ope a o pa ame e s. Fig.9(a) ep esen s he a ia ion
o he heigh o he basis unc ion o di e en posi-
i e and nega i e alues o
I,.
Fig.9(b) shows he
cu e amily ob ained h ough a ia ion o
18,
main-
aining he es o he pa ame e s cons an . Fig.B(c)
and (d) show he a ia ion o he linea basis unc ion
slopes ob aining by adjus ing he gain o he co e-
sponding cu en ampli ie s.
V.Re e ences
Khachab, N.I. and Ismail, M., 1991, “Linea iza-
ion Techniques o n h-O de Senso Models in
MOS VLSI Technology”.
IEEE T ansac ions
on
Ci cui s and Sys ems,
ol. 38 (Decembe ), pp.
1439- 1449.
Fa a uso, J.W. and Meye , R.G., 1987.
“MOS
Analog Func ion Syn hesis”.
IEEE Jou nal
o
Solid-s a e Ci cui s,
ol. 22 (Decembe ), pp.
1059-1063.
Fa a uso, J.W. and Meye , R.G., 1985. “T ian-
gle- o-Sine Wa e Con e sion wi h MOS Tech-
nology”.
IEEE Jou nal
o
Solid-s a e Ci cui s,
Wa son, G.A., 1980.
“App oxima ion Theo y and
Nume ical Me hods”.
Wiley, New Yo k.
Sheingold,
D.H.,
1976.
“Nonlinea Ci cui s
Handbook”.
Analog De ices Inc., No wood.
Sanchez-Sinencio,
E.,
Rami ez-Angulo,
J.,
Lina es-Ba anco, B. and Rod iguez-V izquez,
A., 1989. “Ope a ional T ansconduc ance Am-
pli ie -Based Nonlinea Func ion Syn hesis”.
IEEE Jou nal
o
Solid-s a e Ci cui s,
ol.
24
(Decembe ), pp.
1576-1586.
Liu,
S.-I.,
Wu,
D.-S.,
Tsao, H.-W., Wu
J.
and
Tsay, J.-H., 1993. “Nonlinea Ci cui Applica-
ion wi h Cu en Con eyo ”.
IEE
P oceedings-
G,
ol. 140 (Feb ua y), pp. 1-6.
Rod iguez-VBzquez,
A.,
Delgado-Res i u o, M.,
Hue as, J.L. and Vidal, F., 1995. “Syn hesis and
Design o Nonlinea Ci cui s”. chap e
32
in
The
ol.
20
(Ap il), pp. 623-631.
Ci cui s and Fil e s Handbook
(W.K. Chen),
CRC P ess
-
IEEE
P ess, Boca Ra bn.
[9] Chua, L.O. and Kang, S.M., 1977. “Sec ion-
Wise Piecewise-Linea Func ions: Canonical
Rep esen a ion, P ope ies and Applica ions”.
P oceedings
o
he IEEE,
ol. 67 (June),
pp.
915-
929.
[
10]A. Rod iguez-VBzquez and M. Delgado-Res i u-
o, 1994. “Gene a ion o Chao ic Signals Using
Cu en -Mode Techniques”.
Jou nal
o
In elli-
gen
&
Fuzzy Sys ems,
ol. 2,
No.
1, pp. 15-37.
[llIKlumpe ink,
E.,
Zwan,
E.
.d. and See inck,
E.,
1989. “CMOS Va iable T ansconduc ance Ci -
cui wi h Cons an Bandwid h”.
Elec onic
Le -
e s,
ol. 25 (May), pp. 675-676.
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FIGURE
9.
Expe imen al
esul s
ob ained om he in e-
g a ed p o o ype: (a) Va ia ion wi h
I,;
(b) Va ia ion wi h
Is;
(c)
and
(d)
Va ia ion wi h slopes.
472