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Multi-bit cascade ΣΔ modulator for high-speed A/D conversion with reduced sensitivity to DAC errors

Abstract

This paper presents a ΣΔ modulator (ΣΔM) which combines single-bit and multi-bit quantization in a cascade architecture to obtain high resolution with low oversampling ratio. It is less sensitive to the non-linearity of the DAC than those previously reported, thus enabling the use of very simple analog circuitry with neither calibration nor trimming required.

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Multi-bit cascade ΣΔ modulator for high-speed A/D conversion with reduced sensitivity to DAC errors

Author: Medeiro Hidalgo, Fernando; Pérez Verdú, Belén; Rosa Utrera, José Manuel de la; Rodríguez Vázquez, Ángel Benito
Publisher: Institute of Electrical and Electronics Engineers
Year: 1998
DOI: 10.1049/el:19980270
Source: https://idus.us.es/bitstreams/cbe65b04-d049-4ba7-83f0-029a90e07cab/download
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Mul i-bi Cascade ΣΔ Modula o o High-Speed A/D Con e sion wi h
Reduced Sensi i i y o DAC E o s
Indexing e ms: Mul i-bi ΣΔ Modula o s, High-speed, high- esolu ion A/D con e sion.
This pape p esen s a ΣΔ modula o (ΣΔM) which combines single-bi and mul i-bi
quan iza ion in a cascade a chi ec u e o ob ain high esolu ion wi h low o e sampling
a io. I is less sensi i e o he non-linea i y o he DAC han hose p e iously epo ed,
hus enabling he use o e y simple analog ci cui y wi h nei he calib a ion no im-
ming equi ed.
In oduc ion: A p esen , he e is an inc eased in e es in he use o ΣΔ con e sion
in mixed-signal CMOS elecom chips [1]. New a chi ec u es a e equi ed o achie e
high esolu ion wi h low o e sampling a io M. Two non-exclusi e s a egies can
be adop ed o his end [2]: high-o de il e ing o he quan iza ion noise, and mul i-
bi (MB) quan iza ion. They make he in-band quan iza ion noise powe
in e sely p opo ional o, espec i ely, ( = il e o de ) and
( =numbe o bi s in he in e nal quan ize ). Examples o low-o e sampling a io
ΣΔM's using bo h s a egies a e epo ed elsewhe e [2]-[7].
These ad anced a chi ec u es a e g ouped acco ding o he echniques used o:
a) gua an ee s able ope a ion o he high-o de il e ; b) a enua e he e o s due o
he MB DAC non-linea i y. A common s a egy o he la e case in ol es using
calib a ion [2][3][5], while he o me equi emen can be sol ed h ough he p ope
choice o scaling ac o s o ese ing ci cui y [2][3]. Howe e , some a chi ec u es
o e come hese p oblems wi h nei he calib a ion no ese ing equi ed. The basic
idea consis s o : i s , pe o ming he high-o de il e ing h ough a cascade s uc u e
o gua an ee uncondi ional s abili y o any inpu le el and ini ial condi ion
[4][6][7]; secondly, using MB quan iza ion only a he las s age o he cascade o
a enua e he in luence o he MB DAC non-linea i y [6][7].
P e ious MB cascade ΣΔM's [6][7] a e in ended o a enua e he DAC e o
powe by a ac o . The a chi ec u e in his Le e ob ains a a enua ion
PQ
M2L1+
L
2b1–()
2
b
M5
M7
© IET (The Ins i u ion o Enginee ing and Technology). This ma e ial is p esen ed o
ensu e imely dissemina ion o schola ly and echnical wo k. Copy igh and all igh s he ein
a e e ained by au ho s o by o he copy igh holde s. All pe sons copying his in o ma ion
a e expec ed o adhe e o he e ms and cons ain s in oked by each au ho 's copy igh . In
mos cases, hese wo ks may no be epos ed wi hou he explici pe mission o he
copy igh holde .
2 o 9
ac o . We show ha his can be achie ed h ough p ope choice o he a chi ec u e
coe icien s and ha he deg ada ion due o misma ch is ole able o up o .
Hence, his modula o is easible o ob aining up o 13-bi esolu ion wi h
o e sampling a ios as low as 16.
Modula o a chi ec u e: Fig. 1 shows a gene ic dual-quan iza ion N-s age cascade
ΣΔM [8]. I includes single-bi quan iza ion in all he s ages excep in he las one
which inco po a es a MB quan ize . A e digi al cancella ion o he quan iza ion
e o o he o me , he ollowing is ob ained o he Z-domain ou pu :
(1)
whe e is he Z- ans o m o he modula o inpu , is an scala la ge han
uni y (needed o p e en o e loading in he cascade), is he las s age
quan iza ion e o , is he e o induced in he las s age DAC, and
. No e ha is -o de shaped, which may
signi ican ly educe he linea i y equi emen o he DAC.
Based on his idea, wo MB ΣΔM a chi ec u es ha e been p oposed. The one in
[6] uses a 2-s age 2-1 cascade ( ), while he one in [7] uses a 2-
s age 2-2 cascade ( ). In bo h cases, ollowing (1), is 2nd-
o de shaped. Wi h he same p inciple, Fig. 2 shows a no el MB cascade ΣΔM
a chi ec u e ha be e exploi s he dual-quan iza ion echnique. I is a 3-s age 2-1-
1 cascade ( ) wi h single-bi quan iza ion in he i s wo
s ages and MB quan iza ion in he las one. Table 1 shows he ans e unc ions o
he digi al blocks in Fig. 2 and he ela ionships be ween analog and digi al
coe icien ha cancel he quan iza ion noise in he i s wo s ages. The analog
coe icien s (in eg a o weigh s) mus be p ope ly chosen o a oid p ema u e
o e loading o he s ages in he loop and maximize he dynamic ange (DR). We
p opose he ollowing:
, so
ha , . Such a choice can be ealized by using
b3=
Yz() Xz()zLT
–d1z1–
–()
LTENz() d1z1–
–()
LTLN
–()
EDz()++=
Xz()
d
ENz()
EDz()
LTL1…LN
++=
EDz()
LTLN
–() h
L12= L2
,1=
L12= L2
,2=
EDz()
L12= L2
,1= L3
,1=
g1g1' 0,25,==
g2g3
=g4'g4'' 1 g2',g3'g3'' 0,5,== = == =
g42=
d01–=
d12d2
,0d3
,2===
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only 2-b anch SC in eg a o s wi h educed ou pu swing and dynamic equi emen s.
A e digi al cancella ion, he Z-domain modula o ou pu esul s:
(2)
No e ha he DAC e o s a e 3 d-o de shaped. Thus, he in-band noise powe
a he modula o ou pu esul s:
(3)
whe e and ep esen he powe o he las s age quan iza ion and DAC
e o , espec i ely. The la e con ibu ion is a enua ed by (ins ead o as
in [6][7]).
In luence o O he Non-Ideali ies: In p ac ice, in eg a o weigh misma ch and ini e
DC-gain p oduce incomple e cancella ion o he quan iza ion noise in he i s s ages
o he cascade, hus deg ading he signal- o-(noise+dis o ion) a io (SNDR). This
imposes an uppe limi on he use ul esolu ion o he las s age quan ize . Abo e
his limi , he bene i s o ine quan iza ion in he las s age may be masked by he
un-cancelled po ion o he quan iza ion noise o he p e ious s ages. Fig. 3 shows
he hal -scale SNDR ob ained by beha iou al simula ion o he new modula o as
a unc ion o he las quan ize esolu ion. These simula ions include in eg a o
weigh misma ch (sigma = 0.1%) and ini e DC-gain (1000); acco ding o hem,
using quan ize s wi h mo e han 3-bi esolu ion does no make sense. Howe e ,
his is enough o signi ican ly educe he equi ed o e sampling a io espec o he
single-bi case. Fig. 4 compa es he wo s -case SNDR (sigma = 0.1%) as a unc ion
o he inpu le el o he 2-1-1 3bi ΣΔM wi h ha o hose in [6][7], always using
op imized in eg a o weigh s; o comple eness, we also make a compa ison wi h
he 2-1-1 single-bi . Compa ed o he 4 h-o de a chi ec u es, he new one ea u es
he la ges DR wi h he lowes o e sampling a io. Pa icula ly, o each simila
pe o mance wi h he single-bi app oach, M mus be a leas 24.
In summa y, because he new a chi ec u e ole a es he analog non-ideali ies o
3-bi quan iza ion (wi h no calib a ion needed), i is easible o high- equency ΣΔ
Yz() z4– Xz() 21 z1–
–()
4E3z() 21 z1–
–()
3EDz()++=
P2-1-1MB 4σQ
2π8
9M9
---------- σD
2π6
7M7
----------+
⎝⎠
⎛⎞
=
σQ
2
σD
2
M7
M5
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ADC's wi h low o e sampling a io and, hence, low-powe consump ion.
Acknowledgmen : This wo k has been suppo ed by Spanish C.I.C.Y.T. unde
con ac TIC97-0580.
F. Medei o
B. Pé ez-Ve dú
J.M. de la Rosa
A. Rod íguez-Vázquez
Ins i u o de Mic oelec ónica de Se illa - C.S.I.C
Edi icio CICA-CNM
A da. Reina Me cedes s/n
41012-Se illa, SPAIN
Re e ences
1 CHAN, Z-Y, MACQ, D., HASPESLAGH, D., SPRUYT, P. and GOFFART, B.: “A
CMOS analog on -end ci cui o an FDM-based ADSL sys em”, IEEE Jou nal
o Solid-S a e Ci cui s, 1995, SC-30, (4), pp. 1449-1456
2 NORSWORTHY, S.R., SCHREIER, R. and TEMES G.C. (Edi o s): Del a-Sigma
Da a Con e e s: Theo y, Design and Simula ion, IEEE P ess, New Yo k, 1997
3 BAIRD, R.T., and FIEZ, T.S.: “A Low O e sampling Ra io 14-b 500-kHz ΔΣ ADC
wi h a Sel -Calib a ed Mul ibi DAC”, IEEE Jou nal o Solid-S a e Ci cui s, 1996,
SC-31, (3), pp. 312-320
4 MARQUES, A., PELUSO, V., STEYAERT, M. and SANSEN, W.: “A 15-bi 2 MHz
Nyquis Ra e ΔΣ ADC in a 1μm CMOS Technology”, P oc. ESSCIRC'97, 1997, pp.
68-71
5 CHEN, F., and LEUNG, B.H.: “A High esolu ion Mul ibi Sigma-Del a Modula o
wi h Indi idual Le el A e aging”, IEEE Jou nal o Solid-S a e Ci cui s, 1995, SC-
30, (4), pp. 453-460
6 BRANDT, F., and WOOLEY, B. A.: “A 50-MHz mul ibi ΣΔ modula o o 12-b 2-
MHz A/D con e sion”, IEEE Jou nal o Solid-S a e Ci cui s, 1991, SC-26, pp. 1746-
1756
7 TAN, N., and ERIKSSON, S.: “4 h-o de 2-s age Δ−Σ modula o using bo h 1 bi
and mul ibi quan ize s”, Elec onics Le e s., 1993, 29, pp. 937-938
8 DIAS, V.F., and LIBERALI, V.: “Cascade Pseudomul ibi Noise Shaping
5 o 9
LIST OF CAPTIONS:
Figu es:
Fig. 1 Gene ic dual-quan iza ion N-s age cascade ΣΔM
Fig. 2 Block diag am o he 2-1-1 cascade MB ΣΔM
Fig. 3 SNDR s. las quan ize esolu ion in p esence o non-ideali ies
Fig. 4 Wo s -case SNDR s. inpu le el in p esence o capaci o misma ch and
ini e in eg a o DC-gain
Tables:
Table 1: Coe icien ela ionships in Fig. 2

6 o 9
Modula o s', IEE P oceedings.-G, 1993, 140, pp. 237-246
ΣΔ1
ΣΔ2
ΣΔN
L1
L2
LN
Y1
Y2
YN
X2
X3
XN
X
Y
CANCELATION LOGIC
E1
E2
EN
Q
1-Bi
Q
b-Bi
Q
1-Bi
Fig. 1 Gene ic dual-quan iza ion N-s age cascade ΣΔM
7 o 9
Y1
XE1
g2
−g2'
g1
−g1'
D/A
g3
g3'
g3''
−
−Y2
E2
D/A
H1(z)
+
+
d1
d0
−
g4
g4'
g4''
−
−Y3
E3
d3+
Y
+
d2
A/D
b-Bi
D/A
b-Bi b
b
ED
H2(z)
H3(z)
H4(z)
Fig. 2 Block diag am o he 2-1-1 cascade MB ΣΔM
−
Cancella ion Logic
8 o 9
Las quan ize esolu ion (bi )
Hal -scale SNDR (dB)
Fig. 3 SNDR s. las quan ize esolu ion in p esence o non-ideali ies
123456
65
70
75
80
85
90
Ideal
Wi h e o s
Fig. 4 Wo s -case SNDR s. inpu le el in p esence o capaci o misma ch and
ini e in eg a o DC-gain
-90 -80 -70 -60 -50 -40 -30 -20 -10 0
Inpu / Re e ence (dB)
0
10
20
30
40
50
60
70
80
90
SNDR (dB)
2-1-1, 3bi , M = 16
2-1-1, M = 24
2-1, 3bi , M = 24
2-2, 3bi , M = 16
INL = 1%FS
Weigh misma ch = 0.1%
DC-gain = 1000
9 o 9
Table 1: Coe icien ela ionships in Fig. 2
Digi al Digi al/Analog Analog
H1z() z1–
=
d01g3'g1g2g3
()⁄–=
g1'g1
=
H2z() 1z1–
–()
2
=
d1g3'' g1g2g3
()⁄=
g2'2g1'g2
=
H3z() z1–
=
d20=
g4'g3''g4
=
H4z() 1z1–
–()
4
=
d3g4'' g1g2g3g4
()⁄=