Electronically and Independently Controllable Quadrature Sinusoidal Oscillator with Low Output Impedances

THEORETICAL AND APPLIED ELECTRICAL ENGINEERING VOLUME: 20 |NUMBER: 3 |2022 |SEPTEMBER Electronically and Independently Controllable Quadrature Sinusoidal Oscillator with Low Output Impedances Adisorn KWAWSIBSAM 1, Danupat DUANGMALAI 2, Sittisak YEEYOUN 1, Winai JAIKLA3 1Department of Pre-Engineering, Faculty of College of Integrated Science and Technology, Rajamangala University of Technology Lanna, Doisaket District, Chiang Mai 50220, Thailand 2Department of Electronics, Faculty of Engineering, Nakhon Phanom University, 103 Moo.3, Chayangkul Road, Khamthao Sub-district, Muang District, 48000 Nakhon Phanom, Thailand 3Department of Engineering Education, School of Industrial Education, King Mongkut’s Institute of Technology Ladkrabang, 10520 Bangkok, Thailand [email protected], dan[email protected], [email protected], [email protected] DOI: 10.15598/aeee.v20i3.4513 Article history: Received Mar 22, 2022; Revised Jun 08, 2022; Accepted Jun 27, 2022; Published Sep 30, 2022. This is an open access article under the BY-CC license. Abstract. This work presents the quadrature sinusoidal oscillator using two Voltage DifferencingDifferential Input Buffered Amplifiers (VD-DIBAs), two resistors, and two capacitors. The VD-DIBA is an electronically controllable active building block with high input and low output impedances that can connect to other circuits directly without the buffers. With these distinguished features, the VD-DIBA is employed in this design. The proposed oscillator can produce two sine waves with a phase shift of 90 degrees. Over the entire tuning frequency range, the magnitude of the quadrature output voltages is constant. The proposed oscillator is independently adjustable in terms of frequency and oscillation condition. Moreover, the frequency of oscillation can be electronically and linearly adjusted by the bias currents. The condition of oscillation is adjustable by resistors, R1and R2. The performances of the proposed quadrature oscillator are tested through the PSpice simulation and the experiment. In the simulation, the VD-DIBA is built from the 0.18 µm Taiwan Semiconductor Manufacturing Company (TSMC) CMOS process with ±0.9V supply voltages. In the experiment, the VD-DIBA is implemented using the commercial ICs, LM13700, and AD830 with ±5V supply voltages. The simulated Total Harmonic Distortion (THD) values of the output voltages, Vo1and Vo2at f0= 1.03 MHz are 1.63 %and 1.81 %, respectively. The experimental THD values of the output voltages, Vo1and Vo2at f0= 536.6kHz, are 1.43 %and 1.00 %, respectively. Keywords AD830, electronical controllability, VD-DIBA, LM13700, quadrature sinusoidal oscillator, 0.18 µm TSMC CMOS. 1. Introduction A sinusoidal oscillator that provides two output signals with a 90◦phase difference is known as a “quadrature sinusoidal oscillator”. It is a fundamental circuit that is important in electrical engineering systems. Many applications need the quadrature sinusoidal oscillator as the sub-circuit, such as electrical measuring systems, medical equipment, audio-visual system, signal processing system, communication, and telecommunication [1] and [2]. Numerous researchers have attempted to design a sinusoidal oscillator using several kinds of active building blocks. The use of active building blocks in the circuit design is convenient and flexible when it is compared with using the BJT or CMOS transistors. Moreover, using the active building block in the circuit design requires a few passive elements which are easy to analyse for finding out the equation of the circuit parameters. Literature [3] and [4] now recognizes the benefits, applications, and utility of a newly introduced active ©2022 ADVANCES IN ELECTRICAL AND ELECTRONIC ENGINEERING 304 THEORETICAL AND APPLIED ELECTRICAL ENGINEERING VOLUME: 20 |NUMBER: 3 |2022 |SEPTEMBER Tab. 1: The comparison of the sinusoidal oscillators using VD-DIBA. Ref. No. of VD-DIBA No. of passive element Low output impedance at all output nodes Quadrature waveform Independent control of frequency and condition Linearly and electronically adjustable frequency Experiment [13] 2 3 Yes No Orthogonal Yes No [14] 1 4 Yes No Orthogonal No No [15] 2 4 Yes No Yes No No [16] 2 2 No Yes Yes Yes Yes [17] 1 4 Yes No Orthogonal No No [18] 2 3 No∗Yes Orthogonal No No Proposed 2 4 Yes Yes Yes Yes Yes ∗In [18], output voltage node, Vo2is not low impedance. building block called Voltage Differencing-Differential Input Buffered Amplifier (VD-DIBA). The VD-DIBA is the electronically controllable active function block with high impedance at input voltage terminals and low impedance at an output voltage terminal. Moreover, the voltage differencing unit at the output section of VD-DIBA is very useful for designing the voltage mode circuit without using an external voltage subtracting circuit. With these distinguished features, the VD-DIBA is employed to design the quadrature sinusoidal oscillator in this work. In our literature review, several analogue circuit designs using VD-DIBA have been proposed [5], [6], [7], [8], [9], [10], [11], [12], [13] and [14]; for example, inductance simulator [5] and [6], voltage-mode first-order all-pass filter [7] and [8], voltage-mode biquad filter [9], [10], [11] and [12], and sinusoidal oscillators [13], [14], [15], [16], [17] and [18]. Herein, the review of sinusoidal oscillators [13], [14], [15], [16], [17], [18] using VD-DIBA as the active building block is given. The simple sinusoidal oscillator with a single VD-DIBA is proposed in [14] and [15]. The oscillators in [13], [14], [15], [16] and [17] use grounded capacitors which is attractive from an integration point of view. The proposed oscillators in [15] and [16], are adjustable independently of frequency and oscillation frequency. The frequency of the oscillator proposed in [13] and [16] is linearly and electronically tuned. However, there are some drawbacks existing from those oscillators. The oscillators in [13], [14], [15] and [17] cannot provide the quadrature output waveform. The output voltage nodes of the quadrature oscillators in [18] are not low in impedance. The proposed oscillators in [13], [14], [17] and [18] are not adjustable independently of frequency and oscillation frequency. The frequency of the oscillators in [14], [15], [17] and [18] is not linearly and electronically controlled. Table 1 shows the comparison of the sinusoidal oscillators using VD-DIBA. In this study, our attention is focused on the design of the quadrature sinusoidal oscillator employing two VD-DIBAs, with two resistors and two capacitors. The circuit can generate sinusoidal signals with a 90-degree phase difference. The conditions and frequency can be adjusted independently, and especially the frequency of the wave can be adjusted linearly and electronically. The workability of the circuit is verified by PSpice simulation and experiment in a laboratory using VD-DIBAs constructed from the 0.18 µm TSMC CMOS process (simulation) and the commercial IC LM13700 and AD830 (experiment). 2. Theories and Principle 2.1. VD-DIBA The VD-DIBA’s circuit symbol is shown in Fig. 1 which consists of two parts, the transconductance amplifier and the unity gain voltage differencing amplifier. At the first part, the input voltage terminals V+ and V−and the output current terminal Zhave high impedance. The transconductance, gmof the first part is adjustable by controlling the bias current, IB. In the second part, the input voltage terminals, Vand Z are high impedance. While, the output voltage terminal, Wis low impedance. The equivalent schematic of VD-DIBA is illustrated in Fig. 2. The input and output relationship of VD-DIBA is shown in Eq. (1).       Iv+ Iv− Iz Iv Vw       =      0 0 0 0 0 0 0 0 0 0 gm−gm0 0 0 0 0 0 0 0 0 0 −110             Vv+ Vv− Vz Vv Iw       .(1) V V V V v I v I Z V z I v I z V v V w I w V B I VD DIBA W Fig. 1: Symbol of VD-DIBA. ©2022 ADVANCES IN ELECTRICAL AND ELECTRONIC ENGINEERING 305 THEORETICAL AND APPLIED ELECTRICAL ENGINEERING VOLUME: 20 |NUMBER: 3 |2022 |SEPTEMBER The internal construction of VD-DIBA realized from the CMOS transistors is depicted in Fig. 3. It is found that the transconductance amplifier is constructed from the MOS transistors, M1–M8, and the unity gain voltage differencing amplifier, which is modified from the Differential Difference Current Conveyor (DDCC) [19], is constructed from the MOS transistors, M9–M18. With this structure, the gmis electronically adjusted by the bias current (IB) as depicted in Eq. (2). gm=rµnCox W LIB,(2) where µnis the electron mobility, Cox is the oxide capacitance, and W/L is the aspect ratio of MOS M1and M2channel width and length. V V z V v V w V ( ) ( )m g V V   vz VV Fig. 2: Electrical equivalent schematic of VD-DIBA. The VD-DIBA implemented from the commercially available ICs is cost-effective and easier to implement. In this design, the VD-DIBA is implemented from the commercially available ICs, LM13700 by Texas Instruments [20], and AD830 by Analog Devices [21] as shown in Fig. 4. For LM13700, the gm for this VD-DIBA structure is given in Eq. (3). gm=IB 2VT (3) where VTis the thermal voltage. M1 VSS M2 VDD VB IB M3M6 v+zw M4M5 M14 M15 vM16 M17 M7M8M9 M10 M11 M12 M13 M18 v Fig. 3: CMOS transistor implementation of VD-DIBA. [19] + -+ - m g md gV Feedback 1 w V 830AD 13700LM z V v V B I V V d V VD DIBA Fig. 4: Commercially available ICs implementation of VD-DIBA. 2.2. Proposed Circuit In this paper, a VD-DIBA-based voltage-mode firstorder all-pass filter [8] and a lossless integrator are utilized to construct the quadrature sinusoidal oscillator circuit. As shown in Fig. 5, both a first-order all-pass filter and a lossless integrator are realized using VD-DIBA as the active building block. The first-order all-pass filter consists of the components VD-DIBA1, C1, and R1,R2. The lossless integrator is constructed from VD-DIBA2 and C2, which is grounded. Circuit structure in Fig. 5 reveals that the output voltage nodes Vo1 and Vo2are at the low impedance output voltage nodes W1and W2, respectively. Therefore, they can be connected directly to other circuits without the need for a buffer circuit. V V Z V W V V Z V W 1 C 1 R 2 R 2 C 2o V 1o V 1B I 2B I 1 VD DIBA 2 VD DIBA Fig. 5: The proposed quadrature sinusoidal oscillator. The characteristic equation of the proposed quadrature sinusoidal oscillator shown in Fig. 5 is given in Eq. (4). s2C1C2+sC2gm1−sC1gm2 R1 R2 +gm1gm2= 0. (4) If gm=gm1=gm2and C=C1=C2, the Frequency of Oscillation (FO) of the second order characteristic ©2022 ADVANCES IN ELECTRICAL AND ELECTRONIC ENGINEERING 306 THEORETICAL AND APPLIED ELECTRICAL ENGINEERING VOLUME: 20 |NUMBER: 3 |2022 |SEPTEMBER equation is given as: ω0=gm C.(5) Also, the Condition of Oscillation (CO) of the second-order characteristic equation is given by: R1 R2 ≥1.(6) From Eq. (5) and Eq. (6), the FO and CO of the proposed quadrature oscillator can be independently adjusted. Additionally, the frequency of oscillation can be linearly and electronically controlled. For amplitude stabilization, the resistor R2can be easily realized from a photoresistor. This device is a part of the 3WK16341 (optocoupler with photoresistor) [23]. More details of the amplitude stabilization using 3WK16341 can be seen in [24] and [25]. The circuit in Fig. 5 gives the voltage ratio of Vo2and Vo1as shown in Eq. (7). Vo2(s) Vo1(s)=−gm sC .(7) It is found from Eq. (7) that the phase difference of output voltages Vo2and Vo1is 90◦when phase of Vo2leads phase of Vo1. At the frequency of oscillation (ω=ω0), the magnitude voltage ratio of Vo2and Vo1 in Eq. (7) becomes  Vo2 Vo1ω=ω0 =gm ω0C.(8) Substituting the frequency of oscillation, ω0depicted in Eq. (5) into Eq. (8), the magnitude ratio of Vo2and Vo1is unity as shown in Eq. (9).  Vo2 Vo1ω=ω0 = 1.(9) Equation (9) revealed that if C1=C2and the frequency of oscillation is tuned by simultaneously changing gm1and gm2(IB1=IB2), the amplitude of the output voltages, Vo2and Vo1is equal over the tuning frequency range. 3. Non-Ideal Study In this section, the effect of the non-ideal properties of VD-DIBA on the oscillator performance is considered. The non-ideal properties of VD-DIBA can be expressed in Eq. (10).       Iv+ Iv− Iz Iv Vw       =      0 0 0 0 0 0 0 0 0 0 gm−gm0 0 0 0 0 0 0 0 0 0 −βz−βv0             Vv+ Vv− Vz Vv Iw       . (10) In Eq. (10), βzis the voltage gain error from z to wterminal and the βvis the voltage gain error from v to wterminal. Considering those voltage gain errors, the characteristic equation of the proposed oscillator is shown in Eq. (11).                    s2C1C2R1 R2 (1 −βv1)+1+ +sC2gm1R1 R2 (1 −βv1)+1+ +sC1gm2βv1βz2−βz1βz2 R1 R2 −βz1βz2+ +βv1βz2gm1gm2                    = 0. (11) If gm=gm1=gm2and C=C1=C2, the frequency of oscillation of the second-order characteristic equation in Eq. (11) is given by: ω0=gm Csβv1βz2R2 R1(1 −βv1+R2).(12) Also, the condition of oscillation of the second-order characteristic equation in Eq. (11) is given by: R1 R2 ≥1 + βv1βz2−βz1βz2 βv1+βz1βz2−1.(13) It is found that the voltage gain errors affect both the oscillation frequency and condition frequency. © 2021 ADVANCES IN ELECTRICAL AND ELECTRONIC ENGINEERING 4 2 1 1 2 1 v z z R     It is found that the voltage gain errors affect both the oscillation frequency and condition frequency. V V Z V VD DIBA V V Z V VD DIBA 1 C 1 R 2 R 1 2 1B I 2B I 1 W 2 W 1W R 1V Y 1 Y 1W R 2W R 2o V 1o V 2 Y 2 Y PSPICE is used to be the tool for simulating the workability of the proposed quadrature sinusoidal Fig. 6: Parasitic elements in the proposed circuit. The influence of the parasitic elements in VD-DIBAs on the performance of the proposed quadrature oscillator is also studied. Figure 6 shows the involvement of parasitic elements in the proposed circuit. For easy analysis of the proposed circuit, the parallel of the parasitic element is considered as the admittance, where the admittances, Y1,YV1,Y2+, and Y2appeared in Fig. 6 are defined as follows: Y1=s(C−1+CZ1) + G−1+GZ1, YV1=sCV1+GV1, Y2+ =sC+2 +G+2, Y2=s(C2+CZ2) + GZ2, (14) where G−1= 1/R−1,GZ1= 1/RZ1,GV1= 1/RV1, G+2 = 1/R+2 and GZ2= 1/RZ2. ©2022 ADVANCES IN ELECTRICAL AND ELECTRONIC ENGINEERING 307 THEORETICAL AND APPLIED ELECTRICAL ENGINEERING VOLUME: 20 |NUMBER: 3 |2022 |SEPTEMBER If R1and R2are much less than R−1,RZ1, RV1,R+2 RZ2, and the operational frequency of the proposed quadrature oscillator is much less than 1/[2πCV1(R1//R2)],1/[2πC1(RW2//R1)] and 1/[2πC + 2(RW1//R2)], the characteristic equation of the proposed quadrature oscillator is given by:                  s2C∗ 2(C1+C−1) + +sC∗ 2G−1+C−1GZ2+C1GZ2+ +C∗ 2gm1+C−1gm2−C1gm2 R1 R2+ +G−1GZ2+G−1gm2+gm1gm2                  = 0,(15) where C∗ 2=C2+CZ2. The frequency and condition of oscillation of the second-order characteristic equation in Eq. (15) are given by: ω0=G−1GZ2+G−1gm2+gm1gm2 C∗ 2(C1+C−1).(16) and C1gm2 R1 R2 ≥C∗ 2G−1+C−1GZ2+C1GZ2+ +C∗ 2gm1+C−1gm1. (17) It is found that the parasitic element in VD-DIBA affects the frequency and condition of oscillation as well as the operating limitation at high frequency. It is also noted that R1and R2should be low for getting a higher frequency of operation. 4. Simulated Results PSPICE is used to be the tool for simulating the workability of the proposed quadrature sinusoidal oscillator shown in Fig. 5. The simulation is carried out by using the VD-DIBA constructed from the CMOS transistors as shown in Fig. 3. The CMOS model parameters are offered by 0.18 µm TSMC technology in level 7 [22]. The power supply is ±0.9V, VB= 0.23 V and IB1=IB2= 22 µA (gm1=gm2= 80 µS). The aspect ratios (W/L) of MOS transistors, M1–M2, M3–M6, M7–M13, M14–M15 and M16–M18 are respectively chosen as: 2.4 µm/1.8 µm, 3.6 µm/1.8 µm, 40.5 µm/0.54 µm, 2.4 µm/1.8 µm and 13.5 µm/0.54 µm. The passive elements are chosen as: C1=C2= 12 pF, R1= 1.075 kΩ,R2= 1 kΩ. The simulation illustrated in Fig. 6 is the sinusoidal output waveform in the initial state until steady state. It is found that the sinusoidal signal has entered a steady state after t≈200 µs. The quadrature sinewave at a steady state is shown in Fig. 7. It is found that the amplitudes of sinusoidal output voltages, Vo1and Vo2are 162.01 mVp−pand 160.17 mVp−p, respectively. The simulated magnitude ratio of Vo2 and Vo1is 0.988 (1.2 %error) which is closed to unity as depicted in Eq. (9). The phase of the sinusoidal output voltage Vo2leads the phase of the sinusoidal output voltage Vo1by 89.41◦(0.65 %error) which is consistent with the theoretical analysis as depicted in Eq. (7). The simulated f0is 1.03 MHz (2.64 %error). The THDs of the sinusoidal output voltages, Vo1and Vo2are 1.63 %and 1.81 %, respectively. Figure 9 shows the output spectrum of the sinusoidal output voltages Vo1and Vo2. Time (µs) 050 100 150 200 250 300 -0.1 0 0.1 Voltage (V) Fig. 7: Output response during initial state. Time (µs) 294 295 296 297 298 299 300 -0.1 0 0.1 Voltage (V) Vo2 Vo1 Fig. 8: Quadrature sinusoidal waveform. Frequency (MHz) 0 1.0 2.0 3.0 4.0 5.0 6.0 7.0 8.0 9.0 10.0 -120 -80 -40 0 Voltage (dB) -33.79dB Vo2 Vo1 Fig. 9: Simulation result of the output spectrum. The plot of theoretical and simulated f0against the bias current is shown in Fig. 10. In this simulation, the bias current (IB1=IB2=IB) is varied from 10 µA to 80 µA. With these variations of the bias current, the simulated f0is adjusted from 0.71 MHz to 1.72 MHz which is consistent with the theoretical analysis as depicted in Eq. (8). This simulation result confirms that the frequency of oscillation is electronically controlled. This advantage feature is easily controlled by the microcomputer or microcontroller ©2022 ADVANCES IN ELECTRICAL AND ELECTRONIC ENGINEERING 308 THEORETICAL AND APPLIED ELECTRICAL ENGINEERING VOLUME: 20 |NUMBER: 3 |2022 |SEPTEMBER for modern circuit applications. Figure 11 shows the simulated Vo2−Vo1phase relationship against the frequency of oscillation. The phase difference swings from 86.75◦(at f0= 1.2MHz) to 91.41◦(at f0= 0.86 MHz) which is closed to the theoretical expectation (90◦) as depicted in Eq. (7). 10 20 30 40 50 60 70 80 IB ( A) 0.6 0.8 1 1.2 1.4 1.6 1.8 Frequency (MHz) Theoretical Simulated Fig. 10: Dependence of frequency of oscillation on the bias current. 0.6 0.8 1 1.2 1.4 1.6 1.8 Frequency (MHz) 60 70 80 90 100 Phase (Degree) Fig. 11: Vo2−Vo1phase relationship against the simulated frequency of oscillation. Figure 12 depicts the amplitude of the quadrature sinusoidal output voltages Vo1and Vo2versus the simulated oscillation frequency. Over the tuning frequency range, the amplitude of the sinusoidal output voltage, Vo1, is found to be close to the amplitude of the sinusoidal output voltage, Vo2, as determined by Eq. (9). Due to the non-ideal features of VD-DIBA, the amplitude of the sinusoidal output voltage, Vo2, is somewhat less than the amplitude of the sinusoidal output voltage, Vo1. Figure 13 depicts the percent THD of the quadrature sinusoidal waveforms Vo1and Vo2versus the oscillation frequency. THD varies from 1.48 % (at f0= 0.86 MHz) to 3.51 %(at f0= 1.2MHz) for the sinusoidal output voltage, Vo1.Vo2THD varies from 0.84 %(at f0= 1.70 MHz) to 1.81 % (at f0= 1.03 MHz). 0.6 0.8 1 1.2 1.4 1.6 1.8 Frequency (MHz) 100 110 120 130 140 150 160 170 Voltage (mVp-p) Vo1 Vo2 Fig. 12: Amplitudes of Vo1and Vo2against the simulated f0. 0.6 0.8 1 1.2 1.4 1.6 1.8 Frequency (MHz) 0 1 2 3 4 % of Total Harmonic Distortion Vo1 Vo2 Fig. 13: The THD of the quadrature waveforms Vo1and Vo2 against the simulated f0. 5. Experimental Results Using the VD-DIBA constructed from commercial ICs AD830 and LM13700, as shown in Fig. 4, the performance of the proposed quadrature sinusoidal oscillator is experimentally evaluated. The power supply is ±5V, IB1=IB2= 172 µA (gm1=gm2= 3.44 mS), C1=C2= 1 nF, R1= 1.14 kΩ,R2= 1 kΩ. The measured quadrature sinewave is shown in Fig. 14. It is found that the amplitudes of the quadrature sinusoidal output voltages, Vo1and Vo2, are 54.90 mVp−p and 56.76 mVp−p, respectively. The experimental magnitude ratio of the sinusoidal output voltages Vo2and Vo1is 1.034 (3.4 %error) which is closed to unity as depicted in Eq. (9). In this experiment, the phase of the sinusoidal output voltage Vo2leads the phase of the sinusoidal output voltage Vo1by 92.27◦(2.52 %error) which is consistent with the theoretical analysis as depicted in Eq. (7). The experimental f0is 536.6kHz (2.11 %error). The THDs of the sinusoidal output voltages, Vo1and Vo2obtained from the experiment are 1.43 %(−36.875 dB) and 1.00 % (−40 dB), respectively. Fig. 15 shows the measured output spectrum of the sinusoidal output voltages Vo1and Vo2. The plot of theoretical and experimental f0against the bias current is shown in Fig. 16. In this exper- ©2022 ADVANCES IN ELECTRICAL AND ELECTRONIC ENGINEERING 309 THEORETICAL AND APPLIED ELECTRICAL ENGINEERING VOLUME: 20 |NUMBER: 3 |2022 |SEPTEMBER Fig. 14: Measured quadrature sinusoidal waveform. (a) Vo1. (b) Vo2. Fig. 15: Experimental output spectrum of the sinusoidal waveforms. iment, the bias current (IB1=IB2=IB) is varied from 36.10 µA to 393.7 µA. With these variations of the bias current, the experimental f0is adjusted from 103.51 kHz to 1.32 MHz which is consistent with the theoretical analysis as depicted in Eq. (8). This experimental result confirms that the frequency of oscillation is electronically and linearly controlled. This advantage feature is easily controlled by the microcomputer or microcontroller for modern circuit applications. Figure 17 shows the experimental Vo2−Vo1phase relationship against the frequency of oscillation. The phase difference swings from 81.73◦(at f0= 1.32 MHz) to 93.67◦(at f0= 363.40 kHz) which is closed to the theoretical expectation (90◦) as depicted in Eq. (7). 0 50 100 150 200 250 300 350 400 IB(A) 0 200 400 600 800 1000 1200 1400 Frequency (KHz) Theoretical Experimental Fig. 16: Dependence of the measured f0on the bias current. 0 200 400 600 800 1000 1200 1400 Frequency (kHz) 70 75 80 85 90 95 Phase (Degree) Fig. 17: Vo2−Vo1phase relationship against the measured f0. The amplitude of the quadrature sinusoidal waveforms, Vo1and Vo2against the frequency of oscillation obtained from the experiment is plotted in Fig. 18. It is found that the amplitude of the sinusoidal output voltage, Vo1is closed to the amplitude of the sinusoidal output voltage, Vo2over the tuning frequency range as analyzed in Eq. (9). However, the amplitude of the sinusoidal output voltage, Vo1is a little less than the amplitude of the sinusoidal output voltage, Vo2due to the non-ideal properties of VD-DIBA. Figure 19 shows the experimental result of the percent of THD of the quadrature sinusoidal waveforms Vo1and Vo2against the frequency of oscillation. The percent of THD for the sinusoidal output voltage, Vo1swings from 0.931 % (at f0= 1.25 MHz) to 2.943 %◦(at f0= 103.51 kHz). The percent of THD for the sinusoidal output voltage, Vo2swings from 0.45 %(at f0= 1.25 MHz) to 2.54 %◦ (at f0= 103.51 kHz). ©2022 ADVANCES IN ELECTRICAL AND ELECTRONIC ENGINEERING 310 THEORETICAL AND APPLIED ELECTRICAL ENGINEERING VOLUME: 20 |NUMBER: 3 |2022 |SEPTEMBER 0 200 400 600 800 1000 1200 1400 Frequency (kHz) 20 40 60 80 100 Voltage (mVp-p) Vo1 Vo2 Fig. 18: Amplitudes of Vo1and Vo2against the experimental f0. 0 200 400 600 800 1000 1200 1400 Frequency (kHz) 0 0.5 1 1.5 2 2.5 3 % of Total Harmonic Distortion Vo1 Vo2 Fig. 19: The THD of the quadrature waveforms Vo1and Vo2 against the experimental f0. 6. Conclusion In this research, a voltage-mode quadrature sinusoidal oscillator is proposed. The proposed quadrature sinusoidal oscillator requires two VD-DIBAs, two resistors, and two capacitors. It provides two sinusoidal voltage waveforms, Vo1and Vo2with a 90-degree phase difference. The Vo1and Vo2outputs are accessible from nodes with low impedance, allowing them to be connected to other voltage-mode circuits without the need for voltage buffers. By setting capacitors C1and C2 to the same value and simultaneously tuning bias currents IB1and IB2, the frequency of oscillation can be controlled electronically and independently from the oscillation condition. Additionally, the condition of oscillation is modified by resistors R1and R2without affecting oscillation frequency. The amplitudes of Vo1 and Vo2are equal over the tuning frequency range. The proposed oscillator is simulated via PSpice program using CMOS model parameters offered by 0.18 µs TSMC technology in level 7 with ±0.9V. The simulation revealed that the magnitude ratio of Vo2and Vo1is 0.988 (1.2 %error). The phase of Vo2leads the phase of Vo1 by 89.41◦(0.65 %error). The simulated f0is 1.03 MHz (2.64 %error). The THDs of Vo1and Vo2obtained from the simulation are 1.63 %and 1.81 %, respectively. The simulated power consumption is 1.37 mW. In addition, the proposed oscillator is experimentally tested using VD-DIBA constructed from the commercial ICs with ±5V. The experiment revealed that the magnitude ratio of Vo2and Vo1is 1.034 (3.4 %error). The phase of Vo2leads the phase of Vo1by 92.27◦(2.52 %error). The experimental f0is 536.6 kHz (2.11 %error). The THDs of Vo1and Vo2obtained from the experiment are 1.43 %and 1.00 %, respectively. The experimental power consumption is 265.7 mW. Acknowledgment This work was performed at the electronic circuit laboratory, College of Integrated Science and Technology, Rajamangala University of Technology Lanna, Chiang Mai, Thailand, and with thanks to everyone in the analog circuit design network group. Research described in the paper was supported by School of Industrial Education and Technology, King Mongkut’s Institute of Technology Ladkrabang (KMITL) grant number 256502-03-004. Author Contributions Conceptual framework, A.K., D.D. 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