522 IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS—II: EXPRESS BRIEFS, VOL. 55, NO. 6, JUNE 2008
A Calib a ion Technique o Ve y Low Cu en and
Compac Tunable Neu omo phic Cells: Applica ion
o 5-bi 20-nA DACs
Juan A. Leñe o-Ba dallo, Te esa Se ano-Go a edona, and Be nabé Lina es-Ba anco
Abs ac —Low cu en applica ions, like neu omo phic ci cui s,
whe e ope a ing cu en s can be as low as a ew nanoampe es o
less, su e om huge ansis o misma ches, esul ing in a ound
o less han 1-bi p ecisions. Recen ly, a neu omo phic p o-
g ammable-ke nel 2-D con olu ion chip has been epo ed whe e
each pixel included wo compac calib a ed digi al- o-analog
con e e s (DACs) o 5-bi esolu ion, o cu en s down o pi-
coampe es. Those DACs we e based on MOS ladde s uc u es,
which al hough compac equi e
3+1
uni ansis o s ( is
he numbe o calib a ion bi s). He e, we p esen a new calib a ion
app oach no based on ladde s, bu on indi idually calib a able
cu en sou ces made wi h MOS ansis o s o digi ally adjus able
leng h, which equi e only -sized ansis o s. The scheme in-
cludes a anslinea ci cui -based uning scheme, which allows
us o expand he ope a ing ange o he calib a ed ci cui s wi h
g ace ul p ecision deg ada ion, o e ou decades o ope a ing
cu en s. Expe imen al esul s a e p o ided o 5-bi esolu ion
DACs ope a ing a 20 nA using wo di e en anslinea uning
schemes. Maximum measu ed p ecision is 5.05 and 7.15 b, espec-
i ely, o he wo DAC schemes.
Index Te ms—Analog, calib a ion, misma ch, sub h eshold.
I. INTRODUCTION
OVER THE LAST 20 yea s, a as amoun o neu omo -
phic VLSI sys ems ha e been epo ed which usually
consis o la ge a ays o special p ocessing pixels. Since
pixel size has o be o educed size and powe consump ion,
analog design echniques a e used wi h ansis o s o small size
ope a ing wi h nanoampe es o less. This yields necessa ily
high misma ch. Al hough epo ed neu omo phic VLSI sys-
ems ha e e ealed in e es ing, powe ul, and as in o ma ion
sensing and p ocessing capabili ies, hey s ill ha e no e ol ed
clea ly o speci ic ma ke able p oduc s. One o he main easons
o his is he una oidable excessi e misma ch. Fo example, a
2.5 m 1.5 m nMOS a 20 nA has a misma ch o
(see [4, Fig. 3]). De ining LSB as , his yields a p ecision o
b o , o design a 5-bi cu en sou ce a 20 nA, one
needs a 160 m 10 m nMOS [4].
To keep misma ch low wi hou inc easing ansis o sizes
no ope a ing cu en s, he only known solu ion is calib a ion.
Manusc ip ecei ed Oc obe 3, 2007; e ised No embe 27, 2007. This
wo k was suppo ed by Spanish Resea ch G an s TEC2006-11730-C03-01
(SAMANTA2), TEC-417 (B ain Sys em), and EU G an IST-2001-34124
(CAVIAR). The wo k o J. A. Leñe o-Ba dallo was suppo ed by he Spanish
Minis y o Educa ion and Science h ough an I3P na ional schola ship. This
pape was ecommended by Associa e Edi o A. Demos henous.
The au ho s a e wi h he Ins i u o de Mic oelec ónica de Se illa
(IMSE-CNM-CSIC) and Uni e sidad de Se illa, 41012 Se illa, Spain
(e-mail: [email p o ec ed]).
Digi al Objec Iden i ie 10.1109/TCSII.2007.916864
Fig. 1. (a) Schema ics o p oposed digi ally con olled leng h MOS ansis o .
(b) Applica ion o a calib a ion cu en sou ce.
Some esea che s ha e epo ed calib a ion echniques based
on loa ing-ga e MOS ansis o s [5], [6] in s anda d CMOS
p ocesses. Howe e , hese echniques equi e la ge a ea and
special know-how. Recen ly, some neu omo phic sys ems
wi h in-pixel RAM-based calib a ion echniques ha e been
epo ed [1]–[3], [7], which exploi he use o compac cu en
digi al- o-analog con e e s (DACs) made wi h calib a able
MOS ladde s uc u es [8]. The d awback o his app oach is
ha i uses a one-poin calib a ion p inciple, which limi s he
inal p ecision o 3 bi s o nano amp cu en s and p ac ical
ansis o sizes. In his pape , we p esen ano he p inciple wi h
which we ha e achie ed up o 7.15 b.
II. MOS WITH DIGITALLY ADJUSTABLE LENGTH
P e iously epo ed in-pixel RAM-based calib a ion ci cui s
[1], [2] we e based on he use o MOS ladde s uc u es [8].
Wi h hese s uc u es, we ob ained in he pas [8] 4.4 bi s a
2A wi h 16 5 m 5 m nMOS ansis o s ( o al ac i e a ea
m ), o he same 0.35- m CMOS echnology we a e
using in he p esen wo k.
In his pape , we p esen a new app oach o digi ally ad-
jus he equi alen size o a MOS ansis o using a mo e
compac ci cui y. Fig. 1(a) shows he schema ics o he
new digi-MOS (digi ally con olled-leng h MOS). The e
a e ansis o segmen s be ween e minals and .
Each segmen is ei he enabled by connec ing i s ga e o
e minal o disabled by connec ing i s ga e o ( o
noise-sensi i e applica ions, his node should be a low-noise
). T ansis o sizes can be, o example, ,
, and . This can be
implemen ed physically by using uni ansis o s o size
1549-7747/$25.00 © 2008 IEEE
Au ho ized licensed use limi ed o: CSIC. Downloaded on Oc obe 15, 2008 a 03:59 om IEEE Xplo e. Res ic ions apply.
LEÑERO-BARDALLO e al.: CALIBRATION TECHNIQUE FOR VERY LOW CURRENT AND COMPACT TUNABLE NEUROMORPHIC CELLS 523
Fig. 2. Mon e Ca lo simula ion (wi h 100 i e a ions) o he ci cui in Fig. 1(b),
using a 4-bi digi ally con olled leng h MOS.
Fig. 3. Mon e Ca lo simula ion esul s o he ci cui in Fig. 1(b) when
sweeping
I
. (a) Be o e calib a ion wi h
w
=15
o all Mon e Ca lo
i e a ions. (b) A e calib a ion wi h op imum
w
o each i e a ion.
(one o , wo in pa allel o in pa -
allel o ). This way, each segmen would be equi alen
o a ansis o o size . The ope a ion
o his ci cui is egion-independen and can be analyzed
by simple ansis o se ies/pa allel associa ion [10]. Conse-
quen ly, he digi ally adjus able ansis o in Fig. 1(a) would
be equi alen o one o wid h and digi ally adjus able
leng h whe e and
. This ansis o can be used as
pa o a cu en mi o ,1as shown in Fig. 1(b), o p o ide a
calib a ion cu en . Fig. 2 shows
he simula ed s ai s o as a unc ion o (using a 4-bi
digi ally con olled-leng h MOS) wi h nA, using uni
MOS sizes o 1 m/4 m, and models o a 0.35- m s anda d
CMOS p ocess. Fig. 3(a) shows as unc ion o be o e
calib a ion, wi h o each o he 100 simula ed
Mon e Ca lo i e a ions. The misma ch a nA is
and a pA is 130%. Using he
esul s in Fig. 2 ( o nA), one can compu e o each
Mon e Ca lo i e a ion he op imum alue o o minimum
sp ead a . Once se ing his op imum se o alues o ,
he esul ing as unc ion o is shown in Fig. 3(b).
Now, he misma ch a nA has been educed o 4%
(4.6 b).
F om a p ac ical poin o iew, i is no e icien o ollow
he p e ious uni ansis o -based sizing s a egy, because he
1He e we use a subpico-ampe e cu en mi o opology [11], since we wan
o use e en ually
I
alues down o he pico ampe e ange [2].
Fig. 4. Example simula ion o a 5-bi digi ally con olled leng h MOS wi h one
ansis o pe segmen and in en ional down-s eps. (a) Nominal misma ch-less
simula ion. (b) Mon e Ca lo simula ion wi h 100 i e a ions.
numbe o uni ansis o s doubles wi h numbe o bi s. In
p ac ice, i is mo e e icien o use one single ansis o o
each segmen (bi ) and adjus i s size o ha e a simila e ec .
Fu he mo e, om a s a is ical poin o iew, we a e no looking
o nice uni o m s ai cases, bu o a ( andom) co e age. The
maximum s ep heigh s will limi he inal calib a ion capa-
bili y. The e o e, i is impo an o minimize his maximum
possible s ep heigh . To do his, we design he nominal s ai
case wi h some in en ional “down-s eps,” so ha when mis-
ma ch in oduces andom a ia ions he ex a edundancy
(co e age) compensa es o e en ual la ge up-s eps. Fig. 4,
o example, shows Mon e Ca lo simula ion esul s o a 5-bi
s uc u e ha uses one single ansis o pe segmen and has
in en ional down-s eps. Simula ed and ab ica ed ansis o
sizes a e . Consequen ly, o al
ac i e a ea is now 16.6 m .
III. TRANSLINEAR CIRCUITS FOR TUNING
The calib a ion echnique shown in Fig. 1 equi es o ecali-
b a e all ci cui s when he e is a global change in he ope a ing
cu en . In p ac ice, i is desi able o allow a change in
he ope a ing cu en wi hou equi ing ecalib a ion. No e
ha all ansis o s in oduce misma ching and calib a ion com-
pensa es o he combina ion o all misma ches o all ansis-
o s. The misma ch in oduced by each ansis o is dependen
on i s ope a ion cu en and bias condi ions. To ha e calib a-
ion less sensi i e o bias condi ions one should use opologies
ha change bias condi ions o as ew ansis o s as possible.
To achie e his, we use unable anslinea ci cui s, which will
allow us o keep ixed bias cu en s o some ansis o s, in-
cluding he digi ally con olled-leng h ones. This is shown in
Fig. 5. The ci cui y comp ised by b oken lines is eplica ed
once pe pixel, bu he es is implemen ed only once a he
pe iphe y. T ansis o s o o m a anslinea loop, hus
. Local cu en is mi o ed om he pe iph-
e al global cu en , h ough a cu en mi o wi h a local
digi ally-con olled-leng h MOS. To achie e a ac o -2 calib a-
ion ange, we include wo ansis o s in se ies o his cu -
en mi o ou pu . One o ixed size and he o he cal-
ib a able. Consequen ly, and
Wi h his ci cui , one can main ain
(a e calib a ion) cons an cu en s (and ) and , while
uning globally o scale up o down all local cu en s .
Au ho ized licensed use limi ed o: CSIC. Downloaded on Oc obe 15, 2008 a 03:59 om IEEE Xplo e. Res ic ions apply.
524 IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS—II: EXPRESS BRIEFS, VOL. 55, NO. 6, JUNE 2008
Fig. 5. T anslinea ci cui o uning ope a ing ange o calib a ion ci cui .
Fig. 6. Fi s s a egy o op imizing calib a ion ange.
IV. OPTIMIZING CALIBRATION RANGES
Fo calib a ion, he goal is o ind he op imal ho izon al line
ha cu s h ough all s ai s and p oduces he minimum dispe -
sion among all s ai s. No e in Fig. 4(b) poin s “A” ( op alue
o le side) and “B” (bo om o igh side). I B is below A,
he maximum dispe sion a e calib a ion will be high, because
he e will be no ho izon al line cu ing all s ai s. I A is below
B, i is possible o ind o each s ai a alue close enough o he
desi ed ho izon al line cu ing all s ai s. Fo op imum calib a-
ion i is desi ed ha A be close o B, so ha inal calib a ion
wo ds may sp ead o e he whole ange. The esul ing ela i e
posi ion o poin s A and B depends on he esul ing misma ch
dis ibu ion o he a ay and he esul ing p ocess co ne o he
sample. One can design he nominal case o ha e A as close
as possible o B, bu hen many ab ica ed samples will esul
wi h A highe han B, yielding poo calib a ion capabili y. On
he o he hand, i one designs he nominal case o A conse a-
i ely lowe han B, hen many samples will no ake ad an age
o all o hei bi s o calib a ion, esul ing in educed calib a ion
capabili y. Consequen ly, in p ac ice, i will be desi able o be
capable o adjus he ela i e posi ions o poin s A and B elec-
onically. Fo his, we ha e implemen ed wo di e en global
op imiza ion s a egies.
In he i s s a egy, shown in Fig. 6, wo digi ally con olled-
leng h ansis o s a e used. One o hem is adjus ed locally, as
in Fig. 5, bu he o he is adjus ed globally. Thus, all ga es o i s
ansis o segmen s [see Fig. 1(a)] a e sha ed by all pixels and
con olled om he pe iphe y. As a esul ,
. Fig. 7 shows he esul ing simula ed s ai -
cases o h ee di e en alues o global con ol wo d .Fo
one ex eme [ , as in Fig. 7(a)], A is abo e B, and he
a ay has e y poo calib a ion capabili y. Fo he o he ex eme
[, as in Fig. 7(c)], A is a he bo om and he ho izon al
Fig. 7. Simula ion esul s o i s s a egy. Simula ed s ai s o : (a)
w
=31
,
(b) o
w
=16
, and (c)
w
=0
. The e ical scale is he same o he
h ee g aphs.
lines cu only a educed ange o he s ai s, hus educing sig-
ni ican ly he a ailable numbe o bi s o calib a ion. The op-
imum solu ion is an in e media e one, in his case
as in Fig. 7(b), which se s poin s A and B o be close. The op-
imum alue o is sample-dependen . Sizing o he ex a
ansis o is no c i ical bu should gua an ee p ope adjus men
o A e sus B o all p ocess co ne s.
The second global op imiza ion s a egy is shown in Fig. 8.
He e, he anslinea ci cui has been eplica ed wice, so ha
he e a e wo o such anslinea ci cui s in pa allel. One o hem
uses local calib a ion h ough local digi al con ol wo d .
The o he is adjus ed globally and only he ou pu ansis o
o i s anslinea se is eplica ed once pe pixel. This allows
o a la ge size o his ansis o and, consequen ly, less mis-
ma ch. The pu pose o he locally calib a ed anslinea ci cui is
o compensa e o he misma ch a . Fig. 9 shows simula ion
esul s o his ci cui . In Fig. 9(a) all pe iphe al bias cu en s
and we e se o 10 nA. The esul is A being
lowe han B and a educed ange o he calib a ion wo ds.
Fig. 9(b) shows he con ibu ion o only he bo om locally ad-
jus able subci cui ( in Fig. 8). No e ha , o ,
he bo om ci cui does no add cu en o . Consequen ly, in
Fig. 9(a), o , he misma ch is p oduced only by he
uppe ansis o s. No e ha his le pa o he s ai s will be
ixed i pe iphe al cu en s a e main ained ixed. The uning
s a egy consis s now in scaling pe iphe al cu en s un il ob-
aining he op imum si ua ion shown in Fig. 9(c). In his case,
we ha e se all nA. A e inding he op imum cal-
ib a ion wo ds, he esul ing ope a ing poin can be scaled by
adjus ing simul aneously only pe iphe al cu en s and .
V. EXPERIMENTAL RESULTS
A es p o o ype mic ochip was ab ica ed in a s anda d
0.35- m CMOS p ocess. Twen y 5-bi cu en DACs we e
ab ica ed. Ten o hem used he i s calib a ion ange op i-
miza ion s a egy (Fig. 6), and he o he en used he second
one (Fig. 8). We use he digi-MOS s uc u es o Fig. 1(a) wi h
i e ansis o s o sizes . Powe
supply was se o V.
Each o he i s en DACs uses i e eplicas o he ci cui in
Fig. 6, one o each bi . The nominal ou pu cu en s o each
we e adjus ed o be bina ily scaled. Consequen ly, a he
pe iphe y, we need i e g oups o cu en sou ces
and i e g oups o ansis o s , one o each bi .
Howe e , hese i e g oups o pe iphe al cu en sou ces and
ansis o s a e sha ed by all en DACs.
Au ho ized licensed use limi ed o: CSIC. Downloaded on Oc obe 15, 2008 a 03:59 om IEEE Xplo e. Res ic ions apply.
LEÑERO-BARDALLO e al.: CALIBRATION TECHNIQUE FOR VERY LOW CURRENT AND COMPACT TUNABLE NEUROMORPHIC CELLS 525
Fig. 8. Second s a egy o op imizing calib a ion ange.
Fig. 9. Simula ion esul s o second s a egy. (a) Fo all bias cu en equal
o 10 nA. (b) De ails o he bo om calib a able subci cui
I
. (c) Resul s o
u ning bias cu en s
I
down o 4.5 nA.
Fig. 10. Expe imen ally measu ed ou pu cu en s o he ci cui in Fig. 7:
(a) o
w
=0
and (b) o op imum
w
. The ho izon al line in (b) is he
a ge alue, which is cu / ouched by all en aces.
Each o he second en DACs uses i e eplicas o he ci cui in
Fig. 8. Again, o each o he en DACs, he ci cui y is eplica ed
i e imes (one pe bi ), and he pe iphe al ci cui y (ou side
b oken lines in Fig. 8) is sha ed, pe bi , by all en DACs.
Thea eao heci cui layou insideb okenlinesis18 14 m
o Fig. 6 and 17 14 m o Fig. 8, excluding la ches.
Fig. 10(a) shows he expe imen ally measu ed ou pu
cu en s o en eplicas o he ci cui in Fig. 6, when se -
ing . Pe iphe al bias cu en s we e made equal
o nA, and all calib a ion wo ds
we e swep simul aneously om 0 o 31.
A e epea ing his measu emen o all possible alues,
he op imum alue o co esponds o he si ua ion whe e
he op le alue is closes o he bo om igh one. This case
is shown in Fig. 10(b). A his poin , we can ob ain he en
op imum calib a ion wo ds ha ende he minimum
a ia ion. The maximum ou pu cu en sp ead ob ained unde
Fig. 11. Measu ed p ecision o calib a able and unable cu en sou ce wi h
he app oach o Fig. 6. T ace wi h ci cles: measu ed p ecision a e calib a ion
(wi h op imum
w
o each o he en cu en sou ces). Cu en sou ces we e
calib a ed a 10 nA. T ace wi h iangles: measu ed p ecision be o e calib a ion
(
w
=0
o all cu en sou ces). T ace wi h c osses: p ecision a e calib a-
ion, ob ained h ough simula ions.
Fig. 12. Measu ed p ecision o calib a able and unable cu en sou ce wi h
he app oach o Fig. 8. T ace wi h ci cles: measu ed p ecision a e calib a ion.
Cu en sou ces we e calib a ed a 10 nA. T ace wi h iangles: measu ed p eci-
sion be o e calib a ion (
w
=0
o all cu en sou ces). T ace wi h c osses:
p ecision a e calib a ion, ob ained h ough simula ions.
hese ci cums ances is nA, which co e-
sponds o 5.7%, a a nominal cu en o nA. I his
we e he cu en sou ce con olled by he mos signi ican bi
o a cu en DAC (wi h 20-nA maximum ange), i would limi
he DAC p ecision o b. To
e i y how calib a ion deg ades when changing bias condi ions,
we swep in Fig. 6 be ween 100 pA and 1 A. The maximum
cu en sp ead among all en calib a ed cu en sou ces is shown
in he ace wi h ci cles in Fig. 11. The ace wi h iangles a e
measu emen s ob ained be o e calib a ion ( , o all ).
We can see ha he en samples main ain a p ecision o 4 bi s
o cu en s abo e 3 nA. The ho izon al axis is he a e age o
among all en samples. We also show in Fig. 11 he esul ing
p ecision a e calib a ion ob ained h ough simula ions, shown
wi h c osses. No e ha i is o e op imis ic, excep o he
poin a which calib a ion was done (10 nA). The eason is
ha usually ci cui simula o s do no model misma ch o slope
ac o (o gamma). Since he new leng h-con olled digi-MOS
[Fig. 1(a)] is sensi i e o body-e ec , such misma ch a ec s
pe o mance, al hough i is no de ec ed by mos simula o s.
In a simila way, Fig. 12 shows he measu ed p ecision be-
o e and a e calib a ion o en calib a able and unable cu en
Au ho ized licensed use limi ed o: CSIC. Downloaded on Oc obe 15, 2008 a 03:59 om IEEE Xplo e. Res ic ions apply.
526 IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS—II: EXPRESS BRIEFS, VOL. 55, NO. 6, JUNE 2008
Fig. 13. Measu ed p ecision o he en 5-bi DAC samples ha use he i s
uning s a egy o Fig. 7. DACs we e calib a ed wi h MSB a 10nA and a 16 C.
A e calib a ion, p ecision is cha ac e ized sweeping ope a ing cu en o di -
e en empe a u es.
Fig. 14. Measu ed p ecision o he en 5-bi DAC samples ha use he second
uning s a egy o Fig. 8. DACs we e calib a ed wi h MSB a 10nA and a 16 C.
A e calib a ion, p ecision is cha ac e ized sweeping ope a ing cu en o di -
e en empe a u es.
sou ces ha ollow he app oach depic ed in Fig. 8. No e ha
now he misma ch be o e calib a ion is less han ha in Fig. 11.
This is because now he a ea used by digi ally con olled-leng h
ansis o in Fig. 6 is a ailable o ansis o in Fig. 8,
which can be made la ge . Wi h he s uc u e o Fig. 8, we ob-
ain a much be e p ecision a he calib a ion poin (8.30 bi s
a 10 nA), bu deg ades apidly, specially o high cu en s. The
p ecision a e calib a ion ob ained by simula ion is sligh ly pes-
simis ic a he calib a ion poin (7.63 bi s a 10 nA), bu i de-
g ades op imis ically as ope a ing cu en depa s om he cali-
b a ion poin (again because misma ch in slope ac o (gamma)
is no modeled).
Figs. 11 and 12 show he ma ching p ecision among en cu -
en sou ces calib a ed a 10 nA. Now we use i e o hese
sou ces, calib a ed a nA, o build a
5-bi cu en DAC. The ma ching p ecision ob ained among he
en ab ica ed DACs is shown in Fig. 13 ( o he uning scheme
o Fig. 6) and in Fig. 14 ( o he uning scheme o Fig. 8). The
DACs we e calib a ed a 16 C, and he igu es also illus a e he
DACs beha io when empe a u e is changed be ween 0 and
40 C. We can see ha he e ec o empe a u e is no se e e
o he lowe cu en ange, while o highe cu en s he DACs
a e almos insensi i e o empe a u e a ia ions.
VI. CONCLUSION
A new compac calib a ion scheme o cu en sou ces is p e-
sen ed. The app oach is illus a ed o cu en sou ces ope a ing
in he nano ampe e ange. Two uning schemes a e p oposed o
sweeping he ope a ing ange o e ou decades. The i s one
achie es less p ecision a he calib a ion poin bu i deg ades
mo e g ace ully as he ope a ing cu en is inc eased (i shows
o e 4-bi p ecision o cu en s la ge han 10 nA). The second
one achie es highe p ecision a he calib a ion poin bu p eci-
sion deg ades mo e as cu en inc eases (4 bi s is achie ed only
o cu en s be ween 8–40 nA). Tes p o o ypes ha e been ab-
ica ed and ex ensi ely es ed and cha ac e ized. As an example
applica ion, cu en DACs o 5-bi esolu ion and 20-nA ange
ha e been ab ica ed and cha ac e ized.
REFERENCES
[1] J. Cos as, T. Se ano-Go a edona, R. Se ano-Go a edona, and B.
Lina es-Ba anco, “A spa ial con as e ina wi h on-chip calib a ion
o neu omo phic spike-based AER ision sys ems,” IEEE T ans.
Ci cui s Sys . 1, Reg. Pape s, ol. 54, no. 7, pp. 1444–1458, Jul. 2007.
[2] R. Se ano-Go a edona, T. Se ano-Go a edona, A. Acos a-Jimenez,
and B. Lina es-Ba anco, “A neu omo phic co ical-laye mic ochip
o spike-based e en p ocessing ision sys ems,” IEEE T ans. Ci cui s
Sys . I, Reg. Pape s, ol. 53, no. 12, pp. 2548–2566, Dec. 2006.
[3] R. J. Kie , J. C. Ames, R. D. Bee , and R. R. Ha ison, “Design and im-
plemen a ion o mul ipa e n gene a o s in analog VLSI,” IEEE T ans.
Neu al Ne w., ol. 17, no. 4, pp. 1025–1038, Jul. 2006.
[4] R. Se ano-Go a edona, L. Camuñas-Mesa, T. Se ano-Go a edona,
J. A. Leñe o-Ba dallo, and B. Lina es-Ba anco, “The s ochas ic I-po :
A ci cui block o p og amming bias cu en s,” IEEE Ci cui s Sys . I,
Reg. Pape s, ol. 54, no. 8, pp. 1760–1764, Aug. 2007.
[5] R. R. Ha ison, J. A. B agg, P. Hasle , B. A. Minch, and S. P. Dewee h,
“A CMOS p og ammable analog memo y-cell a ay using loa ing-
ga e ci cui s,” IEEE Ci cui s Sys . II, Analog Digi . Signal P ocess.,
ol. 48, no. 1, pp. 4–11, Jan. 2001.
[6] Y. L. Wong, M. H. Cohen, and P. A. Abshi e, “128
2
128 loa ing
ga e image wi h sel -adap ing ixed pa e n noise educ ion,” in P oc.
ISCAS, 2005, ol. 5, pp. 5314–5317.
[7] S. Shah and S. Collins, “A empe a u e independen immable cu en
sou ce,” in P oc. ISCAS, May 2002, ol. 1, pp. 713–716.
[8] B. Lina es-Ba anco, T. Se ano-Go a edona, and R. Se ano-Go-
a edona, “Compac low-powe calib a ion mini-DACs o neu al
massi e a ays wi h p og ammable weigh s,” IEEE T ans. Neu al
Ne w., ol. 14, no. 5, pp. 1207–1216, Sep. 2003.
[9] K. Bul and J. G. M. Geelen, “An inhe en ly linea and compac MOST-
only cu en di ision echnique,” IEEE J. Solid-S a e Ci cui s, ol. 27,
no. 6, pp. 1730–1735, Dec. 1992.
[10] C. Galup-Mon o o, M. C. Schneide , and I. J. B. Loss, “Se ies-pa allel
associa ion o FETs o high gain and high equency applica ions,”
IEEE J. Solid-S a e Ci cui s, ol. 29, no. 9, pp. 1094–1101, Sep, 1994.
[11] B. Lina es-Ba anco and T. Se ano-Go a edona, “On he design and
cha ac e iza ion o em oampe e cu en -mode ci cui s,” IEEE J. Solid-
S a e Ci cui s, ol. 38, no. 10, pp. 1353–1363, Oc . 2003.
Au ho ized licensed use limi ed o: CSIC. Downloaded on Oc obe 15, 2008 a 03:59 om IEEE Xplo e. Res ic ions apply.