SPECIAL ISSUE ON HARDWARE IMPLEMENTATIONS OF SOFT COMPUTING
TECHNIQUES
Angui a, D.; Ba u one, I.; Mille , J.
So compu ing (SC) echniques, which include me hods om uzzy logic, neu al ne wo ks,
e olu iona y compu ing, and o he simila a eas, ha e p o en in he las ew yea s how
ole ance o imp ecision, unce ain y, o app oxima ion can be exploi ed o achie e
ac able, obus , and low cos solu ions. Mos o SC me hods and algo i hms ha e been
implemen ed in so wa e on common compu e sys ems (PCs o wo ks a ions); howe e ,
he ecen in e es on pe asi e, ubiqui ous, and eal- ime compu ing, sma adap i e
solu ions, embedded in elligen sys ems and de ices, has aised sha ply he need o
e icien ha dwa e implemen a ions o mee es ic i e equi emen s conce ning
minia u iza ion, low powe consump ion, and/o high speed ope a ion.
This special issue a ge s new de elopmen s and s a e-o - he-a case s udies o ha dwa e
implemen a ions o so compu ing echniques, including neu al ne wo ks, uzzy sys ems
and e olu iona y compu a ion o hei combina ion. The se en selec ed pape s co e a
wide ange o app oaches: a he highe le el hey a ge cu en -gene a ion
mic op ocesso s o digi al signal p ocesso s (DSPs), while a he lowe le el hey deal wi h
he design complexi ies o mic oelec onics and special-pu pose VLSI de ices.
Following his i ual pa h, he i s a icle, by F ias-Ma inez e al., p oposes a uzzy
compile , which a ge s single ins uc ion mul iple da a (SIMD) a chi ec u es, like he ones
ound in mode n mic op ocesso s o DSPs. The objec i e o he uzzy compile is o
ansla e he uzzy sys em syn ax o embedded so wa e so as o ob ain he maximum
pe o mance om s anda d a chi ec u es. The In el Pen ium III and he Texas Ins umen s
DSP C6x a e he analyzed pla o ms.
The wo pape s om Cab e a e al. and Reyne i ocus on HW/SW co-design issues as a
way o exploi he bes o ha dwa e and so wa e app oaches. They bo h employ ha dwa e
pla o ms based on p ocesso s and ield p og ammable ga e a ays (FPGAs), whose
pe o mance/cos a io has been highly inc eased in he las ew yea s, and adequa e CAD
ools o au oma e he design p ocess. The i s pape add esses uzzy con ol sys ems
analyzing wo implemen a ion app oaches: an o - he-shel mic ocon olle wi h a medium
complex FPGA, and he whole sys em implemen ed in a mo e powe ul FPGA as a sys em
on a p og ammable chip (SoPC). The second pape desc ibes neu o- uzzy sys ems and
shows how he combina ion o so wa e and ha dwa e can be exploi ed o a ge ing
special-pu pose digi al a chi ec u es and o ob aining mo e cos -e ec i e implemen a ions
han so wa e app oaches.
Scheue mann e al. p esen a FPGA implemen a ion o an an colony op imiza ion
algo i hm (ACO), which is able o ind good solu ions o combina o ial op imiza ion
p oblems. The s anda d ACO algo i hm is modi ied app op ia ely o sui he esou ces
a ailable in cu en FPGA a chi ec u es. Tes esul s show ha he FPGA app oach
achie es a signi ican speed-up espec o so wa e implemen a ions.
Woj asik e al. desc ibe a Fuzzy con olle o an implan able medical de ice: a a e-
adap i e hea pacemake , whose main cons ain is an ex emely low powe consump ion.
The pape discusses how i can be implemen ed in ha dwa e, using se e al app oaches:
om gene al-pu pose mic op ocesso s (o he ARM amily) o dedica ed de ices based on
mixed-mode and ully digi al cus om VLSI chips.
Salme i e al. exploi he capabili y o uzzy sys ems o app oxima e unc ions, in pa icula
sinusoidal unc ions, which ha e been add essed by se e al classical pa adigms. The
objec i e is o implemen a digi al di ec syn hesize , which is used in mode n
communica ion and measu emen de ices. The pape desc ibes he algo i hm employed
o op imize he design, aking in o accoun he e ec s o he ixed poin implemen a ion,
and he equi emen s in bo h ime and equency domains.
Finally, he pape om Valle e al. is a s ep owa ds implemen ing sma adap i e sys ems
on silicon. I su eys he cu en s a e-o - he-a o ha dwa e echnologies a he
mic oelec onics le el o implemen Neu al Ne wo ks wi h on-chip lea ning algo i hms.
The wo k desc ibes he implemen a ion o a Weigh Pe u ba ion on-chip lea ning ne wo k
using analog VLSI a chi ec u es o achie e e y low powe consump ion and high
compu a ional densi y.
We hank all he au ho s o allowing us o b ing oge he so many and such di e se
isions on his subjec subjec and all he e iewe s o hei imely and accu a e
wo k.
We belie e ha his special issue will be o in e es o a wide ange o eade s, who a e
willing o sol e eal applica ions wi h so compu ing echniques.