A
Misma ch-Insensi i e High-Accu acy High-speed
Con inuous-Time Cu en Compa a o in
Low
Vol age
CMOS
R. del Rio-Fe nandez,
G.
Liiian-Cemb ano,
R.
Dominguez-Cas o
and
A.
Rod iguez- Vazquez
Ins i u o de Mic oelec 6nica de Se illa, Cen o Nacional de Mic oelec 6nica,
A da. Reina Me cedes s/n,
Edi .
CICA,
E-4
10 12 Se illa
Tel.: +34
5
4239923, FAX:
+34
5
4231832,
E-mail: [email p o ec ed]
Abs ac
This pape p esen s
a
CMOS
cu en compa a o
which emp ioys nonlinea eedback o ob ain high-
accu acy (down o 1.5pA) and high-speed o low
inpu cu en s (8ns050nA). This s uc u e is much
as e o low cu en s (below
10pA)
han o he p e-
ious nonlinea eedback compa a o s
[
11, [2], [3],
[4]. Pa icula ly, when compa ed o he as es cu en
compa a o epo ed up o now [4], he new one goes
mo e ha
100
imes as e o 1nA cu en , wi h
smalle a ea occupa ion and simila powe consump-
ion. In addi ion, he new compa a o is i ually
insensi i e
o
misma ch and capable o ope a e wi h
supply ol ages
as
low
as
1V.
1.
In oduc ion
Analog cu en -mode echniques a e d awing
s ong a en ion oday due
o
hei po en ial applica-
ion in he clesign o high-speed mixed-signal p ocess-
ing ci cui :; in low ol age s anda d VLSI
CMOS
echnologies [5]. Also cu en -mode ci cui s a e na u-
al candida es o image senso y in o ma ion p ocess-
ing whe e cu en sensing and compa ison is
necessa y. Cu en compa a o s a e basic building
blocks o nonlinea cu en -mode signal p ocessing
and analog o digi al con e e s. The a ailabili y o
la ge cu en anges is
an
appealing ea u e o bo h
ields.
Also,
e icien small cu en le el de ec ion
is
undamen al o high accu acy and high speed appli-
ca ions.
Low
le el, high speed cu en de ec ion is
also
equi ed
in
di e en ligh and adia ion sensing appli-
ca ions: i.e. y-de ec o s using wide band gap semicon-
duc o s
[6],
o
con ollabili y and econ igu abili y
issues in E-beam es ing o in eg a ed ci cui s
[7].
Fo
ins ance, in he la e he need a ises o de ec cu en
le els
as
low
as
1nA in a ew
ps.
Sub h eshold
CMOS
cu en mode massi e compu a ion a chi ec u es [8]
also
equi e e icien de ec ion o low cu en le els
o as disc imina ing unc ion e alua ion.
To
high-
ligh ano he applica ion, cu en de ec ion is
also
equi ed in IDDQ VLSI es ing app oaches [9].
In ecen yea s, many cu en compa a o ci cui s
ha e been p oposed [ll, [21,
[31,
[41,
[lo],
[ill,
[121.
A
possible classi ica ion o hem is o dis inguish
be ween he ones whe e he inpu cu en
is
i s
sensed a
a
low impedance node ( esis i e inpu ) and
hem ampli ied using
a
ol age gain mechanism, and
he ones whe e he inpu cu en is sensed
a
a high
impedance node (capaci i e inpu ). The i s s p o ide
high speed o high cu en le els bu a e somewha
inaccu a e; he seconds ob ain enla ged esolu ion a
he cos o inc easing ol age excu sions a he inpu
node and consequen ly dec easing he ope a ion
speed
[
121.
Ano he possible classi ica ion is o dis inguish
be ween he s uc u es ha use au oze oing ech-
niques o a enua e o se
o
o educe p opaga ion
delays by adding clock signal gene a ion ci cui y and
he ones ha wo k on asynch onous mode.
In
his pape we p opose an asynch onous mode
cu en compa a o ha uses nonlinea eedback o
combine he ad an ages
o
capaci i e-inpu and esis-
i e-inpu a chi ec u es. Because he p oposed ci cui
is o se insensi i e by cons uc ion i does no equi e
au oze o
o
o se a enua ion.
We
include
also
a
compa a i e s udy wi h he ope a ion o he cu en
compa a o which
is
claimed he as es among all
111
0-7803-42~#-2/97/$10.00
0
1997
IEEE
hose epo ed o now
[4].
2.
Ci cui
beha iou
Fig.
1
shows he schema ic o he so-called Cu en
Swi ch Compa a o , whose ad an ages o low inpu
cu en s ha e been demons a ed in [l2]. The ope a-
ion o his ci cui in ol es wo di e en e,' =ions.
I
a
posi i e cu en lows owa ds he inpu node,
and assuming null ini ial condi ions
(Vin
=
V,=
E)
ansis o s
M,
and
Mp
a e
OFF,
he e o e he equi a-
len impedance a he inpu node is capaci i e and
consequen ly he ci cui exhibi s
a
e y high esolu-
ion (only limi ed by he leakage cu en s), he inpu
cu en
is
in eg a ed in he pa asi ic inpu capaci o
(Gin)
p oducing
a
con inuous inc ease o he inpu
ol age. The ampli ie causes
Vo
o dec ease as e
han
Vi,
and
so
ha
Mp
u n
ON
d aining he inpu
cu en and closing
a
nega i e eedback loop a ound
he ampli ie . I ob ains
a
i ual g ound a he ampli-
ie inpu , hus ixing he ol age
a
he inpu node. A
simila si ua ion occu s o nega i e inpu cu en
whe e
M,l
becomes
ON.
The ansien e olu ion is domina ed by he i s
ope a ion mode ( he capaci i e inpu beha iou ), and
i we conside
a
single pole model o he ampli ie s
wi h
a
gain-bandwid h p oduc
(GB)
and linea capac-
i o s o hei inpu and ou pu nodes one ob ains
Howe e , due
o
he pa asi ic capaci o s be ween
inpu and ou pu nodes
(CM)
he ansien esponse is
slowed down e en o
an
ideal ampli ie ; his beha -
iou is simila o he slew a e phenomena in Mille
ope a ional ampli ie s.
In
he compa a o o Fig.
1
he
coupling capaci o is o med by he
Cgs
capaci o s
o
Fig.
I
Cu en Swi ch Compa a o Schema ic.
Mn
and
Mp,
and e en ually he in insical coupling
capaci o o he ampli ie . Due o
C,,
inpu and ou -
pu nodes o he compa a o a e coupled,
so
ha he
ansien esponse e olu ion ollows
a
linea cha ac-
e is ic ins ead
a
quad a ic law
2
whe e
c
=
CinCo
+
Cin
C,
+
C,C,
No e ha in
(1)
he ou pu ol age
is
di ec ly p o-
po ional o he ampli ie
GB,
and hence he as e he
ampli ie is he as e he cu en compa a o sol es.
Howe e in
(2)
his dependence is anished.
The esponse ime can be calcula ed om
(1)
and
(2) by making
AV,
(T,)
=
E,,
,
whe e
EOH
deno es
he logic noise ma gin.
T
=--
C,
'in
;
(C,
=
0)
T
=--
C,
'in
Acco ding
o
his o mula, Fig.2 shows
a
compa ison
o he esponse ime o he cu en swi ch compa a o
o
Fig.1 wi h and wi hou he coupling capaci o .
We
a e assuming
EoH=l
V,
ypical capaci ances alues o
Ci,=Co=50 F
and g,=1001ul/ 2 o he ampli ie .
Fo
low cu en le els, i is seen ha he compa a-
o beha iou becomes se e ely deg aded due o he
coupling capaci o , e en o low
alues
o his capac-
1
Om
,
i
In
loop
In
10n
lOOn
1p
l0cl
'U%
16,
Fig.
2
Compa ison ime esponse , o
he
cu en compu u o
wi h
and wi hou coupling capaci o :
112
i o . On he o he hand, o la ge cu en s (in he o de
o ens o PAS) smalle imes esponse
a e
ob ained in
he coupled cc en compa a o . Fo hese high cu -
en le els a simple in e e ea u es as ope a ion
speed, wi h no eedback needed.
To imp o e ansien esponse
o
he cu en
swi ch compa a o o low inpu cu en s, ci cui
s a egies
a e
equi ed o uncouple inpu and ou pu
nodes o he ampli ie and hence, educing he cou-
pling capaci ance.
In o de o achie e as e esponse imes simple
CMOS
in e e s a e usually used as ampli ie s.
To
a oid he o e1,lap capaci o s in luence cascode an-
sis o s could be used in he ampli ie ou pu node.
Also,
he eedback mechanism used o ob ain he non-
linea d i ing-poin cha ac e is ic should be modi ied
o a oid
MI,
and
M,
Cg.?
in luence,
so
ha using
a
sou ce ollowe in he eedback loop mus be a oided.
The new compa a o schema ic
is
shown in Fig.3.
The ci cui hac; wo ope a ion zones.
l
a posi i e cu -
en lows oua ds he inpu node, and assuming ha
he ini ial condi ions a e:
ansis o s
Mn
and
Mp
a e
OFF,
so
ha he equi alen
impedance a he inpu node is capaci i e (i.e., e y
la ge in
DC)
and consequen ly he ci cui s exhibi s
a
e y high esc'lu ion (only limi ed by he leakage cu -
en s), he inpu cu en is in eg a ed in he inpu
capaci o
(Gin)
and p oduce
a
con inuous inc ease
o
he inpu ol age. The ampli ie causes
V,
o dec ease
as e han
Vi,
inc easing
Vs.y
o he ansis o
Mn
and
dec easing
Vsg
o
M,.,,
so
ha
M,,
is
d i en in o he
ON
s a e
anc!
a nega i e eedback loop is c ea ed
a ound he ampli ie .
I
ob ains i ual g ound a he
ampli ie inpu , ixing he ol age a he inpu node.
A
simila si ua ion occu s
o
nega i e cu en s, whe e
MI,
becomes
ON.
I
Fix.
3
Cu en,, S ee ing Compa a o
Schema ic.
This s uc u e educes esponse imes o he Fig.
1
compa a o . An imp o ed a ound wo o de s o mag-
ni ude is obse ed wi h he compa a o in
[4]
i we
compa e he wo s cases (nega i e inpu cu en s).
We can also ob ain a symbolic exp ession o he
esponse ime pa ame e by ansien analysis.
I
we
conside an inpu cu en s ep a
=O
om
a
nega i e
o e d i e le el
-J
up o a posi i e o e d i e le el
+J,
he esponse ime can be w i en
as
ollows:
Fig.4 shows he inal schema ic o he new cu -
en s ee ing compa a o .
As
i
can be seen he ampli-
ie ha appea s in Fig3 has been implemen ed by
a
CMOS
in e e wi h wo cascode ansis o s which
a oid he capaci o s be ween inpu and ou pu nodes,
so
ha he ansien e olu ion p esen s
a
quad a ic
ime dependence ins ead o
a
linea depcndencc,
as
occu s o he compa a o in
[4].
The esponse imes simula ion measu es o he
wo
compa a o s o
a
ange o inpu cu en s a e
shown in Fig.5. We ha e conside ed he
wo s
case,
V ,
-L
2/o.8
1'
6/03
I
'5
-1
I
7
T
"n
1'
410.8
(b)
Fig.
4
(a)
New
Cu en
Conipu u o
ii
ES.?
0.8pn
CMOS
echnolo iy..
(hi
Biasing
Ci cui n.
113
13000
ID
i.e.
a
s ep inpu cu en om a posi i e o e d i e le el
+J
o a nega i e o e d i e le el
-J.
The esul s show
ha he g ea es speed imp o emen occu s o low
inpu cu en s, and o less han lop4 he new compa-
a o emains as e han he one in
[4].
The quad a ic
ime law p edic ed in
(2)
can be obse ed in Fig.6. I
can be seen how his app oach is sui able in o de o
desc ibe he main ansien e olu ion.
I
con as s
wi h he beha iou obse ed in Fig.7 whe e he slew-
a e phenomena go e ns he empo al esponse. The
ci cui which p o ides he wa e- o m in Fig.7 is he
same as in Fig.4 bu using he eedback scheme ha
appea s in Fig.
1.
A
possible echnique o imp o e compa ison
imes is o educe he ol age excu sions a he
ampli-
ie ou pu node. This app oach was applied by he
au ho s
in
[4]
o he ci cui
in
Fig.1. Howe e i
p esen s
a
e y high sensi i i y
o
mis ma ch e ec s.
In o de o a oid he mis ma ch in luence he excu -
sions on he ou pu ol age mus be la ge han he
expec ed maximum luc ua ions due o mis ma ch.
..
-1
0:
-
-2.07
b)
;
.......,..
.',...
1,
,I...
.....
I
......................
I
.........,....
I
....
'...,,
..............................
I
Fig.
6
Response
o
he
compa a o in
Fig.4
. o
U
50nA
inpu
pulse.
.............
-
-
....>......,...,.....
I
.....
>
....,.....,......
1
....
,
......
I
,
..
I
,
..
:
1.0"
200.0"
400.0n
600.0n
SO0
On
0.
>me
(1l"l
Fig.
7
Response o he cu en
swi ch
compa a o
in
Fig.
I
, ii
U
50d
inpu
pulse.
Fig.8 shows
a
compa a i e s udy by Mon e Ca lo
analysis o he new and
[4]
compa a o s designed in
he same echnology (ES2 1.5pm). I
is
shown how
he pe cen age o success ul compa isons o
[4]
dec eases
as
inpu cu en le el becomes lowe . How-
e e , o he new compa a o his pe cen age becomes
100%
as soon
as
he inpu cu en eaches he maxi-
mum o se le el (<lSpA).
In o de o ob ain he maximum imp o emen s he
compa a o has inally been designed using
ES2
0.8pm echnology. Fig.9 illus a es he layou o he
compa a o and he biasing ci cui y.
The main cha ac e is ics o he new compa a o
a e
:
-
5V
powe supply.
-
Inpu Cu en O se lowe han 1.2pA.
-
Maximum esolu ion in he o de o ew PA.
-
Maximum delay o
a
50nA s ep inpu cu -
-
Maximum delay o
a
lpA s ep inpu cu en
en 8ns.
2ns.
A
NA!
Fig
8
Sensi i ies
o
he New and
[4]
Compa a o .7.
114
J/
Fig.
I1
Low
ol age ampl$e
Fig.
9
Luyou
o he
compa a o and
he
biasing ci cui y.
-
A ea consump ion wi hou bounding pads
-
Powe consump ion 2.5mW.
0.005 nm2.
Fig.
10
shows
a
compa ison be ween schema ic
and ex ac ed esponse imes. I can be obse ed how
he ex ac ed esponse imes a e wice slowe han
schema ic imes due o he pa asi ic e ec s. A ca e ul
layou mus be de eloped in o de o minimize he
pa asi ic capaci o e ec s.
Ano he impo an ea u e
o
his new s uc u e is
i s capabili y o wo king a low ol age supplies. As
i can be seen in Fig.4 he biasing ci cui y equi es
whe eas he CMOS ampli ie need
I
allows xope ope a ion wi h
a
powe supply
below
3V.
I
i.
lowe powe supply is needed he bias-
ing ci cui y should be modi ied, in his case
(7)
p o-
ides he minimum
V~D
alue (lowe han 2V). This
compa a o c,in ope a e e en below his limi i he
I
Fig.
10
Compu ison
Be ween
Schcm ic and Ex ac ed Delays.
ampli ie in Fig1 1 is used.
In
his case he new limi
becomes a ound 1V.
Fig.
12
shows he esponse imes o he compa a-
o
in
Fig.4 o wo di e en ail- o- ail ol ages. I
can be obse ed how o low inpu cu en le els he
maximum speed is ob ained using
a
3.3V
ail- o- ail
ol age. I
is
due o lowe ol age excu sions
a
he
ou pu node
o
he ampli ie .
3.
Conclusions
An analysis o he ansien e olu ion
o
nonlinea
eedback cu en compa a o s demons a es ha i s
esponse ime deg ades signi ican ly a low cu en s
due o he in luence
o
a
Mille coupling capaci o .
This can be pa ially o e come by educing he ol -
age excu sions, he p ice o be paid o his is
a
educ-
ion
o
he ci cui ole ance o misma ches, specially
signi ican a low- ol age supplies. The compa a o
p esen ed in his pape uses ano he s a egy
o
ob ain
la ge ope a ion speed wi hou deg ading he compa a-
o esolu ion and keeping he compa a o ope a ion
i ually misma ch-insensi i e, e en o ol age sup-
plies
as
low
as 1V.
h
115
4.
Re e ences
[l]
R.
Dominguez Cas o, A. Rod iguez Viizquez
and J.L. Hue as: “Sob e el Dise io de Compa a-
do es de In ensidad”.
DiseAo de Ci cui os In e-
g ados 91,
ISBN 84-87412-61-0, pp 61-66,
Uni e sidad de Can ab ia 199 1.
121 R. Dominguez-Cas o, A. Rod iguez-Viizquez,
F.
Medei o and J.L. Hue as: “High-Resolu ion
CMOS Cu en Compa a o s”.
1992 Eu opean
Solid-s a e Ci cui s Con ,
ISBN 87-984232-0-7,
pp. 242-245, Kand up 1992.
[3]
H.
T a “No el App oach o High Speed CMOS
Cu en Compa a o s”.
Elec onics Le e s,
Vol.28,
No.3, pp. 310-312, 1992.
[4] A.T.K.Tang, C.Toumazou: “High Pe o mance
CMOS Cu en Compa a o ”.
Elec onics Le -
e s,
Vo1.30, No.1, pp. 5-6, Jan. 1994.
[5]
C. Toumazou,
E
J.
Lidgey and D. G. Haigh:
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App oach”. IEE Ci cui s and Sys ems,
se ies
2,
1990.
[6]
P. Olmos e
al:
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Beha io o he Pa ial Cha ge Collec ion Model
in
Thick HgI2 y-de ec o s”.
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Ins .
and
Me hods in Physics Resea ch,
A302, pp 91-104,
1991.
[7] J. Mad enas and J. Cabes any: “E-Beam De ec o
De ices o IC Con ollabili y”.
Mic oelec onics
Enginee ing
16, pp465-472, 1992.
[SI
A.G. And eou e al: “Cu en -Mode Sub h eshold
MOS Ci cui s o Analog VLSI Neu al Sys ems”.
IEEE T ans.
on
Neu al Ne wo ks,
Vol. 2, pp 205-
213, Ma ch 1991.
[9] J. Rius and
J.
Figue as: “P opo ional BIC Senso
o Cu en Tes ing”.
Jou nal
o
Elec onic Tes -
ing,
Vol.
3,
pp 387-396, Dec. 1992.
[
lO]G.Palmisano.
6.
Palumbo,
S.
Pennisi:
“A
High-
Accu acy High-speed CMOS Cu en Compa a-
o ”.
P oc. ISCAS’94,
June 1994.
[
111 J.P.A. Ca ei a, J.E. F anca: “High Speed CMOS
Cu en Compa a o ”.P oc.
ZSCAS‘94,
June
1994.
[
12lA. Rod iguez-Vazquez, R. Dominguez-Cas o,
E
Medei o,
M.
Delgado-Res i u o: “High Resolu-
ion CMOS Cu en Compa a o s: Design and
Applica ions
o
Cu en -Mode Func ion Gene a-
ion”.
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7,
pp. 149-165, 1995.
116