Enhancing a UVM-based Test Bench for Functional Verification of a RISC-V Vector Accelerator

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ENHANCING A UVM-BASED TEST BENCH FOR
FUNCTIONAL VERIFICATION OF A RISC-V
VECTOR ACCELERATOR
ELOI MERINO SERRAT
Thesis supe iso
OSCARPALOMARPÉREZ(BARCELONASUPERCOMPUTINGCENTER-CENTRONACIONALDE
SUPERCOMPUTACION)
Tu o :MIQUELMORETÓPLANAS(Depa men o Compu e A chi ec u e)
Deg ee
Bachelo 'sDeg eeinIn o ma icsEnginee ing(Compu e Enginee ing)
Bachelo 's hesis
Facul a d'In o mà ica de Ba celona (FIB)
Uni e si a Poli ècnica de Ca alunya (UPC) - Ba celonaTech
21/01/2025
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Acknowledgemen s
I would like o hank my hesis supe iso , Osca Paloma , and my hesis u o ,
Miquel Mo e ó, o he oppo uni y o de elop his p ojec , and hei in aluable
guidance h ough i s blossoming.
I am also deeply hank ul o all p o esso s ha ha e de o edly ansmi ed hei
passion and knowledge du ing my ime a FIB.
Las , bu de ini ely no leas , hanks o my amily, iends, and my pa ne , whose
cons an suppo and lo e sus ain me day a e day. You unwa e ing encou agemen
and belie in me keep me going, and I am o e e g a e ul o each and e e y one o
you.
III
Abs ac
This hesis aims o show he comple ion o he e i ica ion en i onmen o a RISC-V
ec o accele a o known as eAccele a o , pa o he eP ocesso p ojec . This e i i-
ca ion en i onmen e ol es a ound an incomple e unc ional e i ica ion es -bench
w i en in Sys emVe ilog, using he Uni e sal Ve i ica ion Me hodology (UVM) ame-
wo k. F om c ea ing cus om componen s, o implemen ing cus om ins uc ions, and
ying e e y hing oge he h ough he collec ion o h ee ypes o co e age; his
p ojec puzzles oge he missing pieces o he es -bench. The inal esul is an
upg ade o he e i ica ion en i onmen , and he de ec ion o mul iple bugs on he
implemen a ion o eAccele a o , ha would o he wise ha e lown unde he ada .
Key Wo ds: RISC-V, Vec o Accele a o , Func ional Ve i ica ion, UVM, Co e age,
eP ocesso .
V

Resum
Aques a esi é com a objec iu mos a la inali zació de l’en o n de e i icació d’un
accele ado ec o ial RISC-V anomena eAccele a o , que o ma pa del p ojec e
eP ocesso . Aques en o n de e i icació gi a al ol an d’un banc de p o es de
e i icació uncional incomple , esc i en Sys emVe ilog i que u ili za el ma c de
eball Uni e sal Ve i ica ion Me hodology (UVM). Des de la c eació de componen s
pe sonali za s ins a la implemen ació d’ins uccions especiali zades, acaban amb la
in eg ació de o mi jançan la ecopilació de es ipus de co e age; aques p ojec e
encaixa les peces que al a en al banc de p o es. El esul a inal és una millo a
de l’en o n de e i icació i la de ecció de di e sos e o s en la implemen ació de
l’eAccele a o , que d’una al a mane a hau ien passa desape cebu s.
Pa aules Clau: RISC-V, Accele ado Vec o ial, Ve i icació Funcional, UVM, Co -
e age, eP ocesso .
VI
Con en s
Acknowledgemen s III
Abs ac V
Resum VI
1 In oduc ion 1
2 Backg ound 3
2.1 Vec o accele a o s ............................ 3
2.2 RISC-V .................................. 3
2.3 RISC-VVex ension ........................... 4
2.4 The eP ocesso p ojec . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2.5 eAccele a o ................................ 5
2.6 NoC .................................... 5
2.7 AMBA5CHI............................... 5
2.8 UVM: Uni e sal Ve i ica ion Me hodology . . . . . . . . . . . . . . . 5
2.9 BaseUVM es -bench .......................... 6
2.10 eAccele a o es -bench . . . . . . . . . . . . . . . . . . . . . . . . . . 8
2.11 Memo y Ope a ions in e ace wo king p inciple . . . . . . . . . . . . 8
2.12 Con ol S a us Regis e ins uc ions . . . . . . . . . . . . . . . . . . 10
2.13Co e age.................................. 10
2.14 Random es gene a ion . . . . . . . . . . . . . . . . . . . . . . . . . 11
3 Ve i ica ion plan 12
3.1 DUTde ini ion .............................. 12
3.1.1 Con ex .............................. 12
3.1.2 EPAIn e ace........................... 12
3.1.2.1 Sub-In e ace: insn .................. 13
3.1.2.2 Sub-In e ace: cdb ................... 14
3.1.2.3 Sub-In e ace: cpu_memop ............... 15
3.1.2.4 Sub-In e ace: esul ................. 16
3.1.2.5 Sub-In e ace: commi _ i ............... 16
3.1.2.6 Sub-In e ace: oll_back_ i ............. 16
3.1.2.7 Sub-In e ace: con ol ................ 16
3.1.2.8 Sub-In e ace: lush .................. 17
3.2 Ve i ica ion en i onmen . . . . . . . . . . . . . . . . . . . . . . . . . 18
3.2.1 Desc ip ion o e i ica ion en i onmen . . . . . . . . . . . . . 18
3.2.1.1 Componen s....................... 18
3.2.1.2 Re e ence model . . . . . . . . . . . . . . . . . . . . 18
VII
3.2.2 Co e ageplan........................... 19
3.2.2.1 Code co e age . . . . . . . . . . . . . . . . . . . . . 19
3.2.2.2 Func ional co e age . . . . . . . . . . . . . . . . . . 19
3.2.3 Tes plan ............................. 21
3.2.3.1 Tes cases de ini ion . . . . . . . . . . . . . . . . . . 21
3.2.3.2 CI/ eg essions . . . . . . . . . . . . . . . . . . . . . 21
3.3 S a ingpoin ............................... 22
3.4 Plannedwo k ............................... 24
3.4.1 Memo y cohe ence in e ace s imulus . . . . . . . . . . . . . . 24
3.4.2 CSRope a ions.......................... 24
3.4.3 Cus om ex ensions suppo . . . . . . . . . . . . . . . . . . . . 24
3.4.4 Func ional co e age . . . . . . . . . . . . . . . . . . . . . . . . 25
4 Implemen a ion 26
4.1 Memo yope a ions............................ 26
4.1.1 Explo a ion o ep ocesso _agen ............... 27
4.1.1.1 Code o begin_p o ocol ............... 29
4.1.1.2 Code o do_p o ocol ................. 29
4.1.2 Basemechanism.......................... 30
4.1.3 Queuesys em........................... 30
4.1.3.1 Delay checke . . . . . . . . . . . . . . . . . . . . . . 33
4.1.3.2 VIF in e ac o . . . . . . . . . . . . . . . . . . . . . 34
4.1.4 Mul iple loads and s o es pe cycle . . . . . . . . . . . . . . . 34
4.1.5 Mechanism con igu a ion . . . . . . . . . . . . . . . . . . . . . 35
4.1.6 Fac o ypa e n.......................... 35
4.1.7 Memop gene a ion modes . . . . . . . . . . . . . . . . . . . . 38
4.1.7.1 ALWAYS mode gene a o . . . . . . . . . . . . . . . 39
4.1.7.2 VEC_MEMOP mode gene a o . . . . . . . . . . . . 40
4.1.8 P ope con ol o commi _ i ................... 40
4.1.9 Moni o ing ............................ 41
4.2 CSRope a ions.............................. 44
4.2.1 Re e ence model changes . . . . . . . . . . . . . . . . . . . . . 44
4.2.2 Tes -bench changes . . . . . . . . . . . . . . . . . . . . . . . . 46
4.3 Random es s gene a ion . . . . . . . . . . . . . . . . . . . . . . . . . 49
4.3.1 Bioin o ma ics........................... 49
4.3.2 Fo ma con e ing c . . . ................. 51
4.4 Co e age.................................. 54
4.4.1 O e iew o exis ing co e age module . . . . . . . . . . . . . . 54
4.4.2 Implemen a ion o new ins uc ions o co e age module . . . . 55
5 E alua ion o esul s 58
5.1 Memopsimula ions............................ 58
5.1.1 Execu ion wi h d i e mode DISABLE . . . . . . . . . . . . . . 59
5.1.2 Execu ion wi h d i e mode VEC_MEMOP . . . . . . . . . . 59
5.1.2.1 Olde scala memop . . . . . . . . . . . . . . . . . . 59
5.1.2.2 Younge scala memop . . . . . . . . . . . . . . . . . 60
5.1.3 Execu ion wi h d i e mode ALWAYS . . . . . . . . . . . . . . 61
5.2 CSRins uc ions ............................. 61
5.3 Co e age esul s.............................. 62
5.3.1 Codeco e age........................... 63
VIII
5.3.2 ISACo e age ........................... 64
5.3.3 Func ional co e age . . . . . . . . . . . . . . . . . . . . . . . . 65
5.4 Bugs ound ................................ 65
5.4.1 Lack o con ol o cpu_memop lines ............... 65
5.4.2 O e lap speci ica ion misma ch . . . . . . . . . . . . . . . . . 66
5.4.3 Scala memop iming s alls VPU . . . . . . . . . . . . . . . . 67
5.4.4 Bioin o ma ic ins uc ions ISS implemen a ion bug . . . . . . 68
5.4.5 Illegal CSR ope a ions no signaled . . . . . . . . . . . . . . . 68
5.4.6 Implemen a ion e o s o c . . . ins uc ion . . . . . . . 68
6 Conclusions and u u e wo k 70
6.1 Fu u ewo k................................ 71
Re e ences 72
A Con ex and scope 75
A.1 Con ex .................................. 75
A.1.1 In oduc ion............................ 75
A.1.2 The ask.............................. 75
A.1.3 Mainconcep s........................... 75
A.1.4 S akeholde s............................ 76
A.2 Jus i ica ion................................ 76
A.2.1 Al e na i es............................ 77
A.3 Scope ................................... 78
A.3.1 Objec i es............................. 78
A.3.2 Requi emen s ........................... 78
A.3.3 Risks and obs acles . . . . . . . . . . . . . . . . . . . . . . . . 78
A.3.3.1 So wa e and licenses . . . . . . . . . . . . . . . . . . 78
A.3.3.2 Teamwo k and ime managemen . . . . . . . . . . . 78
A.3.3.3 Lack o heo e ical knowledge . . . . . . . . . . . . . 79
A.4 Me hodology and igou . . . . . . . . . . . . . . . . . . . . . . . . . 79
A.4.1 Mee ings and s a us upda es . . . . . . . . . . . . . . . . . . . 79
A.4.2 Ve sioncon ol .......................... 79
A.4.3 Issue acking sys em . . . . . . . . . . . . . . . . . . . . . . . 80
A.4.4 Au oma ion............................ 80
B Planning 81
B.1 Desc ip iono asks............................ 81
B.1.1 P ojec managemen . . . . . . . . . . . . . . . . . . . . . . . 81
B.1.2 P ojec de elopmen . . . . . . . . . . . . . . . . . . . . . . . 81
B.1.2.1 Ve i ica ion plan analysis and ex ension . . . . . . . 81
B.1.2.2 Tes bench ex ension and de elopmen . . . . . . . . 82
B.1.2.3 Tes gene a ion and unning . . . . . . . . . . . . . . 82
B.1.2.4 Co e age ex ension . . . . . . . . . . . . . . . . . . . 83
B.1.3 P ojec documen a ion . . . . . . . . . . . . . . . . . . . . . . 83
B.2 Resou ces ................................. 83
B.3 Es ima es and he Gan . . . . . . . . . . . . . . . . . . . . . . . . . 84
B.4 Risk managemen : al e na i e plans and obs acles . . . . . . . . . . . 85
C Budge and Sus ainabili y 86
C.1 Budge ................................... 86
IX
Chap e 1. In oduc ion
open Eu opean ull-s ack ecosys em based on his new RISC-V CPU [10]. As wi h
many o he p ojec s o Eu oHPC JU, eP ocesso akes ad an age o pas expe ience,
and closed p ojec s ha p eda e i . This means ha p ojec s pe aining o hese
ini ia i es ne e s a om absolu e 0; he e is always some o he pas p ojec ha
se s he basis o g ow h and esea ch. eP ocesso is one o he la es i e a ions o
said cycle.
Aside om he main OoO CPU his p ojec gi es li e o, he e is also a ec o ac-
cele a o called eAccele a o . This piece o co-p ocessing ha dwa e combines wo
main models: i s di ec memo y access eminds us o a Loosely-Coupled Accele a-
o (LCA), bu being p og am-con olled by he scala co e eminisces a Tigh ly-
Coupled Accele a o (TCA)[4]. The idea is o include pai s o 4-way RISC-V Ou
o O de (RVOOO) p ocesso s and eAccele a o accele a o s, in e connec ed by a
cohe en Ne wo k on Chip (NoC). The i s ape-ou included a single RVOOO-
eAccele a o pai , and was comple ed back in 2023. The second ape-ou aims o
eplica e his a chi ec u e, c ea ing a mul ico e layou .
Fo he e i ica ion o his ec o accele a o , BSC-CNS op ed o a unc ional ap-
p oach o op imise ime-wise, and aid implemen a ion eams e i y hei design o
his ec o accele a o . The Design Ve i ica ion (DV) eam inside BSC-CNS de-
eloped a UVM es -bench (TB) (seen in sec ion 2.8) su ounding his accele a o .
Al e na i es o his app oach a e discussed in appendix A.
This es -bench was de eloped wi h expandabili y and adap abili y in mind, and
po ing was i ial o main unc ionali ies. Howe e , e e y single ec o accele a o
has i s own se o a ia ions ha o he ec o p ocessing uni s do no possess. An
example o his in eAccele a o is he memo y disambigua ion p o ocols. O he
p ojec s do no ha e he need o such mechanisms, and he e o e hei e i ica ion
needs he de elopmen o new cus om componen s in he e i ica ion en i onmen
o suppo he needed in e aces.
Ano he example lies in he p esence o cus om ins uc ions wi h own de ails o
compa e o when de eloping he e i ica ion en i onmen ’s golden e e ence model.
Mo e absen ea u es a e discussed u he down his wo k.
This hesis aims a co e ing he e o s di ec ed a comple ing unc ionali y holes
p esen h oughou he e i ica ion en i onmen o his accele a o . The ollowing
sec ions gi e much needed con ex o unde s and wha his means, and desc ibe in
g ea de ail he e o s o puzzle oge he he missing pieces o his p ojec .
2

Chap e 2
Backg ound
To p ope ly unde s and he lines o wo k o his hesis, some basic concep s su -
ounding he es -bench and i s componen s mus be unde s ood i s .
2.1 Vec o accele a o s
In he con ex o mode n compu ing, whe e echnology is unable o keep up wi h
Moo e’s Law[23], compu ing pe o mance does no come om cen al singula co es.
La es ends go a e accele a o s; co-p ocessing pieces o ha dwa e ha se e a
speci ic pu pose. These accele a o s alle ia e compu ing load om he cen al mul-
ipu pose co es, and pe o m speci ic asks a as e and e icien ly, bo h ime and
esou ce wise.
In 1975, a company named C ay Resea ch de eloped he a chi ec u al basics o wha
we now know as supe compu e s, ma e ializing he his o ical C ay-1[28]. These
compu ing machines de eloped some g ound-b eaking concep s in he ield o High
Pe o mance Compu ing (HPC): pipelined unc ional uni s, a sha ed memo y model,
and mul ip ocesso concep s la e on. Howe e , he mos adical concep hey pio-
nee ed was ec o p ocessing. This a chi ec u e allowed p ocesso s o s eamline da a
h oughou eplicas o unc ional uni s. This mean ha ope a ions we e applied on
big ba ches o da a wi h a single ins uc ion.
Joining hese wo concep s, we conceal he Vec o P ocessing Uni (VPU). They all
igh unde he Single Ins uc ion s eam, Mul iple Da a s eams (SIMD) ca ego y,
o Flynn’s A chi ec u e Taxonomy classi ica ion[14]. Today, he concep s o hese
calssical a chi ec u es li e on, and make i all he way in o eAccele a o , which
con ains he Vi u ius[22] VPU, and expand a ound i .
2.2 RISC-V
RISC-V is an open-sou ce ins uc ion se a chi ec u e (ISA) based on he educed
ins uc ion se compu e (RISC) p inciples. De eloped in 2010 by esea che s a he
Uni e si y o Cali o nia, Be keley, RISC-V was ini ially designed as an academic
ISA, bu i s simplici y made he p oposal e y appealing. eP ocesso uses RISCV
as i s ISA[37][38], obeys he s anda d acco dingly, and adds cus om ins uc ions o
he HPC speci ic compu a ions men ioned u he down his in oduc ion (2.5).
3
Chap e 2. Backg ound
2.3 RISC-V V ex ension
The RISC-V Vec o ex ension (V) is he addi ional ISA unc ionali y ha goes
beyond he base RISC-V scala ins uc ions, and gi es con ol o e ec o ope a ions.
This means ha by design, one is able o p oduce way dense code, and way mo e
e icien algo i hms whe e scala ope a ions would c ea e ine icien and epe i i e
solu ions.
The RISC-V V implemen a ion has gone h ough mul iple e isions. The la es
and g ea es is e sion 1.0.0, known as RVV1.0. In spi e o his, he c ea ion o
eAccele a o p eda es his la es e sion, and implemen 0.7.1; which was a p e ious
e ision ha gained popula i y and s anda dized h oughou he ma ke .
Ongoing e o s owa ds a bump up in ec o ex ension e ision a e cu en ly ac i e
on he implemen a ion eam side. Despi e his being he case, his hesis will no
conside such upg ade.
2.4 The eP ocesso p ojec
The eP ocesso p ojec is a Eu opean- unded p ojec ha aims a c ea ing a ull
s ack high pe o mance p ocesso ecosys em o HPC[1][10]. De eloping bo h ha d-
wa e and so wa e solu ions, his p ojec is based on he RISC-V open sou ce ISA
and ea u es an ou o o de (OoO) co e, wi h a mixed-coupling ec o accele a o
called eAccele a o .
This whole con igu a ion is named The eP ocesso a chi ec u e. As seen in [1], his
a chi ec u e con ains he RVOOO (RISC-V Ou o O de ) p ocesso , eAccele a o ,
L2 cache, Ne wo k on Chip (NoC), IOMMU (Inpu /Ou pu Memo y Managemen
Uni ), and cohe en C2C (chip- o-chip) link. Two ape-ou s we e planned o his
p ojec . The i s one includes only one RVOOO co e; he second one includes wo
co es.
Figu e 2.1: O e iew o eP ocesso ’s layou . Taken om [1]
The RVOOO is a 4-way ou -o -o de scala RISC-V co e ha suppo s he RISCV64GCV
ISA. eAccele a o is composed by a Vec o P ocessing Uni (VPU), educed and
mixed-p ecision unc ional uni s, and an A i icial In elligence accele a o .
This p ojec has ecei ed unding om he Eu opean High-Pe o mance Compu ing
Join Unde aking (JU) unde g an ag eemen No 956702. The JU ecei es suppo
4
Chap e 2. Backg ound
om he Eu opean Union’s Ho izon 2020 esea ch and inno a ion p og amme and
Spain, Sweden, G eece, I aly, F ance, Ge many[10].
2.5 eAccele a o
Pa icula ly, eAccele a o is he g ain o sal ha BSC-CNS b ings o he able: a
RISC-V cop ocesso wi h cus om ins uc ions o suppo a ious compu a ionally
in ensi e scien i ic ields; like A i icial In elligence (AI), Machine Lea ning (ML),
Deep Lea ning (DL) and Bioin o ma ics. The e is also a ec o p ocessing uni
(VPU) inside he accele a o , which suppo s he majo i y o he s anda d RISCV
V ex ension[27] e sion 0.7.1 ins uc ions.
2.6 NoC
eP ocesso ’s chip layou in e connec s he di e en co e-accele a o pai s wi h he
es o he sys em (L2 cache + home nodes, cohe en chip o chip link, IOMMU)
h ough a c ossba Ne wo k on Chip. Based on Fas T ackNoC[7], his ne wo k is
con igu ed o use he AMBA5 CHI in e ace speci ica ion.
2.7 AMBA 5 CHI
AMBA 5 CHI (Cohe en Hub In e ace)[2] is a speci ica ion om ARM ha de-
ines a high-pe o mance, low-la ency, and cohe en in e connec o complex SoC
(Sys em-on-Chip) designs. I is pa o he ARM AMBA (Ad anced Mic ocon-
olle Bus A chi ec u e) amily, which p o ides in e connec solu ions o sys em
buses in embedded sys ems. This speci ica ion is opology-independen , bu some
op imisa ions a e included in he o icial documen a ion o cue e ec i e pe o mance
upg ades o ce ain a angemen s.
eP ocesso ’s NoC uses i e dis inc physical channels o accomoda e di e en CHI
message classes and a oid p o ocol-le el deadlocks. I also implemen s a Home
Node Funnel (HN-F), ha manages cohe en memo y ansac ions; Reques Node
IO (RNI), o which eAccele a o possesses one o in e connec wi h he es o he
NoC; and Subo dina e Node Funnel (SNF), which he es -bench uses as a backdoo
o in e ac wi h he NoC i sel .
2.8 UVM: Uni e sal Ve i ica ion Me hodology
Ac onym o Uni e sal Ve i ica ion Me hodology[18], i is a s anda dized e i ica ion
me hodology. I se s he bases o a eusable and highly con igu able ool o ab ica e
lexible es benches.
Al hough po ed as a amewo k o many Ha dwa e Desc ip ion Languages (HDL),
Sys emVe ilog is he p e e ed choice o he eAccele a o ’s es -bench. This allows
o seamless compa ibili y be ween design (Ve ilog) and e i ica ion (Sys emVe ilog)
code.
5
Chap e 2. Backg ound
2.9 Base UVM es -bench
E e y es -bench e ol es a ound a design o be es ed, named Design Unde Tes ing
(DUT). This is he module o be e i ied. A base UVM es -bench consis s o a se
o basic componen s o s imula e he DUT, lis ed as ollows.
•Tes is he componen ha ac s as he oo class o he es -bench en i on-
men . I is esponsible o c ea ing and con igu ing all en i onmen s o he
es -bench.
•En i onmen is he nex in line and pe ains o Tes . All subsequen classes
pend om his ins ance. This componen is in cha ge o ins an ia ing and
connec ing all agen s p esen in he en i onmen
•Agen ac s as a con aine o he se o componen s ha a e needed o ca y
ou ope a ions on he design. Theo y says one agen is o be u ilised pe
in e ace, o any o he classi ica ion c i e ia o e he design i sel . Howe e ,
his is an implemen a ion choice made by he a chi ec o he es -bench, and
o he con igu a ions a e possible.
•Sequence i em Consis o da a ields equi ed o gene a ing he s imulus.
In o de o gene a e he s imulus, he sequence i ems a e andomized in se-
quences. The e o e, da a p ope ies in sequence i ems should gene ally be
decla ed as and and can ha e cons ain s de ined.
•Sequence is esponsible o ecei ing (o c ea ing) sequence i ems and se -
ing hem o he nex componen in line: he d i e .
•D i e is he main componen ha in e aces wi h he DUT. I ge s sequence
i ems om he sequence , and in e p e s hem as ime-consuming s imulus on
he i ual in e ace.
•Moni o ga he s all in o ma ion esul ing om he d i e s imulus, ac ing as
a passi e obse e .
•Sco eboa d In e p e s he esul s o he sequences obse ed by he moni o .
Since his componen is ou side he agen , i can combine inpu om mul iple
moni o s o in e p e co ela ion amongs all in e aces in he DUT. Uses hese
esul s o ex end he epo o he un.
Figu e 2.2: Base e i ica ion UVM es -bench
As seen in Figu e 2.2, op componen s o he TB a e ins an ia ed in he op_ b mod-
ule, and p ope ly connec ed o he DUT using a i ual in e ace. This is o en done
6
Chap e 2. Backg ound
by pu ing and ins ance o such in e ace in he globally accessible u m_con ig_db,
and using such o in e ac wi h he DUT physical in e ace.
Ano he e y impo an concep ha UVM b ings o he able is phasing, o phase-
based execu ion. A simula ion is an execu ion low ha has a beginning and an
end. This may seem i ial, bu by de ining a ini e se o o de ed s eps, we c ea e a
consis en and obus simula ion en i onmen in which ede ining beha iou becomes
e y easy. Th ee main ca ego ies o phases a e de ined, each o which encompasses
a subse o sub-phases hemsel es.
•Build phase (3 sub-phases) is he en y poin o e e y simula ion. This phase
aims o cons uc , con igu e and connec he es -bench componen a chi ec-
u e. Ins an ia ing subcomponen s, impo ing con igu a ions, and many mo e
ini ializa ion asks a e ca ied ou h oughou his phase g oup.
•Run phase (13 sub-phases) includes all simula ion sub-phases. This phase
g oup was a concep p esen in UVM’s p edecesso , OVM, wi h some addi-
ional phases ha we e added as a esul o his adap a ion. Sub-phases ha
consume simula ion ime a e all pa o his phase g oup.
•Clean-up phase (4 sub-phases) p epa es e e y hing o an e en ual shu -
down. Ex ac ing in o ma ion om sco eboa ds, collec ing da a om unc-
ional co e age, and cleaning up esou ces a e all pa o his phase-g oup.
This phase is also used o de e mine he inal esul o he simula ion, and
epo any and e e y issue ound. No sub-phases in his phase consume any
ime a all.
Figu e 2.3: Phases o he UVM execu ion low. Taken om [42]
7

Chap e 2. Backg ound
2.10 eAccele a o es -bench
Figu e 2.4: Base es -bench a chi ec u e o e iew. C ea ed by he BSC-CNS e i i-
ca ion eam
In he case o eAccele a o , he es -bench possesses a single es class, and a single
en i onmen . Inside his en i onmen , 4 indi idual agen s a e ins an ia ed: one o
he EPA in e ace, ano he o he L2 TLB in e ace, ano he o an SNF backdoo ,
and one inal ha in e ac s wi h NoC’s CHI.
This es -bench does in e ac wi h an Ins uc ion Se Simula o (ISS) called Spike
[31]. This connec ion is es ablished using Di ec P og amming In e ace (DPI-C); a
ea u e o Sys emVe ilog o in e ac wi h Co C++ bina ies.
Spike is un o e ch ins uc ions p esen in he loaded es bina y, and hen issued
on eAccele a o . Ins uc ions a e sen alongside he expec ed esul p oduced by
he ISS, and compa ed inside a sco eboa d wi h he esul ha he DUT p oduces.
Ins uc ions a e sen one a a ime, and wai o he p e ious ins uc ion o comple e
be o e sending he nex one.
2.11 Memo y Ope a ions in e ace wo king p inci-
ple
As men ioned be o e, eAccele a o access o memo y is di ec ; only a bi a ed by
he unde lying AMBA5 CHI[2] eques node, pa o he Ne wo k on Chip (NoC)
in e connec ing he whole sys em. RISC-V V speci ica ions de ine conc e e equi e-
men s on he memo y o de ing o single execu ion uni s. Since bo h eP ocesso and
eAccele a o pe ain o he same ha , we need cohe ence communica ions be ween
bo h componen s. This is he eason o he exis ence o he cpu_memop in e ace
and he synch oniza ion mechanism ied o i .
Ou o all sub-in e aces, he memop mechanism e ol es a ound cpu_memop and
commi . I also eads in o ma ion om insn in ce ain modes o ope a ion (see
Table 3.1.2 o u he de ail on EPA in e ace).
8
Chap e 2. Backg ound
Figu e 2.5: Memop message passing sequence
The cpu_memop wo kings ope a e as ollows. Whene e he scala co e issues a scala
memo y ope a ion, i mus communica e such e en hough he cpu_memop_issue
sub-in e ace. This will signal he VPU o a possible con lic wi h ec o memo y
ope a ions ha migh be in- ligh . In an ou o o de ashion, ex a in o ma ion
abou his scala memo y ope a ion is p o ided h ough cpu_memop_pad. Pa am-
e e s like physical add ess o he access, size o he ope a ion and ope a ion ype,
a e all p o ided hough his in e ace. A e his, cpu_memop_o e lap comes om
he cop ocesso back o he scala co e. This in e ace con ains in o ma ion abou
he a o emen ioned possible con lic be ween he scala memo y ope a ion and any
cu en ly in- ligh ec o ope a ions. I his signal is ac i e, eAccele a o will wai
o he comple ion o his scala memo y ope a ion, and hen p oceed wi h no mal
ope a ion. The comple ion o any scala memo y ope a ions is signalled h ough
cpu_memop_done. In he case o scala loads ha do no gene a e any con lic , he e
is no need o done signalling, and ope a ion ending is in e ed.
The con lic signal, which is pa o he cpu_memop_o e lap sub-in e ace, is ac i e
only when a scala load is issued while an olde ec o s o e is in- ligh . This is
su icien condi ion o ac i a e such signal, and is a alid implemen a ion. Howe e ,
mo e op imised implemen a ions o his mechanism calcula e o e lap o add esses
be ween ope a ions o igge con lic s only when add esses coincide. The e o e,
eAccele a o only looks o iming-based con lic s on memo y ope a ions, and no
on eal memo y add ess o e lap.
P o iding ce ain pa ame e s ou o o de is a consequence o ha ing di ec access
o physical memo y. I i ual memo y is enabled, TLB accesses a e necessa y, and
such migh ake se e al cycles. This ou o o de pa ame e issuing is used o suppo
hese delays.
Being an ou -o -o de supe scala co e, eP ocesso may issue mul iple scala memo y
ope a ions pe cycle. The pa ame e ha de ines his is called NLS (Numbe o
Load S o es). A he ime o de eloping his p ojec , RVOOO suppo s 2 LD/ST
ope a ions pe cycle. This means ha e e y signal o he cpu_memop sub-in e ace
9
Chap e 2. Backg ound
is duplica ed, and can wo k in pa allel.
2.12 Con ol S a us Regis e ins uc ions
Ano he ea u e missing om his in e ace a e CSR ope a ions. RISC-V ISA
de ines in i s speci ica ion a se ies o Con ol S a us Regis e s (CSR), which de ine
and e lec cu en sys em s a e and beha iou . Ac ing like pa ame e s o a highly
con igu able machine; o sco eboa ds ha e lec wha is happening inside.
Ope a ions exis in RISC-V ISA o ead, w i e, se and clea bi ields in hese
egis e s. A omic ins uc ions o ead and modi y egis e s a he same ime exis ,
and a e pa o he Zics RISC-V ex ension.
Some o hese CSRs li e inside a egis e bank loca ed in he scala co e. The e o e,
all ope a ions a ge ing hese CSRs execu e inside said p ocesso . Howe e , some
o hese egis e s a e mapped inside eAccele a o , and hese ope a ions need o be
sen o he VPU o hese changes o ake e ec . The in e ace o choice is he same
one used o issue ec o ins uc ions, and ead esul s a e epo ed h ough esul s
in e ace.
Add ess P i ilege Name Desc ip ion
0x008 URW s a Vec o s a posi ion
0xC20 URO l Vec o leng h
0xC21 URO ype Vec o da a ype egis e
Table 2.1: eAccele a o -mapped CSRs
Figu e 2.12 shows all h ee CSR mapped inside eAccele a o . One o hese egis-
e s has use pe missions o ead and w i e (URW), and he o he wo ha e w i e
exclusi i y o highe p i ilege le els, being use ead-only (URO).
Ano he 2 CSRs ha he VPU in e ac s wi h a e xsa and x m. None o hese
alues a e mapped inside eAccele a o , bu a e ins ead communica ed using EPA
in e ace. This is done because hei alue is ins uc ion-dependen , and sending
an ins uc ion o supply said alue be o e e e y ope a ion would be oo much o an
o e head.
Add ess P i ilege Name Desc ip ion
0x009 URW xsa Fixed-Poin Sa u a e Flag
0x00A URW x m Fixed-Poin Rounding Mode
Table 2.2: O he eAccele a o CSRs
x m is supplied wi h e e y ins uc ion issue. xsa is he alue e u ned wi h e e y
ins uc ion esul . This is he case o all ope a ions, e en i such alue does no
ha e any hing o do wi h he ins uc ion i sel . Value is used o igno ed based on
he ype o ins uc ion.
2.13 Co e age
Co e age in ha dwa e unc ional e i ica ion e e s o a measu e o how ho oughly
he design o a ha dwa e sys em has been exe cised by he e i ica ion es s. I
10
Chap e 2. Backg ound
helps o ensu e ha he design has been ully es ed and ha any po en ial bugs
o co ne cases a e iden i ied be o e he ha dwa e is ab ica ed. Se e al ypes o
co e age me ics do exis , and a e o en classi ied in o wo main ca ego ies:
•Code co e age e alua es how much o he ac ual ha dwa e design code has
been execu ed du ing simula ion.
•Func ional co e age measu es whe he speci ic unc ionali y o beha io s ha
a e impo an o he design ha e been es ed. I is use -de ined and ocuses
on e i ying speci ic design in en .
eAccele a o ’s p ojec in pa icula , po ed co e age modules om he p ojec ha
se he base o he VPU used in his accele a o , which is he Eu opean P ocesso
Ini ia i e (EPI)[9]. The main idea was o ex end upon his co e age, bu e o s
ne e included cus om ins uc ions, and only elimina ed unsuppo ed ope a ions.
2.14 Random es gene a ion
eP ocesso ’s p ojec VPU, eAccele a o , implemen s a se o cus om ins uc ions ha
a ge scien i ic esea ch ields, such as bioin o ma ics. In he cu en e i ica ion
s ack, he es -bench is pe iodically un wi h di e en se s o es s. This is done
o ex end unc ional co e age o he design. S essing i o ind edge cases helps
unco e bugs and design p oblems ha would o he wise ha e gone unno iced.
Finding he mos basic bugs is done by execu ing a con ol se o ISA es s: baseline
simple es s ha make su e he minimum speci ica ion unc ionali y is sa is ied.
To in oduce es a ie y, and achie e such co e age execu ing hose pe iodic uns,
a andom es gene a o is used. This piece o open-sou ce so wa e, called isc -d ,
was ini ially c ea ed by Google all he way back in 2018. I was hen published o
be co-owned by a bunch o co po a ions. This g oup is called ChipsAlliance[3], and
i is now FOSS, and accep s con ibu ion om he communi y.
BSC-CNS manages o ks o he eposi o y, adap ing he ool o he necessi ies o
e e y p ojec . This Sys emVe ilog code uses UVM o gene a e compilable sou ce
iles o andomly gene a ed ins uc ion sequences. Coded wi h expandabili y in
mind, adap ing i o he needs o he es -bench is some hing achie able, and a ask
o e hauled in his hesis.
11
Chap e 3. Ve i ica ion plan
3.2 Ve i ica ion en i onmen
An o e iew o he e i ica ion en i onmen in which eAccele a o is e i ied. All
componen s and e i ica ion lows a e de ailed in ollowing sec ions.
3.2.1 Desc ip ion o e i ica ion en i onmen
3.2.1.1 Componen s
3.2.1.1.1 S imulus Gene a ion
To gene a e s imulus o his DUT, he es -bench uses bina ies as an inpu , and
uns hem using bo h he golden e e ence model, and he DUT i sel . To gene a e
such bina ies, wo main sou ces a e used:
• isc -d
Gene a es andom bina ies wi h a highly pa ame ic en i onmen o ine- une
esul s. C ea ing by hand all es s necessa y o s imula e all co ne cases
would ake e y long. Also, c ea ing andom es s helps ind co ne cases
unconside ed a speci ica ion ime.
•ISA es s
Se s o simple es s ollowing examples om RISC-V V speci ica ion documen
ha es basic unc ionali y. Manually c ea ed, hese es s aim a being a base-
line o checking i changes b eak he mos basic pa s o he design.
3.2.1.1.2 Checke s
Sco eboa d Two sco eboa ds check o he ope a ions o he en i e es -bench.
•isa_sco eboa d aims o ensu e co ec unc ionali y o isa- ela ed de ails.
Recei es da a aces om moni o _p e and moni o _pos , which cap u e
in o ma ion on he esul gi en by he golden model (p e) and DUT (pos ).
•p o ocol_sco eboa d aims o ensu e co ec unc ionali y o p o ocol de ails.
Ge s in o ma ion om moni o _p o ocol whene e an ins uc ion inishes.
Moni o c ea es ansac ions o he sco eboa d o compa e wi h he e e ence
model.
Asse ions Some asse ions we e used as pa o he e i ica ion o he AMBA5 CHI
connec ion node in e ace. These se e as a con ol ba ie be ween eAccele a o ,
and he unde lying NoC simula o used o e i y his piece o he design.
3.2.1.2 Re e ence model
As a e e ence model, he open sou ce Ins uc ion Se Simula o (ISS) Spike[31]
is used. This unc ional model implemen s simula ion o one o mo e ha s, and
allows o nice and easy implemen a ion o co-simula ion unc ionali ies. This is
wha BSC-CNS e i ica ion eam did on a o k o his p ojec . The in en ion o
he modi ica ions a e o allow spike o un un il a a ge ins uc ion is ound. This
way, using DPI-C o communica e wi h he es -bench, we allow a s epped execu ion
wi h “b eakpoin s” ha e u ns in o ma ion o he bina y and he ha s a e only
when eaching desi ed ins uc ions. In he case o eAccele a o , his means unning
only un il ec o ins uc ions a e eached, bu equi emen s may a y om p ojec
18

Chap e 3. Ve i ica ion plan
o p ojec . This o k also con ains modi ica ions o implemen cus om eP ocesso
ea u es, like Na owIn , FP8 ope a ions, and cus om ins uc ions.
3.2.2 Co e age plan
Two ypes o co e age a e collec ed o quan i y he le el o exe cising o his design.
3.2.2.1 Code co e age
Code co e age is collec ed au oma ically using simula o capabili ies, enabled h ough
he en i onmen . I ac i a es e e y ype o code co e age me ic suppo ed by he
simula ion ool. Tha is: s a emen , b anch, condi ion, exp ession, oggle, and FSM
code co e age.
3.2.2.2 Func ional co e age
Func ional co e age in eAccele a o is implemen ed using a ious co e poin s g ouped
in co e g oups and in e wined using co e c osses. Two dis inc kinds o unc ional
co e age can be dis inguished in ou p ojec : ISA co e age, and in e nal-module
co e age.
3.2.2.2.1 ISA co e age
Mo eo e , componen s exis o collec unc ional co e age o he design. Fi s and
o emos , co _ _ins akes ca e o de ining co e age poin s o he s imulus e-
cei ed on he di e en ypes o ins uc ions. This akes ca e o de ec ing ins uc ions,
and making su e speci ic bins a e co e ed. Cases a e de ined o :
19
Chap e 3. Ve i ica ion plan
Co e poin Desc ip ion
cp_ d Co e poin o des ina ion ec o egis e ( d)
cp_e en_ d Co e poin o e en des ina ion ec o egis e ( d)
cp_ s1 Co e poin o sou ce ec o egis e ( s1)
cp_ s1_0 Co e poin o sou ce ec o egis e ( s1) being 0
cp_ s2 Co e poin o sou ce ec o egis e ( s2)
cp_e en_ s2 Co e poin o e en sou ce ec o egis e ( s2)
cp_ s3 Co e poin o des ina ion ec o egis e in a s o e ope a ion
cp_da a Co e poin o scala da a in non-load ope a ions
cp_mask Co e poin o ec o mask in non- n_ w and unmasked condi ions
cp_ w _mask Co e poin o ec o mask in n_ w and unmasked condi ions
cp_sew Co e poin o ec o elemen wid h (SEW) in non- ec o ized and non- n_ w condi ions
cp_sew_ Co e poin o ec o elemen wid h (SEW) in ec o ized condi ions
cp_sew_ n_ w Co e poin o ec o elemen wid h (SEW) in n_ w condi ions
cp_sew_ n w_ Co e poin o ec o elemen wid h (SEW) in n_ w and condi ions
cp_ s a Co e poin o ec o s a index ( s a ) in a load ope a ion
cp_ l Co e poin o ec o leng h (VL) in non-only_ l0 condi ions
cp_ l0 Co e poin o ec o leng h (VL) in only_ l0 condi ions
cp_ lmul Co e poin o ec o leng h mul iplie (VLMUL) wi h illegal bins
cp_ m Co e poin o loa ing-poin ounding mode ( m) in ec o ized condi ion
cp_s ide_64 Co e poin o da a s ide in SEW64 condi ions
cp_s ide_32 Co e poin o da a s ide in SEW32 condi ions
cp_s ide_16 Co e poin o da a s ide in SEW16 condi ions
cp_s ide_8 Co e poin o da a s ide in SEW8 condi ions
cp_s ide_64_n_op Co e poin o da a s ide in SEW64 condi ions
cp_s ide_32_n_op Co e poin o da a s ide in SEW32 condi ions
cp_s ide_16_n_op Co e poin o da a s ide in SEW16 condi ions
cp_s ide_8_n_op Co e poin o da a s ide in SEW8 condi ions
cp_s ide_0_n_op Co e non-op imized s ides
cp_ l_64 Co e poin o ec o leng h (VL) in SEW64 condi ions
cp_ l_32 Co e poin o ec o leng h (VL) in SEW32 condi ions
cp_ l_16 Co e poin o ec o leng h (VL) in SEW16 condi ions
cp_ l_8 Co e poin o ec o leng h (VL) in SEW8 condi ions
Table 3.13: Ins uc ion- ela ed co e poin s. Pa o cg_ins co e g oup
All o hese co e poin s a e pa o a co e g oup called cg_ins . Once decla ed,
an ins ance o his co e g oup is c ea ed pe each ins uc ion exis en . The new()
unc ion enables o disables some o hese co e poin s, o modula e a ound each
possible ins uc ion. E e y ime an ins uc ion is comple ed, and he sco eboa d
deems i s esul co ec ; he co e age module is in oked, and he co esponding
ins uc ion is sampled. We only sample he inpu a iables o educe casuis ic, and
simpli y co e age uns. Obse ing he ou pu is some hing he es -bench akes ca e
o . Co e age o ins uc ions only looks a inpu a ia ions ha p oduce co ec
esul s.
3.2.2.2.2 In e nal module co e age
Some modules inside eAccele a o a e e i ied mo e ho oughly using unc ional co -
e age. In pa icula , by binding co e age modules “inside” o hei RTL code, he
es -bench gains access o he inne -wo king o said module. This acili a es snoop-
ing co ne cases and a ge ing in e es ing in e nal s a es, ins ead o only a ge ing
in e ace esul s. The ollowing modules con ain a p obe inside when co e age is ac-
i e: unpacke , enaming logic, queue demux, eo de bu e , ing in e connec ion,
alid bi , alid mask bi , ec o leng h ini e s a e machine, ec o leng h i ual
ou ing unc ion, sou ce bu e , a i hme ic logic uni (ALU), w i e-back bu e , s o e
bu e , index bu e and load bu e .
20
Chap e 3. Ve i ica ion plan
3.2.3 Tes plan
3.2.3.1 Tes cases de ini ion
In o de o co e as many indi idual cases as possible, a s a egic app oach is applied.
The e exis 4 kinds o es in his e i ica ion en i onmen .
•ISA es s: Di ec ed es s c ea ed o e i y co ec beha iou o each ins uc-
ion. They ac as a baseline o de elopmen o new ea u es. I ISA es s do
no succeed, hen he mos basic cases o he speci ica ion a e ailing. Since
hey include an ins ance o all possible ins uc ions in one o all possible SEW,
hey a e ideal o include in co e age eg essions uns.
•Cons ained andom es s: Random sequences o ins uc ion s eams pu
all oge he and cons ained o comply wi h ce ain minimum equi emen s.
isc -d is used o gene a e b and new es s e e y un (and combine wi h
passing es s om pas occu ences).
•Benchma ks: Rep esen a i e se o common HPC ke nels wi h sel -checking
implemen a ions o es pe o mance in eal-wo ld applica ions. These es s
a e: Axpy, Ma mul, SpMV, Somie and FFTW.
•Di ec ed es s: Manually c a ed es s, aimed di ec ly a known p one- o- ail
co ne cases.
3.2.3.2 CI/ eg essions
Con inuous In eg a ion (CI) pipeline a e used o pe iodically s imula e he design.
Whene e a job is scheduled, o new code changes a e me ged in o speci ic b anches,
hese pipelines igge and execu e a se o es wi h di e en pu poses. Th ee
dis inc kinds o pipelines a e used:
•Smoke eg ession: When we push an upda e in o he RTL o e i ica ion
en i onmen , his pipeline igge s. I execu es a small selec ed es se , which
include sani y ISA and h ee kinds o ISA es eg essions (basic ISA, ex ended
ISA, and cus om ISA).
•La ge comple e eg ession: Long eg ession un scheduled on he weekends.
I execu es a la ge se o p e iously passing andom es s. This gene a es a
co e age epo , which can be hen included in o he main co e age da abase
o he design.
•Random es s Pipeline scheduled o execu e on a daily basis. Execu es a
new ba ch o isc -d gene a ed es s and classi ies hem as passing o ailing.
Some o hese a e hen used o popula e he weekend’s la ge eg ession.
21
Chap e 3. Ve i ica ion plan
3.3 S a ing poin
A he s a o his p ojec , he e exis s a ull- ledged UVM es -bench ha suppo s
ins uc ion-by-ins uc ion le el co-simula ion, in o de o e ie e he in e nal s a e
o he accele a o , and ma ch i agains a e e ence-model simula o .
The UVM uses wha we call he Base VPU e i ica ion en i onmen ( pu-d ), which
is sha ed wi h o he p ojec s a BSC ha use he VPU. This code includes imple-
men a ion independen de ails (e.g. he RVV-0.7.1 sco eboa d, he connec ion wi h
spike, e c.). Such abs ac ions and gene ali ies make i easie o e-use code.
Figu e 3.2: Componen s o eAccele a o ’s TB. C ea ed by BSC-CNS e i ica ion
eam
A single en i onmen is ins an i a ed inside a single es class. This en i onmen is
subdi ided in o agen s ha encapsula e he e i ica ion o a ea u e o in e ace:
•ep ocesso _agen is he main agen o he es bench. Takes ca e o he
main EPA in e ace, and is used o issue and e ie e ins uc ions. C ea es
a base class called p o ocol_base_class om which i s unc ionali y can be
de i ed. This agen is pa o pu-d , and he e o e con ains e y eusable
gene ic code.
• pu_l2_ lb_agen is an agen ha gene a es and moni o s ansac ions a
L2 TLB le el. This agen con ains a se o componen s o andomly gene a e
ansac ions wi h eAccele a o ’s TLB, and compa e ou pu o wha he golden
e e ence model is simula ing. I does his connec ing wi h spike, and ans-
la ing he eques s o compa e agains he esponse ha he VPU gene a ed.
These ansac ions do no necessa ily e lec wha he bina y says o execu e,
and sequences a e andomized.
•sn _backdoo _agen , o ully-cohe en Subo dina e Node Full (SNF) back-
doo agen , ecei es all scala s o e-by e ins uc ions om he co-simula o ,
and in e ac s wi h eAccele a o ’s Remo e Node IO-Cohe en (RNI), simula -
ing beha iou s simila o hose ound in he NoC when mo e componen s a e
p esen in he sys em. This es s he p o ocols unde lying AMBA5 CHI, and
22
Chap e 3. Ve i ica ion plan
s imula es he ne wo k on chip simula o ins an ia ed wi h he es o he
es -bench.
•chi_agen con ains only a moni o componen . The e o e, i does no c ea e
any s imulus, bu a he eads he s a e o a ce ain in e ace. The idea behind
his moni o is o su eil CHI ansac ions on he VPU Reques Node In e ace
(RNI). Fo simplici y easons, his moni o is s and-alone. This means ha
no sco eboa d subsc ibes o i s ansac ions, and he moni o i sel ac s a bi
like a sco eboa d. I in e p e s in e aces, and epo s e o s when necessa y.
Spike connec ion is done using Di ec P og amming In e ace C (DPI-C), which
allows he es -bench o execu e code om spike as a sha ed objec lib a y. Two
dis inc seq componen s in e ac wi h a w appe componen ha ac s as a con olle
o he DPI-C calls.
This e i ica ion en i onmen also con ains some pa ame ized ea u es con olled
by con igu a ion objec s. These a e classes o u m_objec s andomized wi h con-
s ain s a he beginning phases o he simula ion.
23

Chap e 3. Ve i ica ion plan
3.4 Planned wo k
3.4.1 Memo y cohe ence in e ace s imulus
When his p ojec was s a ed, e e y signal o he cpu_memop in e ace was g ounded
o a oid ambiguous s a es. This mean ha he mechanism was ne e es ed in he
holis ic en i onmen ha his es bench p o ides. The ini ial plan o his p ojec
was o make a mechanism o issue and con ol ga bage scala memo y ope a ions.
This means gene a ing, issuing and moni o ing hei ou e h ough he in e ace,
while making su e co ec ope a ion is being ca ied ou . This will allow us o
simula e he p esence o a scala co e nex o ou VPU. Up un il now, eAccele a o
ne e ecei ed s imulus h ough said sub-in e ace (cpu_memop, desc ibed in sec ion
3.1.2.3). The making o his mechanism aims o unco e bugs ha his in e ace
could cause.
3.4.2 CSR ope a ions
As men ioned in sec ion 2.12, some CSR a e mapped inside eAccele a o . This
makes i a mus o access eAccele a o wi h ins uc ions o in e ac wi h said CSRs.
Two app oaches o ackle his ask a e conside ed.
Simila o he c ea ion o s imulus o scala memo y ope a ions, a mechanism could
be se -up o send ga bage sequences o CSR ins uc ions a andom imes. This could
be use ul o es ins uc ions sequences ound in a con ex swi ch, whe e we ead
and w i e o egis e s a he same ime. This app oach’s main downsides a e he
lack o con ol. In any case, con olling he iming o hese sudden bu s s would
pose qui e a challenge o li le o no ewa d.
Ins ead, ano he app oach would be o enable he en i onmen o gene a e es s wi h
said ins uc ions. Then, we could modi y he es -bench o issue CSR ins uc ions
as i would do wi h egula ec o ins uc ions. This app oach allows much mo e
con ol o he beha iou o he es s, and is a lo simple o implemen , wi h li le
di e ence in unc ionali y.
3.4.3 Cus om ex ensions suppo
Cus om ins uc ions a e some hing he es -bench pa ially suppo s a he begin-
ning o his p ojec . This is because hey a e ec o ins uc ions, bu hey do
no ollow RISC-V o ma ing s anda ds on ce ain ields o ins uc ion encoding.
Howe e , almos ull suppo o hese ins uc ions has been implemen ed in spike.
The main idea o his ask is o aid achie ing ull suppo o hese ins uc ions in
cons ained andom es gene a ion.
This ask would be i ial i an assemble was in place o comple e he so wa e
s ack om op o bo om. As men ioned in sec ion 2.14, his is no he case, bu
suppo o hese ins uc ions needs o be implemen ed anyway. To ci cum en his
issue, we plan o modi y he andom es gene a o o di ec ly encode ins uc ions,
ins ead o using egula ins uc ion mnemonics.
24
Chap e 3. Ve i ica ion plan
3.4.4 Func ional co e age
Func ional co e age is a e y side-kicked ea u e a he s a o his p ojec . Ins uc ion-
le el co e age was po ed om ano he p ojec wi h simila speci ica ions. Adding
new ins uc ions o his co e age will ensu e ou implemen a ions o o he asks a e
well es ed. Func ional co e age o in e nal modules we e pa o he ini ial plan-
ning, bu he ime ame gi en o his hesis does no i such wo k. Some code
co e age is planned o be also collec ed o u he gain me ics on he s a e o he
p ojec .
25
Chap e 4
Implemen a ion
4.1 Memo y ope a ions
So a , he memop in e ace was pulled down, o no cause any in e e ence wi h
he execu ion o he es o he es bench. This was possible because he p ocesso
is no eally he e; i is a simula ed en i onmen whe e no scala s o es a e eally
execu ed. Tha is some hing he es bench may con ol a any gi en ime. Wha
ollows is a gene al ou line o he s eps o be ca ied ou :
•Gene a e andomized scala memops h ough he in e ace a andomized in-
s an s du ing he execu ion. The objec i e is o c ea e some ini ial s imulus,
and build an in as uc u e o ex end upon. Make su e he p o ocol is ollowed
acco ding o speci ica ion, and check i he module is esponding acco dingly.
The speci ic sub-in e aces o be used a e he ollowing:
–Scala memop issue.
–Scala memop physical add ess asynch onous issue.
–O e lap esul ecei ing and in e p e a ion.
–Done signaling.
•Gene a e scala memops in a di ec ed ashion. This will allow o igge he
main in e ace mechanism: he o e lap check. When a ec o s o e is issued,
and a younge scala load is also issued, eAccele a o will epo an o e lap,
and ac acco dingly. This s ep should ocus on a ge ing he co ec add ess,
and scala memop gene a ion delay con ol.
•Pa ame e ize he implemen a ion o his mechanism. This will allow be-
ha iou al modi ica ions a un ime, and ine con ol o e es esul s.
Changes o be applied could s a a di e en componen s. A couple o hem we e
discussed a he planning phases o his ask, and a e now e isi ed.
•C ea e a whole new agen wi h all necessa y componen s o con ol memo y
ope a ions. This would be g ea o sepa a e om o he agen s, wi h own
pa ame e s, and speci ic necessi ies o be sol ed.
•Embed all his mechanism inside he execu ion low o he main agen . This
will gi e us easy access o all o he signals o ha same in e ace. Since
26
Chap e 4. Implemen a ion
cpu_memop is pa o said EPA in e ace, i makes pe ec sense o include
such con ol in he main agen .
The e o e, he second app oach was selec ed. Building a monoli hic agen o con ol
all signals o an in e ace as big as EPA IF, would be ine icien and ime-consuming i
all hose signals we e comple ely un ela ed. Bu since he main execu ion low o in-
s uc ions could di ec ly a ec he beha iou o o he mechanisms (like cpu_memop),
ha ing all p ocesses be pa o a single agen ac ually simpli ies implemen a ion.
The e o e, code o his ea u e will li e inside ep ocesso _agen (see igu e 3.2).
4.1.1 Explo a ion o ep ocesso _agen
To implemen his mechanism, i s logical s ep is o ind ou wha ole does e -
e y pa o he selec ed agen de elop. ep ocesso _agen consis s o se en main
componen s:
•agen _c g Con igu a ion o he agen i sel . Se o pa ame e s ha change
he way his agen beha es.
•seq The sequence o he agen i sel . Takes ins uc ions ecei ed om spike’s
sequence , and sends hem o ei he he d i e , o he sn _backdoo _d i e ,
based on he ype o ins uc ion ecei ed (i i is a ec o ins uc ion, he
sequence i em is sen o d i e ; else, i is sen o he backdoo d i e ).
•d i e Only d i e o he agen . Recei es ins uc ions om he sequence ,
and enqueues hem o p o ocol_base_class issue queue.
•p o ocol_base_class In e p e s sequence i ems enqueued by he d i e , and
consumes simula ion ime by ollowing he p o ocols o EPA in e ace; issuing
and e ie ing ins uc ions one a a ime.
•moni o _p o ocol Cap u es ins uc ions ha e u ned esul , and sends hem
o a blocking pu po o sco eboa ds (like p o ocol_sco eboa d) o in e -
p e hem.
•moni o _p e Pu s in o a blocking po in o ma ion abou s a e o he golden
e e ence model abou an ins uc ion. This is wha ISS simula ed on ha
ins uc ion.
•moni o _pos Sends in o a blocking po wha he DUT sen abou he exe-
cu ed ins uc ion. This in o ma ion is used wi h wha moni o _p e cap u es
inside isa_sco eboa d, o epo e o s in esul .
The memop mechanism code will be sub-di ided in o wo main asks: gene a ing
scala memops me ada a ( andom o di ec ed), and d i ing he in e ace using ha
in o ma ion. Two main op ions a e conside ed o a chi ec he mechanism’s code
loca ion. Fi s , c ea ing a new sequence o decide when o gene a e andomized
scala memops, and hen use ha me ada a o issue memops a will in he d i e .
This op ion gi es a pu pose o e e y componen , and nea ly sepa a es esponsibili ies
o each bi o he agen . On he o he hand, including he scala memop gene a ion
in o he d i e i sel gi es us he op ion o in e ac ing wi h he ins uc ion issue
mechanism. As we will la e disco e , his small de ail opens up some in e es ing
possibili ies. The e o e, he la e al e na i e is selec ed.
Based on wha we know, le ’s now analyse cop oP o ocol in e nals. cop ocesso
27
Chap e 4. Implemen a ion
4.1.3.2 VIF in e ac o
1i (‘VIF.signal_ eady[0] && p e _queue.size()) begin
2scala _memop_ mp = p e _queue.pop_ on ();
3‘VIF.signal[0]. i <= mp. i;
4// ...
5‘VIF.signal_ alid[0] <= 1’b1;
6nex _queue.push_back( mp);
7end else begin
8‘VIF.signal[0]. i <= ’{de aul :’0};
9// ...
10 ‘VIF.signal_ alid[0] <= 1’b0;
11 end
Figu e 4.8: Gene ic implemen a ion o a VIF in e ac o componen
This componen s a s by asse ing ha he in e ace is eady (signal se by he
VPU), and ha he eede queue con ains memops. When hese wo condi ions
mee , he d i e pops he on ope a ion o he FIFO queue ( i s inse ed), and
eeds he in e ace wi h he equi ed pa ame e s. All in e aces use eo de bu e
index as an iden i ie o he memop, so i s signaling is ep esen ed in he example.
Se ing he alid signal is also necessa y o comple e he handshake. When he i s
condi ion does no ma ch, he in e ace being d i en is b ough o a de aul ze o
s a e, wi h he signal alid also being lowe ed.
4.1.4 Mul iple loads and s o es pe cycle
As men ioned in sec ion 3.1.2.3, all signals o he memop in e ace a e duplica ed.
This is because he numbe o loads and s o e ha he scala co e can issue e e y
cycle is pa ame ised (NLS). Ou mechanism a he momen does no con empla e
his possibili y, and uses only he i s line o he NLS lines ha could exis . To
sol e his, a small modi ica ion in he d i e ’s side mus be applied.
1 o (in line = 0; line < NLS; ++line) begin
2i (‘VIF.signal_ eady[line] && p e _queue.size()) begin
3scala _memop_ mp = p e _queue.pop_ on ();
4‘VIF.signal[line]. i <= mp. i;
5// ...
6‘VIF.signal_ alid[line] <= 1’b1;
7nex _queue.push_back( mp);
8end else begin
9‘VIF.signal[line]. i <= ’{de aul :’0};
10 // ...
11 ‘VIF.signal_ alid[line] <= 1’b0;
12 end
13 end
Figu e 4.9: Gene ic implemen a ion o a VIF in e ac o componen wi h NLS
Wi h his o loop, we o ce he d i e o epea he p ocess o e e y in e ace
ins ance he e is. I only one scala memop is ound in he queue, only he i s line
o he in e ace is used. I mo e han one s uc each he queue a he same cycle,
mo e han one line will be used o send s imulus.
34

Chap e 4. Implemen a ion
4.1.5 Mechanism con igu a ion
To c a a highly adap a i e sys em, we in oduce pa ame e s. To do so, we use Sys-
emVe ilog’s plusa gs. These command line a gumen s can be ead a un ime, and
used o modi y beha iou . The ollowing pa ame e s a e added o he mechanism.
•max_coun Maximum numbe o scala memo y ope a ions o be c ea ed du -
ing he whole simula ion un. This pa ame e is use de ined, and ge s de aul
alue 2048 i he use does no de ine i .
•p ob P obabili y o a memop c ea ion. Value be ween 0 and 1000. Unless use
de ined, i s alue is andomized.
•d i e_mode Memop gene a ion mode. Seen in 4.1.7.
• anges is a se o con igu a ions ha de e mine he andom alues con s ain s
o he c ea ion o memops.
–issue_delay_ ange de e mines he maximum and minimum alues o
he issue delay ange. Range can include nega i e alues, which ep esen
an in e sion in he o de o issuing. A nega i e issue delay when using
d i e_mode VEC_MEMOP means ha he scala memop will be issued
-issue_delay cycles in ad ance o he ec o memop. De aul alue is
1:1.
–pad_delay_ ange de e mines he delay ange o he second delay o a
scala memop: he pad_delay. This ange can only con ain posi i e
numbe s and ze o. De aul alue is 0:0.
–done_delay_ ange de ines he delay ange o he las delay o a scala
memop: he done_delay. Jus like pad_delay, i can only con ain posi-
i e alues and ze o. De aul alue is 1:1.
–padd _o se _ ange gi es he ange o physical add ess o se o be
andomized. This alue is la e added o he a ge ed physical add ess.
No cons ained o any way inside he in ege numbe s domain. De aul
alue is 0:0.
4.1.6 Fac o y pa e n
To p ope ly uni y he c ea ion o hese scala memo y ope a ions, a ac o y pa e n
is pu in place. The main idea is o c ea e a Sys emVe ilog class ha is able o
ga he all pa ame e s abou scala memops, and gene a e s uc s when eques ed
o. This class is a single on, since he needs o his componen make i use ul o
ga he a gumen s jus he i s ime i is c ea ed. The e exis s ano he op ion,
which is o c ea e a gene ic UVM componen , which will be able o eimplemen he
amewo k’s base phases. This op ion was disca ded because i added unnecessa y
complexi y. The ollowing me hods a e implemen ed in he a o emen ioned ac o y
class.
•p o ec ed unc ion new()
P o ec ed new unc ion. Reads plusa gs o con igu e andomisa ion anges.
T igge s an e o i any p oblem is ound wi h he inpu , and s ops he simu-
la ion. Ini ializes all o he a iables i needed.
35
Chap e 4. Implemen a ion
• unc ion scala _memop_ ac o y ge _ins ance()
Ge he one and only s a ic ins ance o his class. C ea e i i necessa y.
• unc ion new_scala _memop(RobIndex i, Padd padd )
Re u ns a new scala memop s uc , wi h p ope ly andomised ields.
• unc ion in ge _memops_le ()
Ge numbe o memo y ope a ions le o be c ea ed.
• unc ion memop_d i e_mode_ ge _memops_le ()
Re ie e d i e mode o be used. Used o ac i a e o desac i a e ce ain gen-
e a o s depending on he selec ed d i e mode.
• unc ion in ge _p ob()
Ge selec ed p obali y (use de ined o andomly selec ed) o scala memop
c ea ion. I is used by andomising a numbe be ween MAX_PROB and 0, hen
seeing i i s alue is smalle han he e u ned p obabili y. I he andomisa ion
unc ion is homogeneus, his should asse ue p ob
10 %o he ime.
A gumen s o he memop mechanism con igu a ion li e inside his class. Thei
de ini ion can be obse ed in igu e 4.10.
1// Unique ins ance o his class in he whole sys em
2s a ic local scala _memop_ ac o y m_sel ;
3
4// Coun o all he memops c ea ed. In e nally managed
5local in m_coun ;
6
7// Max coun o all he memops c ea ed. Use de ined.
8local in m_max_coun ;
9
10 // P obabili y o a memop c ea ion. Use de ined.
11 local in m_p ob;
12
13 // Con igu a ion o andomiza ion. No need o be accesible om ou side he
class
14 local and_con ig_ m_ c;
15
16 // How he d i e s should beha e when c ea ing memops
17 local memop_d i e_mode_ m_d i e_mode;
Figu e 4.10: Membe a gumen s o class scala _memop_ ac o y
To ensu e co ec pa sing o a o emen ioned use inpu plusa gs, we de ine a o ma
o inpu alues. Fo all nume ical a gumen s, plusa gs should only con ain decimal
cha ac e s [0-9], wi h only "+" o "-" allowed o deno e sign. Fo anges, wo decimal
alues mus be supplied: he minimum and he maximum, in ha o de , sepa a ed
by a single colon. Fo disc e e ype inpu s (enume a ions), a s ing mus be supplied
in uppe case, which will be ma ched and pa sed o he alue o he enume a ion
wi h he same name. The ollowing snippe s o code show examples o how pa sing
goes abou in each case.
36
Chap e 4. Implemen a ion
1i ($ alue$plusa gs("MEMOP_PROB=%s", mp)) begin
2i ($sscan ( mp, "%d", m_p ob) != 1) begin
3‘u m_ a al("scala _memop_ ac o y", $s o ma ("Canno pa se s ing "%s "
as MEMOP_PROB", mp));
4end
5end else begin
6m_p ob = $u andom_ ange(MAX_PROB, 0);
7end
8‘u m_in o("scala _memop_ ac o y", $s o ma ("MEMOP_PROB alue o %d", m_p ob),
UVM_NONE);
Figu e 4.11: Pa se o nume ic pa ame e p ob
1i ($ alue$plusa gs("MEMOP_ISSUE_DELAY_RANGE=%s", mp)) begin
2i ($sscan ( mp, "%d:%d", m_ c.issue_delay_ ange.min,
m_ c.issue_delay_ ange.max) != 2) begin
3‘u m_ a al("scala _memop_ ac o y", $s o ma ("Canno pa se s ing "%s "
as MEMOP_ISSUE_DELAY_RANGE", mp));
4end
5end else begin
6m_ c.issue_delay_ ange = ’{DEFAULT_MEMOP_ISSUE_DELAY_MIN,
DEFAULT_MEMOP_ISSUE_DELAY_MAX};
7end
Figu e 4.12: Pa se o ange pa ame e issue_delay_ ange
1i ($ alue$plusa gs("MEMOP_DRIVE_MODE=%s", mp)) begin
2case ( mp)
3"ALWAYS": m_d i e_mode = ALWAYS;
4"VEC_MEMOP": m_d i e_mode = VEC_MEMOP;
5"DISABLE": m_d i e_mode = DISABLE;
6de aul :begin
7‘u m_ a al("scala _memop_ ac o y", $s o ma ("MEMOP_DRIVE_MODE "%s "
is no alid. Suppo ed modes a e: ALWAYS, VEC_MEMOP and
DISABLE", mp))
8end
9endcase
10 ‘u m_in o("scala _memop_ ac o y", $s o ma ("MEMOP_DRIVE_MODE %0s selec ed",
m_d i e_mode.name()), UVM_NONE);
11 end else begin
12 m_d i e_mode = DISABLE;
13 ‘u m_in o("scala _memop_ ac o y", $s o ma ("MEMOP_DRIVE_MODE no speci ied.
De aul ing o %0s", m_d i e_mode.name()), UVM_DEBUG);
14 end
Figu e 4.13: Pa se o enume a ion pa ame e memop_d i e_mode_
Range plusa gs speci ically a e used o cons ain andomisa ion. Fo ha , Sys-
emVe ilog’s buil -in capabili ies a e used o andomise he s uc s. Wha ollows is
he code o new_scala _memop ha akes ca e o c ea ing and andomising hese
s uc s.
37
Chap e 4. Implemen a ion
1 unc ion scala _memop_ new_scala _memop(RobIndex i, Padd padd );
2scala _memop_ sm;
3sm. i = i;
4sm.padd = padd ;
5s d:: andomize(sm) wi h {
6sm.issue_delay inside
{[m_ c.issue_delay_ ange.min:m_ c.issue_delay_ ange.max]};
7sm.pad_delay inside {[m_ c.pad_delay_ ange.min:m_ c.pad_delay_ ange.max]};
8sm.done_delay inside
{[m_ c.done_delay_ ange.min:m_ c.done_delay_ ange.max]};
9sm.padd _o se inside
{[m_ c.padd _o se _ ange.min:m_ c.padd _o se _ ange.max]};
10 };
11 m_coun += 1;
12 e u n sm;
13 end unc ion
Figu e 4.14: Implemen a ion o new_scala _memop
As obse ed in igu e 4.14, pa ame e s i and base padd a e no andomised. In-
s ead, he calle supplies hese pa ame e s acco ding o hei needs. Speci ically o
delays and o se , cons ains a e pu in place o limi he ange o possible alues
ha hese a iables can ake.
Re u ning o plusa gs, a s ing o s uc u e like +a gumen = alue is equi ed on
he command line o he simula o o supply he a gumen s. Launching he es -
bench is done using a Make ile, whe e we can assign names o hese pa ame e s,
and c ea e so o an in e ace o he use o con ol. These pa ame e s di ec ly
co ela e wi h he ones speci ied in subsec ion 4.1.5 (which li e inside he memop
ac o y) and desc ibed as ollows.
A gumen De aul alue Possible alues Commen s
MEMOP_DRIVE_MODE DISABLE VEC_MEMOP, ALWAYS, DIS-
ABLE
Selec s he ope a ion mode o he scala
memop mechanism
MEMOP_PROB * andom [0,1000) De ines he p obabili y o c ea ing a memop
a each e alua ion. *I no de ined, a andom
alue inside he possible ange is used
MEMOP_MAX_COUNT 2048 NDeno es he maximum numbe o memops o
be c ea ed. Nega i e alues a e in e p e ed as
0.
MEMOP_ISSUE_DELAY_RANGE 1:1 ZDelay be ween ec. memop and scala memop
when VEC_MEMOP d i e mode is used.
Nega i e alues deno e an issue o he scala
memop be o e he ec o memop ha ig-
ge ed i
MEMOP_PAD_DELAY_RANGE 0:0 NDelay be ween issue and physical add ess sig-
nals. I nega i e, he alue is in e p e ed as a
0
MEMOP_DONE_DELAY_RANGE 1:1 NDelay be ween physical add ess and done sig-
nals.
MEMOP_PADDR_OFFSET_RANGE 0:0 NO se applied o base add ess when d i e
mode is VEC_MEMOP
Table 4.1: Table o use a gumen s o Make ile CLI
4.1.7 Memop gene a ion modes
Looking in o gene a o s, we can easily modi y he beha iou o he mechanism de-
pending on he posi ion inside he code, and condi ions ollowed o igge hem.
Th ee main modes a e discussed in his sec ion.
38
Chap e 4. Implemen a ion
1 ypede enum {
2VEC_MEMOP,
3ALWAYS,
4DISABLE
5} memop_d i e_mode_ ;
Figu e 4.15: Enume a ion memop_d i e_mode_
VEC_MEMOP e ol es a ound he idea o di ec ed issues a ound ec o memo y
ope a ions. This c ea ed scala memops only when a ec o ial ins uc ion ha
accesses memo y is issued. ALWAYS ac s as a s ess es mode. C ea es ins uc ions
e e y cycle, using a p obabili y as a “limi e ”. DISABLE does jus ha . Disables
he gene a ion o memops when o he mechanisms wan o be obse ed wi h he
es -bench.
4.1.7.1 ALWAYS mode gene a o
1i (m_scala _memop_ ac o y.ge _d i e_mode() == ALWAYS) begin
2i (m_scala _memop_ ac o y.ge _memops_le () > 0 && $u andom_ ange(MAX_PROB,
0) <= m_scala _memop_ ac o y.ge _p ob()) begin
3scala _memop_ new_memop;
4
5new_memop = m_scala _memop_ ac o y.new_scala _memop(selec _nex _ i(), 0);
6pending_ga bage_memops.push_back(new_memop);
7‘u m_in o("cop o_p o ocol", $s o ma ("C ea ed memop wi h he ollowing
pa ame e s: %p", new_memop), UVM_DEBUG)
8end
9end
Figu e 4.16: Implemen a ion o scala memop gene a o in ALWAYS mode
This gene a o is di ec ly inse ed in o he ask c ea ed a he beginning o his
sec ion: issue_ga bage_memop (see igu e 4.3). Since we wan o e alua e he
gene a ion o memops each and e e y cycle o he clock, his is he pe ec place o
pu he gene a o .
When he gene a o is ac i e, each cycle we gene a e and e alua e a p obabili y.
When he maximum numbe o scala memops has no been eached ye and p ob-
abili y asse s, we use he scala memop ac o y, and gene a e a new scala memo y
ope a ion. Finally, he new simula ed ope a ion is pushed in o he pending memop
ope a ions queue.
39

Chap e 4. Implemen a ion
4.1.7.2 VEC_MEMOP mode gene a o
1i (m_scala _memop_ ac o y.ge _d i e_mode() == VEC_MEMOP) begin
2i (‘IS_MEMOP(m_ins .iss_s a e.ins ) &&
m_scala _memop_ ac o y.ge _memops_le () > 0 && $u andom_ ange(MAX_PROB,
0) <= m_scala _memop_ ac o y.ge _p ob()) begin
3// C ea e and s o e new memop
4scala _memop_ new_memop;
5new_memop = m_scala _memop_ ac o y.new_scala _memop(selec _nex _ i(),
m_ins .iss_s a e.s c1_ alue);
6i (new_memop.issue_delay < 0) begin
7// Swap i’s
8RobIndex mp;
9 mp = new_memop. i;
10 new_memop. i = m_ins . ob_index;
11 m_ins . ob_index = mp;
12 end
13 pending_ga bage_memops.push_back(new_memop);
14 ‘u m_in o("cop o_p o ocol", $s o ma ("C ea ed memop wi h he ollowing
pa ame e s: %p", new_memop), UVM_DEBUG)
15 i (new_memop.issue_delay < 0) begin
16 ‘u m_in o("cop o_p o ocol", $s o ma ("Nega i e issue_delay wi h
VEC_MEMOP d i e mode. Delaying ec o ins uc ion issue by %d
cycles", -new_memop.issue_delay), UVM_DEBUG)
17 wai _ o _clk(-new_memop.issue_delay);
18 end
19 end
20 end
Figu e 4.17: Implemen a ion o scala memop gene a o in VEC_MEMOP mode
This mode o gene a ion wan s o c ea e a scala memo y ope a ion when a ec o
memop is de ec ed. To do so, his gene a o is inse ed in he code o issue_ins ,
inside he main unc ion o he cop ocesso p o ocol class (seen in igu e 4.3). Wi h
his, a condi ion o asse when he ec o ope a ion being issued accesses memo y
is placed in he w apping i -clause. This condi ion uses he compile -expandable
mac o ‘IS_MEMOP, which ells us i he ec o ins uc ion ins accesses o memo y.
Up un il he e, c ea ion o he memop is almos exac ly like igu e 4.16. Now, i
issue_delay is nega i e in his case, some ex a s eps a e aken.
Fi s , eo de bu e indexes o he scala a ec o ins uc ions a e in e ed. This
causes he in e nal logic o he VPU o conside he scala memop as issued be o e
he ec o memop. Secondly, issuing o he ec o ins uc ion is delayed as many
cycles as issue_delay nega ed. This will buy ime o he scala memop o ad ance
in he queue sys em, simula ing he desi ed delay.
4.1.8 P ope con ol o commi _ i
Fo a momen du ing implemen a ion o memops, adding he eo de bu e index o
he con ol queue o commi _ i was conside ed. The es gene a ed p oblem wi h
he con ol o he signal i sel because o he e y di e en na u e o bo h signals.
The main obs acle was ha , al hough scala memops use he same eo de bu e
index as ec o ins uc ions o iden i y hemsel es, he mechanism a ge s pa allel
issuing o bo h ins uc ion ypes. This is he way o igge o e laps, and issuing
40
Chap e 4. Implemen a ion
bo h kinds o ins uc ions sequen ially would no wo k. On op o ha , when using
commi _ i o con ol issuing o scala memops, simula ion hangs. Diagnosing his
p oblem ook collabo a ion wi h he RTL eam, and i was ound ha he es -bench
was changing commi _ i in e a ic ways. Besides, he queue o alues o pu on he
in e ace only ad anced when a ec o ins uc ion esul was ecei ed. This mean
ha including scala memops in his queue would e ase he pa allel objec i es o
his mechanism.
Simply lea ing he commi _ i con olle as-is makes all ins uc ions (including scala
memops) be o e a ce ain ec o ins uc ion o s op being specula i e. The e o e,
he mechanism is le un ouched, and only ec o ins uc ions a ec he con ol
o his pa ame e . The only hing o conside is ha eo de bu e indexes s ill
deno e "o de ". This means ha scala memops iden i y hemsel es using his same
iden i ie . Tha su ices o ensu e co ec ope a ion o he mechanism.
4.1.9 Moni o ing
Las s ep o compe e e e y hing ela ed o scala memops is con ol o co ec -
ness. To do so, a couple o op ions a ise. On he one hand, we could implemen a
moni o -sco eboa d sys em o cap u e and analyse on di e en componen s o he
es -bench. On he o he hand, we could obse e and analyse he in e ace on one
single monoli hic componen . The la e op ion is p e e ed, o educe he numbe
o componen s, and allow o u u e imp o emen s.
A moni o and an agen UVM componen s a e c ea ed o implemen his ea-
u e. The s and-alone agen is c ea ed ollowing he same design philosophy as
chi_moni o and chi_agen (see igu e 3.2), whe e he moni o deals wi h he
esponsibili y o bo h componen s, and elimina es any need o in e changing se-
quences.
To implemen mi _moni o , we mus i s know wha his checke needs o look
o . Ex ending om u m_moni o , o which only one phase is eimplemen ed: he
un_phase. In he ask ha ep esen s said phase, his moni o looks o e o s in
epea ed ansac ions, ansac ion o de , and o e lap con lic ac i i y no ma ch-
ing speci ica ion. I does his by sa ing a copy o all ansac ions obse ed in he
cpu_memop in e ace, and g ouping hem by eo de bu e index. This way, i can
ace he p og ess o he scala memop in i s passing h ough he in e ace.
1s uc {
2 eal ime issue_ eal ime;
3CPUMemOpIssue da a;
4} memop_issue[RobIndex];
5CPUMemOpPad memop_pad[RobIndex];
6O e lap memop_o e lap[RobIndex];
7 eal ime memop_ ec_s o e_in l[RobIndex];
Figu e 4.18: Da a s uc u es o mi _moni o
To be able o p ecisely con ol any possible miss-ma ches in p o ocol unc ionali y,
we s o e all he kinds o memop messages. We use Sys emVe ilog’s associa i e a ays
o iden i y all cap u es wi h hei RobIndex, which should be uniquely ep esen -
ing a single ins uc ion e e y ins an . Mo eo e , we cap u e any ec o memo y
41
Chap e 4. Implemen a ion
ins uc ions in- ligh ha s o e da a. S o ing a imes amp o he e en gi es us he
possibili y o compa ing e en s o de , which can help de ec e o s in iming speci i-
ca ions. Wi h his da a sys em, we ha e a ep esen a ion o wha he sys em looks
like a each momen . Whene e an ope a ion inalises wi hou e o s, hei da a
s uc s a e e ased, and he moni o “ ees” he RobIndex o ano he ins uc ion o
come.
The eimplemen ed ask un_phase consis s o a o e e clause, which uns un il
he end o simula ion. We bound his unning by using @(posedge m_mi .clk),
which ins uc s he ask o un e e y ime he e is a aising edge on he clock signal
o he in e ace.
1i (m_mi .insn_ eady && m_mi .insn_ alid) begin
2RobIndex i = m_mi .insn. i;
3i (‘IS_MEMOP(m_mi .insn.iwo d) && ‘IS_STORE(m_mi .insn.iwo d)) begin
4memop_ ec_s o e_in l[ i] = $ eal ime;
5end
6end
7
8i (m_mi . esul _ eady && m_mi . esul _ alid) begin
9RobIndex i = m_mi . esul . i;
10 i (memop_ ec_s o e_in l.exis s( i)) begin
11 memop_ ec_s o e_in l.dele e( i);
12 end
13 end
Figu e 4.19: In- ligh ec o s o e con ol o mi _moni o
F om he e, we cap u e ac i i y in he insn in e ace ( igu e 4.19), whe e we cap u e
ec o s o es issued o he VPU, and elimina e hem when hei esul is e ie ed.
Du ing ha pe iod o ime, he ins uc ion is in- ligh .
Fo he nex moni o ing asks, we i e a e h ough all lines o he in e ace (NLS).
In each i e a ion, we check possible e o s whene e a ansac ion o he in e ace
a i es.
•Whene e an issue ansac ion is cap u ed, log he $ eal ime in which he
message is obse ed, and he da a ha comes h ough he in e ace.
–I an ac i e ansac ion exis s wi h he same RobIndex as he ansac ions
jus obse ed, a u m_ a al is epo ed saying ha he issue signal wi h
said i was sen wice.
–I a ec o memo y ope a ion is in- ligh a he momen , and RobIndex
coincides, we igge an e o ha communica es ha such RobIndex is
being used by a ec o memop.
•When a pad ansac ion a i es, log he in o ma ion in o he co esponding
associa i e a ay.
–Check o duplica ion e o s. Fail i ano he ac i e pad message is ound
wi h he same RobIndex.
–I he pad message is ecei ed wi hou any co esponding issue message,
hen ail and epo such casuis ic.
42
Chap e 4. Implemen a ion
•I an o e alap ansac ion is obse ed, log he da a in o he a ay and check
o he ollowing e o s.
–Duplica ion o o e lap message. Scala memop o e lap (wi h same RobIndex)
is ac i e in he sys em.
–Nonexis ence o p eceding issue message.
–Nonexis ence o p eceding pad message.
–Low con lic signal when con lic exis s. This is igge ed when he
ollowing condi ions a e me : The scala memop is a pu e load ( d is
high), he con lic signal is low, and he e a e in- ligh ec o s o e
ins uc ions wi h an issue ime olde han he scala memop.
•When he e en ual done signal is sen , a single condi ion is checked. This
condi ion asse s ha all p e ious messages o he e e enced scala memop
exis . I so, we e ase all o hem om hei espec i e associa i e a ays. Else,
an e o is igge ed communica ing he missing messages.
No e ha e o s e ie ed in issue and pad in e aces would indica e p oblems in
he implemen a ion o he UVM agen . Howe e , his kind o moni o ing could
ideally be used in a passi e e i ica ion en i onmen , whe e no ex a s imulus is
sen , and obse a ions on he co e+eAccele a o in e ace could help up indica e
p oblems wi h RVOOO’s unde s anding o he p o ocol.
43
Chap e 4. Implemen a ion
h oughou he speci ica ion o RISC-V Vec o ex ension. Speci ica ion ells us ha
hese ins uc ions a e pa o he OPV opcode g oup. The e o e, he encoding
always con ains 1010111 as hei opcode. Looking a he unc 6 a ailable space
o OPV opcode, 111001 does no collide wi h any o he ins uc ion. In unc 3 is
whe e speci ica ion o bioin o ma ics ins uc ions de ia es om wha is ins uc ed
in RISC-V V speci ica ion.
Fo OPV ins uc ions, unc 6 is he only e m used o speci y an ope a ion u he .
Func 3 should only speci y wha he opcode class indica es. In he case o OPV, hese
h ee bi s indica e he sou ce o ope ands (i.e., combina ions o ec o , scala , and
immedia e sou ces). Ins ead, bioin o ma ic ins uc ions wo k wi h a single unc 6,
and use unc 3 o u he speci y one o six possible ins uc ions.
Going back o he es -bench, we ind ha he main candida e o ex end his new
class om is isc _ ec o _ins uc ion. I has ec o egis e s, masks, and o he
common ec o ope a ion amongs i s inhe i able pa ame e s.
1class isc _cus om_ins ex ends isc _ ec o _ins ;
2
3‘u m_objec _u ils( isc _cus om_ins )
4‘u m_objec _new
5
6 unc ion bi [2:0] ge _ unc3();
7case (ins _name)
8VBPCK_VV: e u n 3’b000;
9VBUNPCK_VV: e u n 3’b001;
10 VBPCNT_VV: e u n 3’b010;
11 VBBCNT_VV: e u n 3’b011;
12 VBMAX3_VV: e u n 3’b100;
13 VBMIN3_VV: e u n 3’b101;
14 de aul : ‘u m_ a al(" isc _cus om_ins ", $s o ma ("ge _ unc3. Bad cus om ins uc ion %s", ins _name.name()))
15 endcase
16 end unc ion : ge _ unc3
17
18 // Con e he ins uc ion o assembly code
19 i ual unc ion s ing con e 2asm(s ing p e ix = "");
20 s ing asm_s ;
21 s ing disasm_s ;
22 bi [31:0] code;
23 bi [5:0] unc6;
24 bi m;
25 bi [2:0] unc3;
26 bi [6:0] opcode;
27
28 disasm_s = {ge _ins _name(), " ", d.name(), ", ", s1.name()};
29 unc6 = 6’b111001;
30 m = 1’b1;
31 unc3 = ge _ unc3();
32 opcode = 7’b1010111;
33
34 case (ins _name)
35 VBPCK_VV, VBUNPCK_VV: begin
36 s2 = V0;
37 end
38 VBPCNT_VV, VBBCNT_VV, VBMAX3_VV, VBMIN3_VV: begin
39 disasm_s = {disasm_s , ", ", s2.name()};
40 end
41 de aul : ‘u m_ a al(" isc _cus om_ins ", $s o ma ("con e 2asm. Bad cus om ins uc ion %s", ins _name.name()))
42 endcase
43
44 code = { unc6, m, s2, s1, unc3, d, opcode};
45 asm_s = o ma _s ing($s o ma (".4by e 0x%0x", code), MAX_INSTR_STR_LEN);
46 commen = {disasm_s , " (bioin o ma ics ins uc ion)", commen };
47
48 i (commen != "")begin
49 asm_s = {asm_s , " #",commen };
50 end
51 e u n asm_s . olowe ();
52 end unc ion : con e 2asm
53
54 endclass : isc _cus om_ins
Figu e 4.27: Code o class o ep esen bioin o ma ics ins uc ions
As seen in igu e 4.27, a single i ual unc ion is needed o be eimplemen ed om
ou base class: con e 2asm. This me hod is que ied whene e he main es gen-
e a ion engine wan s a alid assembly ep esen a ion o he ins uc ion. Thanks o
RISC-V’s s anda ds, his me hod can be implemen ed once, and eading unc 3 and
50

Chap e 4. Implemen a ion
unc 6, used wi h e e y child class. The expec ed e u n alue is a s ing con aining
he mnemonic o he ins uc ion.
Wha we do ins ead is assemble he ins uc ion ou sel es. We hen end up wi h he
encoded alue o he ins uc ion i sel ( a iable code in a o emen ioned code). Wi h
his, we in oduce he s ing ".4by e 0x" wi h he esul ing alue appended, and use
i as he e u n alue. This ep esen a ion o he ins uc ion is s ill alid. Obli ious
o he exis ence o cus om ins uc ions, he assemble will simply place his alue in
he posi ion speci ied. The ins uc ion will hen end up in he inal gene a ed es
bina y.
Obse e he use o he helpe unc ion ge _ unc3. This unc ion e u ns he iden-
i ying pa ame e o bioin o ma ics ins uc ions. We ma ch o he mnemonic o he
ins uc ion ype, and e u n a unique alue o e e y ins uc ion.
A e his, we decla e as many ex ensions o he class as ins uc ions he e a e. This
is done wi h a compile mac o, o no epea code. This way, we possess a class
o e e y possible ins uc ion, all inhe i ing di ec ly om a cus om common class.
Finally, we dela e an ins uc ion g oup o which his ins uc ion g oup pe ains.
This will allow us o enable and disable he gene a ion o hese ins uc ions a will.
Only modi ying he a ge ile will be needed o do so. Fo cus om bioin o ma ics
ins uc ions, he name o he ins uc ion g oup assigned is RVVBIO.
4.3.2 Fo ma con e ing c . . .
c is an ins uc ion pa o he RISC-V V ex ension used o pe o m ec o -
ized loa ing-poin con e sion ope a ions. Va ia ions o his ins uc ion change he
ope and kind (e.g., c . .x. con e s all loa ing poin elemen s o he equi a-
len in ege ep esen a ion). eAccele a o implemen s mul iple o ma s o loa ing-
poin ep esen a ion, and so a ise he need o an ins uc ion o con e be ween
hem same-size con e sions: c . . . .
To be exac , eAccele a o implemen s wo o ma s o 8-bi loa ing poin ep esen-
a ion (FP8 E4M3 and FP8 E5M2), and wo mo e o 16-bi ep esen a ion(FP16
and BF16)[20][21].
Figu e 4.28: Na ow loa ing poin o ma s. Taken om [39]
51
Chap e 4. Implemen a ion
These na ow o ma s a e he na u al p og ession o deep lea ning accele a ion,
always s i ing o be e pe o mance by sac i icing p ecision. All ep esen a ions
ha e hei use, and eAccele a o implemen s hem wi h he idea o suppo hea y
machine lea ning wo kloads. Speci ically c . . . is he ins uc ion o choice
o con e be ween FP8 E4M3 and FP8 E5M2.
Mnemonic unc 6 m s2 s1 unc 3 d opcode
c . . . 100010 m s2 00100 001 d 1010111
Table 4.5: Cus om con e ins uc ion disassembly
c . . . has no ex a space in i s ins uc ion encoding, so o decide he di ec ion
o he con e sion, we mus se a bi o he ype CSR: al p. A he same ime,
his bi is used o indica e he cu en ype beign wo ked wi h o o he ins uc ions,
so i ep esen s he des ina ion o ma . Since his ope a ion only con e s be ween
8-bi o ma s, CSR sew mus be se o SEW8.
A gumen s1 holds he alue ha ep esen s he encoding space o his ins uc ion,
which e e s o he ype o con e sion ha he ins uc ion does. This is pa o he
VFUNARY0 encoding space, and he di e en alues ep esen di e en con e sions.
s1 Name
single-wid h con e s
00000 c .xu. .
00001 c .x. .
00010 c . .xu.
00011 c . .x.
00100 c . . .
widening con e s
01000 wc .xu. .
01001 wc .x. .
01010 wc . .xu.
01011 wc . .x.
01100 wc . . .
na owing con e s
10000 nc .xu. .
10001 nc .x. .
10010 nc . .xu.
10011 nc . .x.
10100 nc . . .
Table 4.6: VFUNARY0 encoding space
As seen in able 4.6 he cus om ins uc ion c . . . uses he i s a ailable slo
o said encoding space, di ec ly a e he las single-wid h con e ins uc ion. Also
obse e ha i sha es all 3 Leas Signi ican Bi s (LSb) wi h widening and na owing
ins uc ions o he same ype ( . . ). This is a conscious design choice o simpli y
decoding.
To implemen his ins uc ion in andom es gene a ion, we ind he simples ou e
o be sligh ly modi ying he base class o isc _ ec o _ins o accoun o he
exis ence o his ins uc ion.
52
Chap e 4. Implemen a ion
1 i ual unc ion s ing con e 2asm(s ing p e ix = "");
2
3// (...)
4
5i (ins _name == VFCVT_F_F_V) begin
6bi [31:0] code;
7bi [5:0] unc 6;
8bi [2:0] unc 3;
9bi [6:0] opcode;
10 bi [4:0] s1_encoding_space;
11
12 unc 6 = 6’b100010;
13 unc 3 = 3’b001;
14 opcode = 7’b1010111;
15
16 s1_encoding_space = 5’b00100; // Encoding space VFUNARY0
17
18 code = { unc 6, m, s2, s1_encoding_space, unc 3, d, opcode};
19 asm_s = o ma _s ing($s o ma (".4by e 0x%0x", code), MAX_INSTR_STR_LEN);
20 commen = {"Cus om o ins uc ion ", ge _ins _name(), ", ", d.name(), ", ", s2.name()};
21 i (! m) begin
22 commen = {commen , ", 0. "};
23 end
24 end
25
26 i (commen != "")begin
27 asm_s = {asm_s , " #",commen };
28 end
29 e u n asm_s . olowe ();
30 end unc ion : con e 2asm
Figu e 4.29: Addi ion o isc _ ec o _ins o ep esen c . . .
Using a simila me hod as bioin o ma ic ins uc ions (see igu e 4.27), his mech-
anism gene a es he ".4by e 0x" sequence o inse his speci ic ins uc ion. The
di e ence in his case is ha mask bi could be alid and such is aken as he an-
domized alue. Randomized s1 has no meaning in his con ex since i encodes a
comple ely di e en hing. This means ha he only hing his piece o code does
is modi y he o iginal esul o con e 2asm in case he ins uc ion is ou cus om
con e sion. We hen de ine he RVVCVT ins uc ion g oup ha we will use in a ge
iles o include o exclude ou newly implemen ed ins uc ion.
One las de ail o inish implemen ing his ins uc ion lies in co ec ly speci ying
wha SEW is he en i onmen se o a he ins an his ins uc ion is gene a ed. To
ensu e his ins uc ion only appea s when SEW8 is se , we mus de ine a cons ain
ha limi s he gene a ion o his ins uc ion unde ce ain condi ions. Figu e 4.30
shows a snippe o code doing jus ha .
1// Fil e unsuppo ed ins uc ions based on con igu a ion
2 i ual unc ion bi is_suppo ed( isc _ins _gen_con ig c g);
3// ...
4i (c g. ec o _c g. ype. sew != 8) begin
5i (ins _name inside {VFCVT_F_F_V})
6 e u n 1’b0;
7end
8// ...
9 e u n 1’b1;
10 end unc ion : is_suppo ed
Figu e 4.30: Cons ain o c . . . gene a ion
This unc ion is used by he main es gene a o when deciding i an ins uc ion
should be included in he inal p og am o no . The e o e, i a c . . . is
gene a ed ou o he scope o SEW8, i will be disca ded, and a new ins uc ion will
be gene a ed.
53
Chap e 4. Implemen a ion
4.4 Co e age
4.4.1 O e iew o exis ing co e age module
To implemen unc ional co e age o ou ecen ly implemen ed cus om ins uc ions,
we mus look a pas e o s. ISA-le el unc ional co e age was po ed om he
EPI p ojec , and adap ed o he speci ic needs o eAccele a o . Implemen a ion
wise, i de ines a module o ha bo all co e age logic su ounding co e age o ec o
ins uc ions.
1pa ame e CORE_INSTR = INSTR_WIDTH;
2pa ame e CORE_DATA = XREG_WIDTH;
3
4module co _ _ins (
5inpu logic clk,
6inpu logic sn,
7inpu logic issue_ alid,
8inpu ooo_cop ocesso _i ::Insn issue_ins ,
9inpu logic [CORE_DATA-1:0] issue_da a,
10 inpu pu_pkg:: cs s_ issue_cs
11 );
Figu e 4.31: In e ace o co _ _ins co e age module
This module is decla ed in es _ha ness, whe e i will pend om he op module
o he es -bench. F om he e, a gene ic co e g oup is decla ed o adap a ound
e e y possible ec o ins uc ion and hei pa ame e s. The name is cg_ins , and
he co e poin s i con ains can be checked ou in able 3.13. An ins ance o his
co e g oup is decla ed o e e y ins uc ion. Using he cons uc o , we modula e he
co e g oup wi h pa ame e s ha ac i a e and deac i a e co e poin s. I does his
by se ing op ion.weigh o ei he 0 o 1, using a bina y e alua ion o pa ame e s
ha can ac i a e said co e poin (e.g., i a co e poin has op ion.weigh = x &
!y, his will be ac i e whene e op ion x is ac i e and y is no ). Figu e 4.32 shows
he heade o he de ini ion o cg_ins co e g oup, wi h all i s pa ame e s lis ed.
1co e g oup cg_ins (bi mask=1,
2bi =0,
3bi scala =0,
4bi load=0,
5bi indexed=0,
6bi s o e=0,
7bi immedia e=0,
8bi n_ w=0,
9bi no_ s2=0,
10 bi e en_ s2=0,
11 bi e en_ d=0,
12 bi s1_0=0, //! s1 is always 0
13 bi no_ s1=0,
14 bi no_ d=0,
15 bi unmasked=1,
16 bi only_ l0=0,
17 bi w _mask=0,
18 s ing name) wi h unc ion sample(co _ins _ ins );
Figu e 4.32: Co e g oup cg_ins de ini ion heade
A e his, he module uns on e e y clock ising edge o he clk inpu signal moni-
o ing i issue_ alid is high. When his happens, and ins uc ion has been issued,
54
Chap e 4. Implemen a ion
and a sample is cap u ed on he app op ia e co e g oup. This is done wi h a case
clause, and he ma ch is done wi h he mnemonic o he ins uc ion.
1//! Co e poin o des ina ion ec o egis e ( d)
2cp_ d: co e poin ins . d {
3op ion.weigh = !s o e & !e en_ d & !no_ d;
4bins 0 = {V0};
5bins o he = de aul ;
6}
Figu e 4.33: Example co e poin cp_ d
Code in igu e 3.2.2.2.1 shows a co e poin ha is ac i e when he ins uc ion is
no a s o e ( he e o e, des ina ion ec o egis e d is ele an ), op ion e en_ d
is inac i e (which is ano he co e poin ha akes hi s only when he des ina ion
egis e is e en), and op ion no_ d is inac i e oo ( o ins uc ions ha do no ha e
a des ina ion egis e ). Bins ep esen speci ic named alues o he a iable ha
a e a a ge o hi . We may also speci y illegal bins, and de ine sequence o bins
o ma ch desi ed alues. In he case o he example abo e, wo bins a e speci ied.
Bin 0 collec s hi s whene e he alue is 0. This is in e es ing due o V0 being he
only egis e in RISC-V V ha ins uc ions can use as a mask egis e . Bin o he s
collec s hi s whene e he p e ious condi ion does no ma ch.
4.4.2 Implemen a ion o new ins uc ions o co e age module
Func ional co e age o ec o ins uc ions is ex ended o cus om ones. All bioin-
o ma ics a e included, as well as o ma con e ing. Ano he impo an ins uc ion
which was le aside was se l, which is he ope a ion ha pe mi s al e ing ec o
CSR. To begin implemen a ion, we need o speci y one co e g oup ins ance o e e y
new ins uc ion we wan o include.
1cg_ins bpck_ _cg;
2cg_ins bunpck_ _cg;
3cg_ins bpcn _ _cg;
4cg_ins bbcn _ _cg;
5cg_ins bmax3_ _cg;
6cg_ins bmin3_ _cg;
7cg_ins bmin3_ _cg;
8cg_ins c _ _ _ _cg;
Figu e 4.34: Ins an ia ion o co e g oups
A e wa ds, inside an ini ial begin clause o co _ _ins module, we include
he cons uc o assigna ion wi h all ins uc ions, se ing needed pa ame e s o each
one o hem.
55

Chap e 4. Implemen a ion
1 bpck_ _cg = new(.name(" bpck_ "), .mask(0), .no_ s2(1));
2 bunpck_ _cg = new(.name(" bunpck_ "), .mask(0), .no_ s2(1));
3 bpcn _ _cg = new(.name(" bpcn _ "), .mask(0));
4 bbcn _ _cg = new(.name(" bbcn _ "), .mask(0));
5 bmax3_ _cg = new(.name(" bmax3_ "), .mask(0));
6 bmin3_ _cg = new(.name(" bmin3_ "), .mask(0));
7 c _ _ _ _cg = new(.name(" c _ _ _ "), .no_ s1(1), . (1));
Figu e 4.35: Cons uc o assigna ion o co e g oups
Obse e how bioin o ma ics ins uc ions ha e mask deac i a ed, and pack and un-
pack ins uc ions ac i a e op ion no_ s2. Fo o ma con e , we ac i a e no_ s1
(because o VFUNARY0 encoding space aking ha place) and (which indica es
his is a ec o ins uc ion ha ope a es wi h loa s). Nex , we mus add ou in-
s uc ions o he gene al swi ch s a emen ha ma ches ins uc ion mnemonics each
issue cycle.
1" bpck. ": bpck_ _cg.sample(ins );
2" bunpck. ": bunpck_ _cg.sample(ins );
3" bpcn . ": bpcn _ _cg.sample(ins );
4" bbcn . ": bbcn _ _cg.sample(ins );
5" bmax3. ": bmax3_ _cg.sample(ins );
6" bmin3. ": bmin3_ _cg.sample(ins );
7" c . . . " : c _ _x_ _cg.sample(ins );
Figu e 4.36: Sampling o cus om ins uc ion co e g oups
To do his ma ch, a unc ion o ge he mnemonic o incoming ins uc ions is used.
This unc ion does no con empla e ou cus om ins uc ions, so modi ied shall i
be. Including bioin o ma ics ins uc ions equi es se ing an excep ion o he no m.
This unc ion e u ns ea ly whene e i inds he ins uc ion ma ching. We can ake
ad an age o said ea ly e u n, and pu a small piece o condi ional code on op o
he ec o a i hme ic opcode g oup.
1// ...
2OP_VEC_ARITH: begin
3i (i26_a i h == 6’b111001) begin
4case (i12)
53’b000: e u n " bpck. ";// New ins uc ion
63’b001: e u n " bunpck. ";// New ins uc ion
73’b010: e u n " bpcn . ";// New ins uc ion
83’b011: e u n " bbcn . ";// New ins uc ion
93’b100: e u n " bmax3. ";// New ins uc ion
10 3’b101: e u n " bmin3. ";// New ins uc ion
11 de aul : e u n "Mal o medBioin o";
12 endcase
13 end
14 case(i12)
15 3’b101: begin
16 case(i26_a i h)
17 // ...
Figu e 4.37: Mnemonic iden i ica ion on bioin o ma ics ins uc ions
56
Chap e 4. Implemen a ion
Fo o ma con e ing, adding c . . . supposes inding he case clause ha
ma ches wi h c ins uc ions unc6, and ma ch o s1 encoding space. We append
his ins uc ion a he end o he swi ch, wi h i s iden i ie 00100, as seen in code
igu e 4.38.
1// ...
23’b001: begin
3case(i26_a i h)
46’b000000: e u n " add. ";
5//...
66’b101110: e u n " msac. ";
76’b101111: e u n " nmsac. ";
86’b100010: case(i15)
95’b00000: e u n " c .xu. . ";
10 5’b00001: e u n " c .x. . ";
11 5’b00010: e u n " c . .xu. ";
12 5’b00011: e u n " c . .x. ";
13 5’b00100: e u n " c . . . ";// New ins uc ion
14 5’b01000: e u n " wc .xu. . ";
15 5’b01001: e u n " wc .x. . ";
16 5’b01010: e u n " wc . .xu. ";
17 5’b01011: e u n " wc . .x. ";
18 5’b01100: e u n " wc . . . ";
19 5’b10000: e u n " nc .xu. .w";
20 5’b10001: e u n " nc .x. .w";
21 5’b10010: e u n " nc . .xu.w";
22 5’b10011: e u n " nc . .x.w";
23 5’b10100: e u n " nc . . .w";
24 5’b10101: e u n " nc . od. . .w";
25 endcase
26 // ...
Figu e 4.38: Mnemonic iden i ica ion on o ma con e ing ins uc ions
57
Chap e 5
E alua ion o esul s
This sec ion is aimed a epo ing esul s ga he ed o o p e ious sec ion’s e o s.
This is mean o showcase he esul s ob ained, and discuss on inal esul s. All
excep he las sec ion o his chap e discuss se -up and esul s o uns. Sec ion
5.4 goes o e ound bugs wi h all simula ions and p oblems unco e ed du ing he
de elopmen o his p ojec .
5.1 Memop simula ions
To illus a e how he mechanism wo ks wi h di e en con igu a ions, le ’s ake a
close look a a simula ion wa e o m. The es used is a simple ISA es o y
ec o memo y ins uc ion wi h uni s ides. This means ha all elemen s ead a e
nex o each o he in memo y. This p og am con ains a load and a s o e ins uc ion
o e e y SEW om 64 down o 8, doubling ec o leng h l each s ep o he way,
o main ain o al bi coun in all es s. Bo h masked and unmasked e sions o he
ins uc ions a e execu ed.
Figu e D.1 shows he code o he ISA es used o un his simula ion. Some mac os
a e used o se up he en i onmen o he es be o e execu ing he a ge ins uc-
ions. INIT_TEST ini ializes egis e s, CSR egis e s and memo y. A e ha , i
se s l and sew using se l/ se li.TEST_ l_op mainly execu es necessa y in-
s uc ions o change selec ed elemen wid h and ec o leng h be o e nex execu ion.
END_TEST loops in ini ely a ound a se i ins uc ions ha w i e o a ce ain symbol.
This way, he execu o knows when he es is inished. RV_TEST_DATA places da a
in a gumen in o symbol wo k_ egion, o anyone o access.
Name Value
max_coun 2048
p ob 750
issue_delay_ ange -10:10
pad_delay_ ange 0:20
done_delay_ ange 1:20
padd _o se _ ange -1024:1024
Table 5.1: Pa ame e s o all memop simula ion uns
To make his p ocess easie o unde s and and elimina e a iabili y be ween es s,
58
Chap e 5. E alua ion o esul s
pa ame e s a e ixed o he alues shown in able 5.1. The only pa ame e ha
does change be ween simula ion uns is d i e_mode, which de e mines gene a o
placemen .
5.1.1 Execu ion wi h d i e mode DISABLE
In his d i e mode se ing, all gene a o s a e disabled, and so is he mechanism
i sel . No scala memop s imulus is obse ed in he in e ace.
Figu e 5.1: Resul ing wa e o m wi h de aul pa ame e s
We see all s imulus is insn in e ace, whe e loads and s o es a e issued in e change-
ably. A e 8 issued ins uc ions, we obse e ios o ec o ins uc ions being issued.
This is because he ins uc ion being used o ab ica e he mask o he second hal
o he es ( id) is a ec o ins uc ion sen o he VPU oo. Simula ion inishes
wi hou e o s, and no o he ema kable hings happen on he in e ace.
5.1.2 Execu ion wi h d i e mode VEC_MEMOP
This mode o execu ion e alua es gene a ion o memops whene e a ec o ins uc-
ion is issued. The gene a o is placed in he issue o he p o ocol class. Wi h
his, 3 ou o 4 e alua ions should asse ue, and gene a e a scala memop. A e
unning he simula ion, some in e es ing scena ios appea .
5.1.2.1 Olde scala memop
The i s scala memop o he simula ion is c ea ed on he i s ins uc ion o he
es . This ec o load c ea es a scala load on he same physical add ess. Wi h
a nega i e issue delay o -8, he scala memop issue is sen immedia ely, and he
issuing o his ins uc ion is delayed by 8 cycles. Ha ing a pad_delay o 11 means
ha ou ec o load is issued be o e he pad o he scala load. On he same cycle,
he es -bench sends pad, and an o e lap epo a i es saying ha he ope a ion
did no p o oke any o e lap con lic s. Al hough no necessa y, a e 6 mo e cycles,
done is sen o he VPU, signaling he end o he scala ope a ion, and he execu ion
o he ec o load con inues.
59
Chap e 5. E alua ion o esul s
RTL eam, a bug ix was submi ed o pa ch he p oblem. I so happened ha
he in e ace was being con olled as i only one eplica ion exis ed. This mean
ha e en a e seemingly signaling all p e ious scala memops as done, handshake
eadiness ne e e u ned. One could eason ha all ins uc ions ha signaled done
h ough he second in e ace, ne e eally ook any e ec on he in e nal s a e o
eAccele a o . This mean ha he queue o pe mi ed in- ligh ins uc ions illed-up,
and e oked pe mission o u he issue new ins uc ions.
Figu e 5.6: Replica ion issue bug
Figu e 5.6 shows how issue alid was se low in cpu_memop_issue_ eady in e ace,
ne e o e u n again.
5.4.2 O e lap speci ica ion misma ch
Speci ica ion o eAccele a o s a es ha o e lap appea s only when a ec o s o e
is issued, and a younge scala load is issued hen; only i he add esses o bo h
ins uc ions o e lap. This means ha he des ina ions add ess o he ec o ins uc-
ion con ains he add ess o he scala load. When unning simula ions, his was
ound o no be he case. Figu e 5.7 shows a sequence whe e a uni -s ide ec o
s o e a ge s add ess 0x080004000 and a scala load a ge s add ess 0x180001BC4.
Vec o leng h is no long enough o co e he dis ance be ween bo h add esses, bu
he o e lap message signals a con lic .
66

Chap e 5. E alua ion o esul s
Figu e 5.7: O e lap wi hou eal add ess o e lap
A e opening an issue, implemen a ion eam explained ha he speci ica ion’s o e -
lap unc ionali y was le ou o he cu en elease o he VPU’s load s o e uni
(LSU), which is he componen esponsible o checking o e laps and memo y con-
lic s (amongs o he unc ionali i es). On he nex elease cycle, his componen
will con ain a memo y eques bu e , o main ain some so o in- ligh memo y e-
ques eco d, which will hen be used o compa ing ope a ions, and doing memo y
disambigua ion asks. A con en add essable memo y (CAM) will be used o de ec
hese memo y o e lap con lic s.
Ano he possibili y p esen ed as a solu ion is a coa se-g ain implemen a ion o he
o e lap de ec ion, meaning ha add ess o e lap can ha e some o se alue ha
educes he combina o y logic o his challenge. Fo s ided memo y accesses, calcu-
la ing o e lap may equi e a lo o logic, and hese op imisa ions would educe such
compu a ional need.
5.4.3 Scala memop iming s alls VPU
Sub-in e ace cpu_memop has no iming es ic ions in hei speci ica ion. A e
andomising pa ame e s in gene a ed memops, we ound ou ha whene e issue
and done messages coincide on he same cycle, an o e lap epo is e u ned, bu
ins uc ions s op e u ning esul s a all. A i s glance, his seemed o be a p oblem
wi h he es -bench i sel , and he way i con olled commi _ i: jumping be ween
bigge and smalle alues al e na i ely. This was ixed by excluding scala memops
om commi _ i, bu he issue was s ill unsol ed. This issue is s ill open, and pa
o an ongoing ask.
67
Chap e 5. E alua ion o esul s
Figu e 5.8: Timing issue bug
Seen in igu e 5.8 is he a o emen ioned bug. F om he ed cu so onwa ds, eAccel-
e a o ne e e u ns ins uc ion esul s, and simula ion imes-ou .
5.4.4 Bioin o ma ic ins uc ions ISS implemen a ion bug
The golden e e ence model o bioin o ma ics ins uc ion was al eady implemen ed
be o e his hesis began. Al hough his was he case, i was no me ged o he
main b anch, and became a ea u e le aside. When his p ojec s a ed, he gen-
e a ed cons ained andom es we e used o ind unco e ed co ne cases. In one o
such execu ions, an unexpec ed ne e -ending simula ion was ound wi h ins uc ion
bpcn . . The p oblem ended up being an unp edic ed in ege o e low ha made
he execu ion o he ins uc ion in spike un p ac ically o e e . The bug was sol ed,
and andom es con inued o be used o ind mo e co ne cases in he design.
5.4.5 Illegal CSR ope a ions no signaled
CSR ins uc ions ha do no y o modi y use ead-only CSR execu e g ace ully.
Howe e , when we y o o ce an illegal ins uc ion excep ion by gene a ing aul y
CSR accesses, we ind a misma ch be ween he DUT and he ISS, s a ing ha spike
de ec ed and illegal ins uc ion (co ec ) ha he VPU did no signal. This bug has
been placed in an issue, pending o be e ised by someone om implemen a ion.
5.4.6 Implemen a ion e o s o c . . . ins uc ion
When exe cising he model wi h ou newly added c ins uc ions, a misma ch
be ween he VPU and ISS was ound. Fi s , he ISS was misin e p e ing he in-
s uc ion i sel as illegal. This is because checks we e being done on he s1 egis e
o a oid o e lap wi h d des ina ion egis e . As explained in implemen a ion sec-
ions o his ins uc ion, s1 egis e encoding space o his speci ic ins uc ion was
ins ead used o embed ype o con e sion.
68
Chap e 5. E alua ion o esul s
A e p omp ly sol ing his issue, he misma ch did no disappea . When looking
deepe in o i , we ound ha he implemen a ion o he con e sion in spike and in
he DUT did no coincide. We la e go hin s ha he implemen a ion o he VPU
was inco ec . As his is some hing ha was ound a la e s ages o he p ojec , such
issue is ye o be sol ed. This is why c . . . ins uc ion is no included in o
he es esul s when looking a co e age speci ically. An issue has been opened o
u he analyse his issue.
69
Chap e 6
Conclusions and u u e wo k
This p ojec has co e ed all e i ica ion e o s done o eP ocesso ’s VPU, eAccele a-
o . We success ully included cus om e i ica ion componen s o he e i ica ion en-
i onmen o es memo y cohe ence ansac ions. The es -bench was also adap ed
o implemen issuing CSR ins uc ions o he sake o es ing ope a ions on mapped
egis e s inside he VPU. We can also say we implemen ed cus om ins uc ions in o
he andom es gene a o o he en i onmen , all wi hou he co esponding so -
wa e s ack, which helps unco e ye mo e bugs by gene a ing co ne cases in a
con olled epea able way. All o his was hen used o collec co e age, seeing wha
pa s o he main module we e di ec ly a ec ed by he in eg a ion o hese changes.
The c ea ion o cus om e i ica ion componen s o s imula e un es ed sub-in e aces
helped unco e a se ies o bugs ha would o he wise ha e gone igh unde he ada .
E en i u u e p ojec s do no need a cohe ence sub-in e ace, many o he s will ha e
cus om solu ions ha equi e he cons an s imulus o "ga bage" sequences. Being
able o implemen ou cus om ins uc ions independen ly o so wa e eams doings
is some hing e y aluable oo. Depending on such so wa e s ack o enable es ing
is e y limi ing. Wi h his, independence is gained on ha on .
On he back-side, i his p ojec e-s a ed oday and we could do hings di e en ly,
we would p obably conside pushing ea lie on inding co e age me ics. The in e-
g a ion o all ea u es on he main b anches o he eposi o y has no been possible
in mos cases. Including all o hem ea lie in he p ojec could ha e gi en us an
e olu ion o co e age o e ime. Gi ing ime o pipelines o inc emen ally show he
p og ess in co e age could ha e been a e y aluable me ic, and one ha we did
no ake ad an age o ea ly enough. A e e e y hing, au oma ing e i ica ion o
designs is he mos impo an ask ha a e i ica ion enginee de elops. Ha ing a
sel -su icien sys em ha is able o ell how much a design has been exe cised is
he ul ima e goal. Howe e , es s showed in sec ion 5.3 indica e ha when such
inclusion is pe o med, ou co e age me ics will inc ease p omp ly.
To conclude, he de elopmen o his p ojec was s a egically planned a he ini ial
s ages wi h a wide-scope o possibili ies o easy b anching and adap abili y. Such
planning has p o ed use ul, ending wi h a mo e han sa is ac o y esul . All planned
asks ha e been execu ed in a way o ano he , and ha is o be acknowledged.
70
6.1 Fu u e wo k
As men ioned in he in oduc ion, eP ocesso p ojec will cease ope a ions on Ma ch
31s , 2025. This means ha e o s made in his hesis will no only go owa ds
he p ojec i sel , bu also as a con ibu ion o u u e p ojec s b anching om i .
The idea is o be able o ecycle any and e e y use ul wo k ha his p ojec has
b ough up on he able. Wi h ha said, he a chi ec u e o eP ocesso will se e as
inspi a ion o u u e p ojec s ha may y o eplica e a VPU wi h di ec L2 cache
access. This is a somewha di e en a chi ec u e, which p omises g ea ad an ages
o e o he co-p ocessing pa adigms.
•Sol ing all ound bugs. Wo king hand-in-hand wi h all eams in ol ed in his
p ojec is necessa y o sol e bugs ha appea ed while de eloping his hesis.
Making su e ha s anda ds coincide is a pe ec oppo uni y o imp o e on
speci ica ions and documen a ion, which his p ojec c i ically needs.
•Adding es gene a ion in o CI pipelines. As said ea lie in his chap e , in-
eg a ing all wo k done in o he p ojec ’s pipelines will help us quan i y how
much has his p ojec eally a ec ed ou design e i ica ion s a us, allowing
RTL eam de elope s o c ea e new ea u es, as well as easily checking whe he
ixing o he s may b eak al eady exis ing mechanisms.
•Ex ending co e age o in e nal modules. This hesis has been cen e ed a lo
a ound ex ending ins uc ion-le el co e age. Howe e , de eloping new co -
e age modules o asse co ec unc ionali y o eAccele a o ’s in e nal com-
ponen s is desi ed. An example o a ele an unco e ed module is he Load
Managemen Uni , o LMU: a module ha p ocesses di e en load ins uc-
ions, like s ided loads. Placing new co e age inside his componen would
help us ensu e g ea e unde s anding o he VPU’s le el o s imulus.
•Adding CSR ins uc ions o co e age. Adding hese ins uc ions o ISA co e -
age would p omo e he comple ion o ins uc ion-le el co e age, adding e e y
possible ins uc ion ha can be issued o he VPU. Albei no c ucial, his
would help ec ea e ano he eal-li e scena io ha eAccele a o inds i sel in o
when in eg a ed wi h he eal eP ocesso .
•Ve i ica ion o o he p ojec s. The e exis s o he p ojec s in simila si ua-
ions as eP ocesso , whe e he so wa e s ack limi s he quan i y o es ing
ha DV eam is able o do. Wi h he know-how o implemen hese cus om
ins uc ions, he implemen a ion can be eplica ed in hose o he p ojec s.
Implemen ing mechanisms simila o memop is also aluable o hose asks,
as men ioned a he s a o his chap e . Ga bage sequences a e ye ano he
way o di ec s imulus o desi ed pa s o he design.
71

Re e ences
[1] Lluc Al a ez e al. “eP ocesso : Eu opean, Ex endable, Ene gy-E icien , Ex eme-
Scale, Ex ensible, P ocesso Ecosys em”. en. In: P oceedings o he 20 h ACM
In e na ional Con e ence on Compu ing F on ie s. Bologna I aly: ACM, May
2023, pp. 309–314. isbn: 9798400701405. doi:10.1145/3587135.3592178.u l:
h ps://dl.acm.o g/doi/10.1145/3587135.3592178 ( isi ed on 09/24/2024).
[2] AMBA®CHI A chi ec u e Speci ica ion. English. Ma . 2024. u l:h ps://
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74
Appendix A
Con ex and scope
A.1 Con ex
A.1.1 In oduc ion
This p ojec is pa o my Compu e in o ma ics hesis. Th ough an academic ag ee-
men wi h Uni e si a Poli ècnica de Ca alunya (UPC), I ha e been wo king as an
in e n a Ba celona Supe compu ing Cen e - Cen e Nacional de Supe compu ació
(BSC-CNS). He e, I was in oduced o he ha dwa e design and e i ica ion wo k-
low, and was gi en an oppo uni y o gain hands-on expe ience. The eP ocesso
ini ia i e has been one o he la es p ojec s o which I ha e been included, he
e i ica ion o which is he basis o his hesis.
A.1.2 The ask
The ask o his p ojec is o ex end and de elop an al eady-exis ing e i ica ion
en i onmen o eAccele a o ; a RISC-V ec o accele a o de eloped in he con ex
o he eP ocesso p ojec . Make su e all he emaining in e aces and sub-in e aces
wo k p ope ly, and se o h a quali y e i ica ion plan o e i ica ion e o s o
come. Ex end co e age e o s, and wo k owa ds a ull- ledged es bench whe e
es s can be un wi h con idence and e iciency, making p ope use o he ools a
hand.
Pas de elopmen o his p ojec has been s eady in ime, bu many modules a e s ill
pending o be ho oughly e i ied, and hei unc ionali y o be co ec ly checked.
The e o s o his hesis a e di ec ed a accomplishing as much o ha as possible.
A.1.3 Main concep s
This sec ion aims o p o ide much needed con ex o unde s and e e y hing ha is
alked abou in his documen . Howe e , he needs o he p ojec a i s closing s ages
bene i om ha ing hose explana ions close o he beginning. Since appendixes
A, B and C we e pa o a s and-alone documen , main aining his s uc u e was
necessa y. Howe e , hey ha e now been eloca ed o chap e 2, whe e hey a e
ex ended and comple ed, in o de o a oid epe i ion and c a a nice in oduc ion
o he eade .
75
Chap e B. Planning
•VP2 - Ex end and p une e i ica ion plan Modi y he sha ed documen ,
o c ea e a new one o desc ibe he e i ica ion plan o be ollowed. Re ise
wi h he eP ocesso alida ion eam, o clea any co ne cases and pu o h a
quali y documen .
B.1.2.2 Tes bench ex ension and de elopmen
The e a e wo main pa s ha con o m his sec ion: de elopmen o ec o memo y
ope a ion in e ace suppo and e i ica ion o CSR accesses and in e ac ions.
•TB1 - Read documen a ion abou he memop in e ace Unde s and
he necessi y o memo y ope a ion signalling, and comp ehend he p o ocol
ollowed by he EPA in e ace.
•TB2 - C ea e mechanism o o e lap memo y ope a ions Combining
scala and ec o memo y ope a ions, igge he mechanism a will ( andomly
o di ec ed).
•TB3 - Add pa ame e s o es bench con igu a ion Pa ame ize mech-
anism c ea ed in TB2, o enable econ igu a ion.
•TB4 - Shu le pa ame e s, and es mul iple con igu a ions Repo
esul s on all possible iming cases, and compa e wi h speci ica ion.
•TB5 - Read documen a ion abou CSR module Unde s and he han-
dling o CSR egis e s inside he eAccele a o , and how o in e ac wi h hem.
•TB6 - Mimic con ex swi ch beha iou wi h CSR in e ac ions Tes
CSR in e ac ions inside o eAccele a o .
•TB7 - Repo esul s Repo TB4 and TB6 esul s.
B.1.2.3 Tes gene a ion and unning
Iden i ie : TG#
•TG1 - Ga he con ex on cu en es gene a ion s a us Ga he con ex
on cu en es gene a ion s a us o he eAccele a o es bench.
•TG2 - Ga he con ex on cu en es golden e e ence model s a us
ISS (Ins uc ion Se Simula o ) Spike[31] de ails a e o be s udied. Unde s and
how o co-simula ion mechanism enables he es bench o eliably de e mine
co ec ness, and how he connec ion h ough Sys emVe ilog Di ec P og am-
ming In e aceDPI-C[34] wo ks.
•TG3 - Make ISS suppo cus om ins uc ions Implemen he subse
o cus om ins uc ions de ined in VP2 in o he ISS. This will enable he es
bench o check co ec unc ionali y o such ins uc ions in he design.
•TG4 - Make es gene a o wo k wi h cus om ins uc ions Implemen
he subse o cus om ins uc ions suppo ed on he ISS in TG3.
•TG5 - Gene a e and un es s Use he be o e men ioned ools o c ea e
es s wi h he newly implemen ed ins uc ions.
•TG6 - Repo esul s Repo TG* esul s; specially TG5 es s s a us and
cus om ins uc ions suppo .
82

Chap e B. Planning
B.1.2.4 Co e age ex ension
•CV1 - Ga he con ex on pas co e age e o s Read pas co e age
epo s and unde s and p og ess a ained. Mee wi h people in ol ed in such
asks and ask o de ails and ecommenda ions. This ask is compa ible wi h
o he knowledge ga he ing asks (such as VP1, TB1 and TG1).
•CV2 - A ain u he de ail on module speci ica ions Mee wi h RTL
implemen a ion eam and eques de ailed speci ica ions o e e y unspeci ied
module. Ask o guidance and modules whe e co e age would be necessa y o
use ul.
•CV3 - De ine co e age poin s and add asse ions Take in o ma ion
ex ac ed om CV2, and de ine co e poin s, asse ions, and o he ules o
p epa e unc ional co e age ex ension.
•CV4 - Collec and analyse co e age da a Collec co e age da a, and
ex ac conclusions. CV3 and CV4 a e suscep ible o be cycled mul iple imes,
i co e age esul s sugges so.
B.1.3 P ojec documen a ion
G oup o asks o documen e e y hing he p ojec p oduces. P oduces he inal
epo o he p ojec .
•PD1 - Collec ion o e en s In e mi en ask pe o med a he end o e -
e y ask subg oup. Anno a e esul s non- o mally o accumula e hem in a
cen alised documen .
•PD2 - Redac inal documen a ion Ga he all anno a ions and c ea e inal
documen . C ea e conclusions, and polish de ails.
•PD3 - P epa e p esen a ion Ensemble a p esen a ion, and p ac ice public
speech p esen ing he p ojec ’s main poin s.
B.2 Resou ces
Resou ces a e an essen ial pa o a p ojec ’s success. Co ec esou ce managemen
can lead he way o a success. Lack he eo will condemn any p ojec o despe a ion
and unnecessa y s ess. Resou ces used o his p ojec a e nea ly subdi ided in o
Human esou ces (HR), Ha dwa e esou ces (HW) and So wa e esou ces (SW).
G oup ID Desc ip ion
HR DEV Main p ojec de elope . Pa o he DV eam.
HR DV Design Ve i ica ion Team wo king on eP ocesso .
HR PM P ojec manage ( hesis supe iso ).
HR RTL Regis e T ans e Le el de elopmen eam.
HW LT Lap op o de eloping he p ojec ; Dell La i ude 7440 wi h 32GB and In el i7-1365U.
HW HP Headphones used o a end online mee ings.
SW NV NeoVim[6]; Tex edi o used o modi y code and documen s.
SW GP Tool o c ea e Gan diag ams; Gan P ojec [29].
SW ZT Used o collec and nea ly s o e bibliog aphy en ies; Zo e o[44].
SW ZO Videocon e encing ool o ca y ou mee ings; Zoom [43].
SW QS Siemens ool o un RTL simula ions; Ques aSim [26].
SW TX la ex dis ibu ion o locally compile documen s; TeX Li e [36].
Table B.1: Resou ces used by he p ojec
83
Chap e B. Planning
B.3 Es ima es and he Gan
ID Name Time(h) P edecesso s Resou ces
Human Ha dwa e So wa e
P ojec managemen 115
PM1 Con ex and scope 30 DEV, PM LT NV, TX, ZT
PM2 P ojec planning 30 DEV, PM LT NV, TX, ZT, GP
PM3 Budge and sus ainabili y 20 DEV, PM LT NV, TX, ZT
PM4 Final Documen 5 PM1, PM2, PM3 DEV, PM LT NV, TX, ZT
PM5 Mee ings, sync and planning 30 DEV, PM, DV, RTL LT, HP ZO
P ojec de elopmen 525
Ve i ica ion plan 60
VP1 S udy exis ing e i ica ion plan 20 DEV, DV LT NV
VP2 Ex end and p une e i ica ion 40 VP1 DEV, DV LT NV
Tes bench ex ension 210
TB1 S udy documen a ion on memop in e ace. 30 DEV, RTL LT NV
TB2 C ea e memop o e lap mechanism 50 TB1 DEV LT NV, QS
TB3 Pa ame ize mechanism 20 TB2 DEV LT NV, QS
TB4 Tes con igu a ions 15 TB3 DEV LT NV, QS
TB5 S udy documen a ion on CSR module 30 CV2 DEV, RTL LT NV
TB6 Mimic con ex swi ch CSR in e ac ions 50 TB5 DEV LT NV, QS
TB7 Repo esul s 15 TB4, TB6 DEV LT NV, TX
Tes gene a ion and unning 172
TG1 S udy cu en es gene a ion s a us 30 DEV LT NV
TG2 S udy cu en ISS s a us 30 DEV LT NV
TG3 Make ISS suppo cus om ins uc ions 50 TG2 DEV LT NV, QS
TG4 Make es gene a o wo k wi h cus om ins uc ions 50 TG1, TG3 DEV LT NV, QS
TG5 Gene a e and un es s 30 TG4 DEV LT NV, QS
TG6 Repo esul s 10 TG3, TG5 DEV LT NV, TX
Co e age ex ension 83
CV1 S udy pas co e age e o s 30 DEV LT NV
CV2 A ain u he de ail on module speci ica ions 8 CV1 DEV, RTL LT ZO
CV3 De ine co e age poin s and add asse ions 30 CV2 DEV LT NV, QS
CV4 Collec and analyse co e age da a 15 CV3 DEV LT NV, QS
P ojec documen a ion 140
PD1 Collec e en s 30 DEV LT NV
PD2 Redac inal documen a ion 80 PD1 DEV LT NV, TX, ZT
PD3 P epa e inal p esen a ion 30 PD2 DEV, PM LT NV, TX, ZT
To al 780
Table B.2: Time es ima ions pe ask
Figu e B.1: Gan cha
84
Chap e B. Planning
B.4 Risk managemen : al e na i e plans and obs a-
cles
F om Sep embe 16 h, 2024 un il Oc obe 2nd, 2024, he e was an ou age o he
so wa e esou ce SW-QS. This p oblem is sol ed now, bu a ec ed all asks ha
depended on he ool. To be exac , ask TB3 was a ec ed and could no p og ess.
This lack o licenses caused o he HM-DV sub- eams o pu e o s in o ying o
un he p ojec s wi h o he simila ools, bu no luck was ound in mos o hem.
E o s we e pu in o ha oo, bu go nowhe e. This led o he s a o wo o he
simul aneous asks: VP2 and CV1 whe e commenced be o e ini ial planning, in
o de o suppo such delay. This whole si ua ion al e ed he p ojec du a ion by
a ound 60 hou s, which a e accoun ed in he inal hou s sum.
O he isks o ake in o accoun a e ha dwa e ela ed ones. In case some hing
happened o HW-LT, he helpdesk depa men inside BSC-CNS would subs i u e
he equipmen , bu machine se up ime should be aken in o accoun . The e ec s
o his casuis ic a e much lowe han he licenses one, bu should be conside ed
none heless. Abou hal a wo k day, o 4 hou s o e-se up such be needed o ix
such a ailu e. Tasks like documen ing a e much less esou ce-needy, and could be
done om ano he unc ioning compu e , wi hou he need o such se -up ime.
Human esou ces a e p one o ail oo. Al hough all asks a e mainly dependen on
HM-DEV;HM-DV and HM-RTL a e needed o in o ma ion ga he ing. Com-
munica ion is ne e pe ec , and always causes some kind o delay. Al hough mino ,
ime alloca ed o in o ma ion eques s a e elonga ed wi h miscommunica ion si -
ua ions in mind. Since his hesis has 4 independen wo king " h eads", jumping
be ween hem would help suppo such ime delays.
85
Appendix C
Budge and Sus ainabili y
C.1 Budge
C.1.1 Iden i ica ion o cos s
To iden i y he cos s o his p ojec , we mus e- isi esou ces men ioned in pas
deli e ables.
C.1.1.1 Human esou ces
Human esou ces iden i ied o ask iden i ica ion we e c ea ed wi h wo k ole in
mind. In eali y, hese oles do no co espond wi h ac ual posi ion o sala y. Fo
his eason, o iden i y human esou ces cos s, some di e en oles a e iden i ied,
and p ope ly mapped o ask iden i ica ion oles.
•Ve i ica ion enginee This ole can be mapped o HR-DEV o HR-DV.
I akes pa in all asks o he p ojec a some le el o ano he .
•P ojec manage This ole is mapped o HR-PM. I akes pa on all p ojec
managemen asks ha in ol e any kind o planning and eunion (PM5 and
CV2).
•RTL design enginee This ole is mapped o HR-RTL, and akes espon-
sibili y o all mee ing and synch oniza ion asks (PM5 and CV2)
C.1.1.2 Gene al cos s
In all o he cases, esou ces p e iously iden i ied do map di ec ly o hei iden i ie
(HW-* and SW-*). Ha dwa e esou ces all ca y some kind on cos . So wa e
esou ces do no ; mos o he ools used a e ee and open sou ce so wa e (FOSS)
o o e some kind o ee ie se ice. Fo o he cos s, elec ici y, wo kspace and
in e ne se ice a e conside ed.
C.1.1.3 Con ingency and inciden als
Task es ima es a e gene ous bo h in ime and esou ces. This means ha some kind
o cushion exis s o small un o eseen e en s. None heless, conside ing a con ingency
ma gin is impo an o u he ensu e he co ec de elopmen o he p ojec . A 10%
con ingency ma gin is de ined o such undesi ed cases.
86
Chap e C. Budge and Sus ainabili y
C.1.2 Cos es ima es
C.1.2.1 Human esou ces cos
In he case o human esou ces, HR-DV and HR-RTL a e eams o people. Fo his
eason, no e e y ole on he ollowing lis co esponds exac ly o one ole men ioned
on p e ious deli e ables.
Fo he sala ies pe hou app oxima ions, 223 yea ly wo king days a e assumed ( his
is because BSC-CNS is loca ed in Ba celona, wi h 246 wo king days, and 23 paid
aca ion days), and a 7:30h daily schedule is used. This gi es us a o al o 1672.5
yea ly wo king hou s. This numbe will be used o he es o he p ojec budge
es ima ions.
Fo ge ing he hou ly g oss sala y + Social Secu i y (SS) ax, he ad ised 35%
inc ease is applied.
Role Annual g oss sala y (€) G oss sala y/hou (€) G oss sala y/hou + SS (€) To al hou s p ojec Role o al cos
Ve i ica ion enginee [30] 35000 20.93 28.26 780 22042.8
P ojec manage [33] 48000 28.70 38.75 38 1472.5
RTL design enginee [32] 35000 20.93 28.26 38 1073.88
Table C.1: Cos o human esou ces
C.1.2.2 Ha dwa e esou ces cos
To calcula e amo iza ion cos we ake he p opo ional pa o he cos using he
ac ion o used hou s o e o al hou s. This, will gi e us he app oxima e "use ul
cos " we ha e aken ou o he p oduc du ing he p ojec , o how much o i s e ail
alue has been used. I is wo h o emphasize his is an app oxima ion.
ID I em To al e ail p ice (€) Use ul li e (yea s) Amo iza ion cos o he p ojec
LT Dell La i ude 7440 wi h 32GB and In el i7-1365U 1500 5 139.91
HP EPOS PC 5 Cha 30 3 0.23
Table C.2: Cos o ha dwa e esou ces
C.1.2.3 So wa e esou ces cos
Mos o he ools used a e ee and open sou ce so wa e (FOSS), o a ee license is
p o ided inde ine ly. Fo he sake o comple eness, all lis ed so wa e in B.1 will be
included in he budge calcula ions. The only paid so wa e, Ques aSim ad anced
simula o , is only used on some de elopmen asks. To be exac , TB2 o TB4, TB6,
TG3 o TG5, CV3 and CV4. All o hese ack up 310 hou s, which a e used o
compu e he amo iza ion cos o his ool in he p ojec .
ID I em To al e ail p ice (€) Use ul li e (yea s) Amo iza ion cos o he p ojec (€)
NV Neo im 0.00 ∞0.00
GP Gan P ojec 0.00 ∞0.00
ZT Zo e o 0.00 ∞0.00
ZO Zoom 0.00 ∞0.00
QS Ques aSim Ad anced Simula o 1.794,58 1 332.63
TX TeX Li e 0.00 ∞0.00
Table C.3: Cos o so wa e esou ces
87

Chap e C. Budge and Sus ainabili y
C.1.2.4 O he esou ces cos
O he cos s include elec ici y, wo kspace and in e ne access. All o hese a e paid
on a mon hly basis, so he du a ion o he p ojec has a di ec e ec on he inal
amoun ha hese esou ces con ibu e o gene al cos s. Elec ici y p ices a e he
2023 a e age in Spain [25], and he amoun consumed is an app oxima ion seen in [8].
Fo wo kspace cos , he o icial da a o a e age p ice pe squa e me e in Ba celona
be ween Augus and Sep embe is used[24]. In e ne access se ice cos is calcula ed
conside ing a symme ic 1Gb connec ion plan o businesses in Ba celona[35].
Resou ce Cos calcula ion Cos (€)
Elec ici y 110.6kW h
yea ×m2×10m2×0.10020 e
kW h ×1
12
yea
mon hs ×6mon hs 55.41
Wo kspace 16.45 e
m2×mon h ×10m2×6mon hs 987
In e ne 38.80 e
mon h ×6mon hs 232.8
Table C.4: Cos o o he esou ces
C.1.2.5 To al cos es ima ions
Ac i i y Amoun (€) Obse a ions
PM1 - Con ex and scope 847.80 Ve i ica ion enginee , 30 hou s
PM2 - P ojec planning 847.80 Ve i ica ion enginee , 30 hou s
PM3 - Budge and sus ainabili y 565.20 Ve i ica ion enginee , 20 hou s
PM4 - Final documen 141.30 Ve i ica ion enginee , 5 hou s
PM5 - Mee ings, sync and planning 2858.10 RTL enginee , Ve i ica ion enginee , P ojec manage , 30 hou s
VP1 - S udy exis ing e i ica ion plan 565.20 Ve i ica ion enginee , 20 hou s
VP2 - Ex end and p une e i ica ion plan 1130.40 Ve i ica ion enginee , 40 hou s
TB1 - S udy documen a ion on memop in e ace 847.40 Ve i ica ion enginee , 30 hou s
TB2 - C ea e memop o e lap mechanism 1413.00 Ve i ica ion enginee , 50 hou s
TB3 - Pa ame ize mechanism 565.20 Ve i ica ion enginee , 20 hou s
TB4 - Tes con igu a ions 423.90 Ve i ica ion enginee , 15 hou s
TB5 - S udy documen a ion on CSR module 847.80 Ve i ica ion enginee , 30 hou s
TB6 - Mimic con ex swi ch CSR in e ac ions 1413.00 Ve i ica ion enginee , 50 hou s
TB7 - Repo esul s 423.90 Ve i ica ion enginee , 15 hou s
TG1 - S udy cu en es gene a ion s a us 847.80 Ve i ica ion enginee , 30 hou s
TG2 - S udy cu en ISS s a us 847.80 Ve i ica ion enginee , 30 hou s
TG3 - Make ISS suppo cus om ins uc ions 1413.00 Ve i ica ion enginee , 50 hou s
TG4 - Make es gene a o wo k wi h cus om ins uc ions 1413.00 Ve i ica ion enginee , 50 hou s
TG5 - Gene a e and un es s 847.80 Ve i ica ion enginee , 30 hou s
TG6 - Repo esul s 282.60 Ve i ica ion enginee , 10 hou s
CV1 - S udy pas co e age e o s 847.80 Ve i ica ion enginee , 30 hou s
CV2 - A ain u he de ail on module speci ica ions 762.16 RTL enginee , Ve i ica ion enginee , P ojec manage ; 8 hou s
CV3 - De ine co e age poin s and add asse ions 847.80 Ve i ica ion enginee , 30 hou s
CV4 - Collec and analyse co e age da a 423.90 Ve i ica ion enginee , 15 hou s
PD1 - Collec e en s 847.80 Ve i ica ion enginee , 30 hou s
PD2 - Redac inal documen a ion 2260.80 Ve i ica ion enginee , 80 hou s
PD3 - P epa e inal p esen a ion 847.80 Ve i ica ion enginee , 30 hou s
To al CPA (Cos s pe ac i i y) 24589.18
HW-LT - Lap op 139.91 Calcula ed in able C.2
HW-HP - Headphones 0.23 Calcula ed in able C.2
SW-TX - TeX Li e 0.00 F ee o use
SW-NV - NeoVim 0.00 F ee o use
SW-GP - Gan P ojec 0.00 F ee o use
SW-ZT - Zo e o 0.00 F ee o use
SW-ZO - Zoom 0.00 F ee ie used, o adhe ed o edi is[12]
SW-QS - Ques aSim 332.63 Calcula ed in able C.3
SW-TX - TeX Li e 0.00 F ee o use
Elec ici y 55.41 Calcula ed in able C.4
Wo kspace 987.00 Calcula ed in able C.4
In e ne 232.80 Calcula ed in able C.4
To al CG (Gene al Cos s) 1747.75
To al Cos s (To al CPA + To al CG) 26336.93
Con ingency 2633.69 Con ingency ma gin = 10%. Reasoning in C.1.1.3
To al DC+IC+Con ingency 28970.62
SW-QS licenses ou age 423.90 Ve i ica ion enginee , 60 hou s. Risk 25%
Teamwo k and ime managemen 70.65 Ve i ica ion enginee , 10 hou s. Risk 25%
Lack o heo e ical knowledge 141.30 Ve i ica ion enginee , 20 hou s. Risk 25%
To al inciden als 635.85
TOTAL 29606.47
Table C.5: Budge s uc u e
88
Chap e C. Budge and Sus ainabili y
C.1.3 Managemen con ol
In o de o con ol all he possible budge de ia ions, indica o s a e desc ibed o
calcula e such o se s. The basic idea is calcula ing he di e ence be ween eal
esou ces cos consumed minus es ima ed esou ces planed, and quan i y e o .
C.1.3.1 Di ec cos s
Possible causes o budge de ia ions in Di ec Cos s un on 2 possible scena ios:
CPA and GC.
Fo CPA, a sala y miscalcula ion, o a empo al sub-es ima ion o a ask, can lead
o a o al budge o e un. To epo hese 2 igu es, he ollowing calcula ions can
be used.
Fo a budge inc ease caused by sala y miscalcula ion.
(RealCos P e Hou −Es ima edCos P e Hou )×P osi ionRoleHou s
Fo a budge inc ease caused by ime sub-es ima ion o asks:
X
i∈c sk
((RealT askT imei−Es ima edT askT imei)×P osi ionRoleP iceP e Hou i)
Whe e c sk is he se o comple ed asks.
C.1.3.2 Indi ec cos s
Ha dwa e, So wa e o O he cos s can di ec ly a ec IC a iance.
In case o ha dwa e, use ul li e es ima ion de ia ions can inc ease he o al budge
by he ollowing amoun :
P ice ×Hou sUsed
RealUse ulLi e ×1672.5−Es ima edCos
Whe e 1672.5 s ands o wo king hou s conside ed pe yea , because RealUse ulLi e
is exp essed in whole yea s. So wa e esou ces de ia ions a e no conside ed, since
o e ime on di ec cos s a e al eady conside ed in Di ec Cos s, and he o mula is
exac ly he same.
C.1.3.3 Con ingency and inciden als
Con ingency o e head conside ed is ela i ely low, since such cau ion o he p ojec
is al eady been accoun ed o in he gene al app oxima ions. A 10% inc ease on
cos is easily su passed by majo ool ou ages, o human esou ces o e imes. The
o mula o calcula e whe he con ingency cos s ha e been su passed is he ollowing:
(DCes +ICes −DCac −ICac )×1 + Con ingencyP e cen
100 
Whe e ac s ands o ac ual eal IC and DC cos s, and es s ands o es ima ed cos s
a he planning phase. I he o mula e u ns a numbe > 0, con ingency limi has
been su passed.
89
Chap e C. Budge and Sus ainabili y
C.1.3.4 To al cos s
To al cos s es ima ions a e he sum o all cos a ia ions conside ed be o e, also
aking inciden als in o accoun . Inciden als in his p ojec suppose an inc ease in
hou s spen on a speci ic ask. Depending on he ole, he inciden al will suppose a
di e en budge a ia ion inc ease. To calcula e he o al a ia ion:
a DC + a IC + a con ingency + a inciden als
Whe e a s ands o a iabili y in he cos speci ied by he subsc ip .
These con ol mechanisms will be applied bo h on a egula and spo adic manne .
The o me (abou once a mon h) will ac as an ala m whene e any o he indica o s
goes o e he limi . The la e will se e as a ool o quan i y he s a us o he p ojec
whene e HR-PM sees i use ul.
C.2 Sus ainabili y epo
C.3 Ini ial sus ainabili y epo
Fo all IT p ojec s o h i e, a sus ainabili y epo is mos de ini ely necessa y.
This hesis aims no hing sho o such excellence, and p o ides hese sel - e lec ions
in ollowing subsec ions. The epo aims o un eil he le el on knowledge and ca e
ha has been pu in o 3 sepa a e poin s o iew.
•PPP, o P ojec Pu in o P oduc ion, is he poin o iew ha includes he
planning, de elopmen and implemen a ion o he p ojec .
•Exploi a ion e e s o he use ul li e o he p ojec , and he pos -de elopmen
indica o s.
•Risks inhe en o he p ojec du ing he en i e y o i s li e cycle (de elopmen ,
use ul li e and disman ling).
To u he illus a e all di e en poin s, he ollowing ma ix was supplied by GEP
u o s:
Figu e C.1: Sus ainabili y Ma ix o he bachelo ’s hesis. P o ided by GEP u o s.
And a su ey was p omp ed o be answe ed in o de o acili a e his le el o in o-
spec ion. A e submi ing my esponse o build some sel -awa eness, he ollowing
ques ions a e o be answe ed ega ding he sus ainabili y o he p ojec a planning
s age.
90
Chap e C. Budge and Sus ainabili y
C.3.1 En i onmen al dimension
Rega ding PPP: Ha e you es ima ed he en i onmen al impac o unde -
aking he p ojec ? Ha e you conside ed how o minimise he impac ,
o example by eusing esou ces?
The e is a massi e amoun o ac o s ha should be aken in o conside a ion o make
an e en sligh ly educa ed es ima ion on he en i onmen al impac o his p ojec .
Howe e , knowing ha he use o esou ces, in mos cases, is no ma e ial; we may
be able o na ow down en i onmen al impac ac o s o esou ces consumed by he
de elope s hemsel es. Reducing ha should su ice o g ea ly lowe he en i on-
men al impac o his p ojec , bu ading o com o .
Rega ding Exploi a ion: How is he p oblem ha you wish o add ess
esol ed cu en ly (s a e o he a )? In wha ways will you solu ion
en i onmen ally imp o e exis ing solu ions?
The se o ools and echniques o co ec ly e i y all he componen s o his p ojec
a e no hing new, and many unc ional es benches exis , bu all o hem need speci ic
modi ica ions o g an co ec e i ica ion o he design unde es ing (DUT). This
hesis will build on op o exis ing knowledge, and will y o adap exis ing solu ions
o speci ic p oblems o his p ojec . This way, cu en ly exis ing solu ions will bene i
om u he explo a ion o common (o no so common) p oblems ha may a ise
du ing he de elopmen o his p ojec . This e o s will su ely help sa e esou ces
when de eloping u u e ha dwa e.
C.3.2 Economic dimension
Rega ding PPP: Ha e you es ima ed he cos o unde aking he p ojec
(human and ma e ial esou ces)?
Yes, and we a e con iden in ou knowledge on he p ojec ’s economic impac and
cos . The es ima ions a e made aking human and ma e ial esou ces in o accoun .
Final calcula ions can be checked ou in able C.5.
Rega ding Exploi a ion: How is he p oblem ha you wish o add ess
esol ed cu en ly (s a e o he a )? In wha ways will you solu ion
economically imp o e exis ing solu ions?
In economical e ms, he solu ions p oposed in his hesis may aid u u e de elope s
o Eu oHPC JU p ojec s o soone unde s and common mishaps ha will incu
du ing e i ica ion s ages. This will sa e money, and help edi ec unds o o he
needie asks.
C.3.3 Social dimension
Rega ding PPP: Wha do you hink unde aking he p ojec has con-
ibu ed o you pe sonally?
Talking om a Unde g adua e Bachelo s deg ee s uden pe spec i e, he unde ak-
ing o his p ojec helped me massi ely unde s and he ool-chains and wo k lows
o nowadays ha dwa e de elopmen p ocesses. The deepening in unde s anding on
opics seen du ing my s udies, and he ul illing o undisco e ed lagoons o knowl-
edge make his p ojec e y a ac i e o me. I has shi ed my pe spec i e in many
hings ega ding p ojec o ganiza ion oo, and ha is eally aluable.
Rega ding Exploi a ion: How is he p oblem ha you wish o add ess
91