SPICE implementation of a finite element method based model for bipolar power semiconductors

SPICE Implementation of a Finite Element Method Based Model for Bipolar Power Semiconductors Armando Araújo, Adriano Carvalho Faculdade de Engenharia da Universidade do Porto (FEUP) Rua Dr. Roberto Frias, s/n 4200-465 Porto Porto, PORTUGAL Tel +351 22 508 14 00 / Fax +351 22 508 14 40 [email protected] / [email protected] Keywords - «IGBT», «model», «circuit simulation», «FEM». Abstract - This paper describes the methodology associated with the practical implementation, in SPICE circuit simulator, of a Finite Element Method (FEM) based model developed for Bipolar Power Semiconductor (BPS) simulation. The methodology is based on a modular approach that associates each zone of the semiconductor to a subcircuit implemented into SPICE simulator. Modeling a semiconductor is based on union of a set of subcircuit modules necessary for the different zones. Calculus of instantaneous distribution of lightly doped zones carriers (ambipolar diffusion equation (ADE) solution in space/time) is made of a group of subcircuit modules, analogue to FEM elements. The paper shows how each module is implemented and how easily elements with different sizes, topologies or physical properties are designed. Remaining semiconductor zones (highly doped emitters narrow base and MOS zones) are modeled with subcircuits using classical approaches. Voltage drops are modeled with subcircuits implementing a Boltzmann approach for junctions and a Poisson approach for depletion zones. Description for obtaining each associated SPICE subcircuit is presented. Global solution is approached by serial interconnection of these modules (each one directly related to one element of the domain). The paper concludes with simulation results showing hole/electron distribution, in time/space, in low-doped zones of PIN Diodes, BJTs and IGBTs, as well as, corresponding dynamic commutation waveforms for current and voltage. 1 Introduction This paper presents practical implementation of a modeling method for BPS. The method is based on unidimensional approach that associates each zone of the semiconductor to a subcircuit capable of being implemented in any general circuit simulator (such as SPICE), in a modular mode[1]. Modeling of a semiconductor begins with identification of the different zones that constitute the device, such as, low doped, high doped and ohmic zones, narrow bases, junction and space charge and MOS zones. For large and lightly doped zones electron/hole time/space distribution is found solving ADE with FEM [2], [3], [4], [5]. Highly doped emitters are modeled as recombination sinks using h parameters as well as narrow bases with charge control principles. Ohmic zones use knowledge of time/space carrier concentration and junction drops Boltzmann approach, space charge uses Poisson equation and MOS part of the devices is represented through standard models [6], [7], [8], [9]. After identification of these zones we just use modules that emulate their behaviour and make connections between them using boundary conditions. The paper is organized as it follows: Next section introduces circuits for ADE solution. Section 1 introduces circuits associated with solutions for narrow bases, high doped, ohmic, junction, space charge and MOS zones. Section 4 shows how to put together the obtained modules for power Diode, BJT and IGBT modeling. Finally Sections 5 and 6 present obtained results and conclusions. SPICE Implementation of a FEM Based Model for Bipolar Power Semiconductors ADRIANO CARVALHO Adriano EPE 2003 - Toulouse ISBN : 90-75815-07-7 P.1 2 ADE Circuit solver ADE unidimensional solution of hole/electron distribution gives the following set of ODEs[1]: [] [][][] 0=++       ∂ ∂IVG t V C (1) These ODEs have an immediate electrical analogy with a circuit made of capacitors, resistors and controlled current sources. This electrical analogy is easily implemented as a series of elementary RC nets (Fig. 1) of the type: () [] () () [] () [] () [] 0=++       ∂ ∂eIeVeG t eV eC (2) with: () () ∫ == Ve T dV D NN eMeC ][][ (3) () ()         +== ∫∫ Ve T Ve T D dVNN dVBBeKeG τ ][][ ][][ (4) () () ∫∫ −== ee S e T S e TdSNtgdSNtfeFeI ])[(])[( (5) Fig. 1: Simplex element equivalent electrical circuit. Matrix N is associated with the shape of the element (linear, quadratic…), and matrix B with the spatial derivative of N. f(t) and g(t) are boundary conditions in edges of low-doped zone, [1]. Using simplex elements, (1), it results: () []       =21 12 6D LA eC Eee (6); [] ()       +       − − =21 12 6 11 11 τ D LA L A eG Eee Ee e (7); [] (8) () 11 )()( + −−= n AtgAtfeI An electrical circuit implementing these equations is shown in Fig. 1. Applying KVL [1]: D LA CC D LA CC Eee joio Eee jiij 2 ; 6==−== (9); 2 6 6 ; 2 Eeee Ee jiij Eee joio LAAD LD RR LA D RR − ==== τ τ τ (10) Each net corresponds to FEM formulation for one element. Voltages in each node, of this net, are an image of hole/electron concentration. To solve ADE it is just needed: 1. A RC subcircuit that emulates one element. Number of RC nets (subcircuits) in series equals number of elements adopted in partition of the domain (low doped zone). 2. A subcircuit for calculus of element width, . Ee L Note that: 1. Width of each element, , is a subcircuit parameter. So they are used smaller elements near the borders, where concentration changes faster, and larger near the middle, where concentration changes slower. Ee L 2. Physical/electrical properties, Dand τ , in each element, can also be subcircuit parameters which enables solutions for heterogeneous materials. 3. It is easy to add more elements to the problem (just adding another subcircuit). 4. Matrix I(e) is nonzero only at the borders (first and last node). So, they are added to these nodes two current sources with values f(t)A1 and g(t)An, satisfying boundary conditions. SPICE Implementation of a FEM Based Model for Bipolar Power Semiconductors ADRIANO CARVALHO Adriano EPE 2003 - Toulouse ISBN : 90-75815-07-7 P.2 2.1 One Finite Element RC Net Equivalent SPICE Subcircuit For simulation, in SPICE like simulators, they must be designed circuits that emulate variable resistors and capacitors (note that element width, , varies in time). Circuit topology for one complete RC net, for one simplex element, can be seen in Fig. 2. It is made of associating six subcircuits (three variable resistors and three variable capacitors). Ee L Fig. 2: Equivalent RC net for one finite element. Subcircuit SPICE code for ICAPS is the following: *SYM=RC\_VAR\_1 1 21 25 DWG=C:\TEXT\ASA\SPICE\CIR\RC_VAR_1.DWG SUBCKT RC_VAR_1 1 21 25 *ALIAS I(V15)=IVCNT *This implements Ri0 B3 18 0 V={2*D*TAU}}/({AE}*I(V15))*I(V8) V8 1 18 DC 0 *This implements Ci0 B4 1 0 I=I(V9)*(I(V15)*1E6-1) C5 29 0 1E-6*{AE/(2*D)} V9 1 29 DC 0 R15 1 0 10MEG *This implements Rj0 B5 31 0 V={2*D*TAU}/({AE}*I(V15))*I(V10) V10 21 31 DC 0 *This implements Cj0 B6 21 0 I=I(V11)*(I(V15)*1E6-1) C6 33 0 1E-6{AE/(2*D)} V11 21 33 DC 0 R16 21 0 10MEG *This implements Rji B7 35 21 V=6*{D*TAU*AE}*I(V15)*I(V12)/ ({AE}*(6*{D*TAU}/1E4-I(V15)^2)) V1 21 35 DC 0 *This implements Cji B8 1 21 I=I(V13)*(I(V15)*1E6-1) C7 37 21 -1E-6{AE/(6*D)} V2 1 37 DC 0 R17 1 21 10MEG *This implements LEE V15 25 0 DC 0 R18 25 0 1K .ENDS Notice current in zero voltage DC source, V15, which measures element width, . During recovery, element width, , tends to zero, so 0,1U constant and 10M Ω resistors to help convergence. Element area, , ambipolar diffusivity, D, and hole/electron mean lifetime, τ , are passed as circuit parameters (see how easy it’s to change the properties of the domain for each finite element). Ee L Ee L e A 2.2 Element Width Calculus SPICE Subcircuit: Calculus of instantaneous element width, during recovery, is made with subcircuit shown in Fig. 3. Base width is emulated with a current obtained by a feedback scheme, that imposes zero concentration at the borders [6], [7]. Element width is obtained by resistive division. Note that I(V10) is the result of current summing in two high value resistors inserted into space charge boundaries (first and last nodes). This current is measured, passed to B1, and multiplied by a high value gain (if node concentration is less than zero). SPICE Implementation of a FEM Based Model for Bipolar Power Semiconductors ADRIANO CARVALHO Adriano EPE 2003 - Toulouse ISBN : 90-75815-07-7 P.3 Fig. 3: Subcircuit for calculus of element width. Subcircuit SPICE code (for seven elements) is the following: *SYM=LEE_1 1 21 25 SUBCKT LEE_1 1 21 25 *ALIAS I(V1)=WB-WSC *Element current division: R1 1 2 1K R2 3 4 1K R3 6 7 1K R4 8 9 1K R5 11 12 1K R6 13 14 1K R7 15 16 1K *Space charge zone width calculus, N- =WB-WSC: B1 0 5 I=I(V10)>0 ? 9M-1.5E4*I(V10) : 9M V1 5 10 DC 0 *Element width calculus: V2 10 1 DC 0 V3 10 3 DC 0 V4 10 6 DC 0 V5 10 8 DC 0 V6 10 14 DC 0 V7 10 12 DC 0 V8 10 16 DC 0 .ENDS 3 Circuit solvers for remaining zones In order to implement power semiconductor model they must be designed subcircuits that implement solutions for remaining zones of the devices (dynamics of charge storage effects, highly doped emitters, voltage drops and MOS zones). These are implemented with charge-control principles, recombination sinks (h parameters), Boltzmann approach, knowledge of Poisson’s equation for time/space carrier concentration and standard MOS models [1]. 3.1 Narrow Bipolar Transistor P Base Zone SPICE Circuits W B W W +W x 0 In E In WC Ip WC Ip E Ip B I B n - n WC C C B Fig. 4: Currents associated with p base. W C W C +W B x Q BA1 Q BA2 p n E Fig. 5: Base stored charges. Currents and charges associated with Bipolar Transistor p base (see Fig. 4 and Fig. 5) leads to: pBpWCpEB IIII +−= (11); (12), nWCpWCC III += () () nB nWCB WCBEBABABA FB CE nBEnWC BA B BA pB D IW pWqSQQQ QQ pnpn DqSI t QQ I 4 ; 2 21 +=+= + − = ∂ ∂ += τ (13) So hole base current, , depends on: pB I 1. Hole concentration, p, at collector/base boundary. wc 2. Free electron current, , at the same boundary. nWC I SPICE Implementation of a FEM Based Model for Bipolar Power Semiconductors ADRIANO CARVALHO Adriano EPE 2003 - Toulouse ISBN : 90-75815-07-7 P.4 Fig. 6: Circuit for calculus. pB I Implementation in SPICE simulator uses circuits in Fig. 6 and Fig. 7. Spice code for calculus of current (Fig. 6) is: pB I *ALIAS V(3)=VX *ALIAS I(V7)=QBA *V7 MEASURES QBA*1E6 V7 6 3 DC 0 *INJECTS I=1E6*QBA=K1*PC+K2*INC B2 0 6 I=475.2M*V(4)+16.875M*I(V6) *R2 VALUE IS 1E-6/TAU R2 1 3 .05 *L2 MULTIPLIES BY1E-6 L2 1 0 1E-6 Notice that V(4) measures and I(V(6)) measures . Both are available in circuit of Fig. 7. wc p nWC I Spice code for calculus of current (Fig. 7) is: nWC I *ALIAS I(V2)=IPC *ALIAS I(V3)=IPB *ALIAS I(V4)=IPE *ALIAS I(V6)=INC *V2 MEASURES IPC=IPB+IPE-IB Fig. 7: Circuit for calculus. nWC I V2 5 0 DC 0 *V3 MEASURES IPB V3 7 5 DC 0 *V4 MEASURES IPE V4 10 5 DC 0 *V6 MEASURES INC V6 15 0 DC 0 *G1 CONVERTS VX IN CURRENT IPB (IPB=VX) G1 0 7 6 0 1 *F1 INJECTS IB (MEASURED IN V56) F1 5 0 V56 1 *F2 INJECTS IC (MEASURED IN V5) F2 0 15 V5 1 *F3 INJECTS IPC (MEASURED IN V2) F3 15 0 V2 1 *F4 INJECTS IPE (MEASURED IN V64) F4 0 10 V64 .44 Notice that is injected by F2, by F1 and by F4. These are available in other zones of the circuit. C IB IpE I 3.2 III.B-Highly Doped N+ Emitter Circuit Fig. 9: Circuit for calculus. pE I *ALIAS I(V64))=PNE V64 20 0 DC 0 *PNE=PC^2+I NC*(QBD+QBA)/((Q*SE)^2*DNB) B1 0 20 I=V(4)*V(4)+.2988*I(V6)*(0.165+I(V7)) Notice that V(4) measures , I(V(6)) and I(V(7)) . wc pnwc IBA Q h parameter approximation gives: [] nBE BABDnwc wcEEEpE DqS QQhI hpqSpnhqSI + +== 2 )( (16) Therefore, hole current in emitter depends on: 1. Hole concentration, p, at collector/base boundary. 2 wc 2. Electron current, I, at the same boundary. nwc 3. Base charges, Q, , solved with charge control methods. BD BA Q Fig. 9 shows the circuit. and associated code implementation as a nonlinear controlled source. SPICE Implementation of a FEM Based Model for Bipolar Power Semiconductors ADRIANO CARVALHO Adriano EPE 2003 - Toulouse ISBN : 90-75815-07-7 P.5 3.3 Voltage Drops n + pn + Vn + n - Vpn + V B Fig. 10: npn BJT voltage drops Fig. 11: Circuit for V, V and V. calculus. +pn −+nn pn− Fig. 12: Circuit for calculus of voltage drop in one RC net element. Fig. 13-Circuit for calculus of V . SC n - Vn - Vn - p Boltzmann approach, knowledge of time/space carrier concentration and Poisson equation gives the following expressions for voltage drops calculus (see Fig. 10), [1]:         = +2 ln i EE Tpn n np VV (17)         = −+ C Tnn N p VV 0 ln (18)         = −2 ln2 i WC Tpn n p VV (19) x nq J VXr Xl n n n∂= ∫ − µ (20) 2 2C C SC W qN V ε =(21) So it must be got (given by I(V(64), see 1.1), and (given in first and last nodes of our RC net V(2) and V(4), see 2.1), and width of space charge zone W (given in V1, see 2.2). EE np 0 pWC p n JC SPICE implementation takes the form of nonlinear controlled sources (see Fig. 11 and Fig. 12). Spice code for calculus of V and , is: −+nn pn V− +pn V *DIODE MODEL .MODEL DPNE D(IS=1.44E-14) *ALIAS V(60)=VBEI *IMPLEMENTS VN+N-=VT*LOG(P0/NC); C=1.2E15 B2 44 0 V=V(4)>0 ? 26E3*LN((V(4)*1E2+1.2)/1.2) : 0 *IMPLEMENTS VNP=2*VT*LOG(PWC/NI^2); I=1.2E10 B1 37 0 V=V(2) >0 ? 52E3*LN((V(2)*1E7+1.44)/1.44) : 0 *IMPLEMENTS VPN+=VT*LOG(PE*NE/NI^2) PE*NE=I(V64) D1 60 0 DPNE B3 0 60 I=I(V64) R1 60 0 470 Spice code, for calculus of ohmic voltage drop along one ncollector element is (this is similar for all elements): *ALIAS V(80)=RTOTAL .PRINT DC V(80) .PRINT TRAN V(80) B3 40 0 V=V(4)>0 ? I(V8)/((V(4)+V(15))*1E3*1347+VNC1) : VNC1 *LE1/(2*PAV1*NIUNP+2*NIUN*ND Spice code for calculus of V is: SC *ALIAS V(39)=VSC *VSC2=K4*(WC-XSC)^2 B2 39 0 V=I(V4)>0 ? 5.84E6*I(V58)^2: 0 *VSC1=58604*I(V58)*LN(1+EXP(7.543077*(8.2M-I(V58)))) B1 46 0V=I(V4)>0? 58604*I(V58)*LN(1+EXP(7.54-3077*(8.2MI(V58)))) : 0 SPICE Implementation of a FEM Based Model for Bipolar Power Semiconductors ADRIANO CARVALHO Adriano EPE 2003 - Toulouse ISBN : 90-75815-07-7 P.6 3.4 MOSFET model 3.4.1 MOS current MOS part of devices is well represented with standard MOS models. For DC characteristics, a basic expression for channel current is: in linear region: () 2 2 ds mos p gs th ds V IKVVV  =−−   (22) in saturation region: () 2 2 pgs th mos KV V I− = (23) This model can be improved taking in account several important phenomena such as: 1. Transconductance reduction in linear region. 2. Mobility reduction due to transverse electric field for high gate voltages. 3. Avalanche breakdown for high drain voltages. These effects are modeled introducing, respectively: 1. , empirical parameter . lin p K 2. θ , empirical parameter that represents the reduction of transconductance. 3. M , avalanche multiplication factor. Thus, the above equations are rewritten as: () () () 2 21 lin sat lin s at lin pds p mos p gs th ds ds gs th pp gs th KV K M IKVVV VVV KK VV θ  =−−× <−  +−   1 4 1ds br V MV −    =−     ()() () 2 21 sat s at lin pgsth p mos ds gs th p gs th KVV K M IV K VV θ − =× >− +− VV N 13 0,75 5,34 10 br v D Vk − =× 3.4.2 MOS capacitances CGD D Transient behavior is ruled by capacitances between device terminals as illustrated in Fig. 14 CGS G S CDS IMOS Fig. 14: MOSFET part of IGBT ' 1 ox gd s cox s igd C CWC A ε = + with: '2 s igd sc D V qN ε = W. (24). s ids ds s c A CW ε = with: 2 s ids sc D V qN ε = W. (25) 2 ' 22 '2 0 s igs D s igs sigs DD V sc sc qN VV sc sc sc qN qN WW WW W ε εε =<   =− >  . (26) Well-known nonlinear Miller capacitance is the most important one in order to describe swhiching behavior of MOS part. It is comprehended of a series combination of gate-drain oxide capacitance (Cox) and gate-drain depletion capacitance (Cgdj) resulting in equation (22). Being W’sc depletion width formed under the gate, ND base doping concentration and Agd is MOS region area. Drain-source capacitance (Cds) is defined in the same way as Cgdj , being Wsc total depletion width developed under p+ body and Ads the respective area (see (23). Note that Agd + Ads represents total device area (A). As depletion zone widths support different voltages and remembering that Vgd = Vds - Vgs relations (24) can be written. Gate-source capacitance is normally extracted from capacitance curves and a constant value may be used producing generally good results [10]. SPICE Implementation of a FEM Based Model for Bipolar Power Semiconductors ADRIANO CARVALHO Adriano EPE 2003 - Toulouse ISBN : 90-75815-07-7 P.7 4 Implementation in SPICE 10 19 p+n-n 10 14 10 20 + AK 30 µ m 200 µ m130 µ m Fig. 15: Typical power diode doping profile and width of the p, n zones. 10 14 10 20 10 18 p + n + 10 90 50 40 30 20 80 70 60 0 EB C n + Fig. 16: Typical power BJT doping profile and width of the p, n zones. n - They can now be applied given fundamentals for modeling bipolar power semiconductors. Fig. 15 and Fig. 16 shows, as an example, power diode and BJT zones to model. 4.1 POWER P-I-N DIODE SPICE MODEL Fig. 17: Diode model. A complete nine finite element power pI-n diode model (9 RC nets) for power p-I-n diode simulation can be seen in Fig. 17. This model uses in A the circuit solution for low doped zone, in B circuit solution for current at nzone borders (emitter currents in n+ and p+ zones with h parameter approach), in C circuit for voltage drops calculation. Part D solves for base (nzone) and element width and E for voltage drops in space charge zones. Finally F is diode connection to external circuit with voltage controlled source VD. Note how easy you can change: 1. Number of model elements (one more RC net in A, one more resistor in D, one more source in C). 2. Width of elements (just change resistor values in D). 3. Properties of nzone (just change parameters AE, τ, D in each RC net of A). 4.2 POWER BJT SPICE MODEL Fig. 18 shows a complete model for power BJT simulation. This nine finite element power BJT model uses in A the circuit solution for collector low-doped zone, in B circuit solution for collector (nzone) and element width. C solves for currents at collector borders (emitter currents in n+ and p+ zones with h parameter approach). D and E solves for base currents , and . Finally F and G solves, for voltage drops. H is BJT connection to external circuit with controlled voltage sources, VCE and VBE. pB IpWC IpE I Note how easy it can be changed: 1. Number of model elements (one more RC net in A, one more resistor in B, one more source in G). 2. Width of elements (just change resistor values in B) 3. Properties of nzone (just change parameters AE, τ, D in each RC net of A). SPICE Implementation of a FEM Based Model for Bipolar Power Semiconductors ADRIANO CARVALHO Adriano EPE 2003 - Toulouse ISBN : 90-75815-07-7 P.8 Fig. 18: BJT model 4.3 POWER IGBT SPICE MODEL I(V5) ITOTAL V(29) VGATE I(VIMOS) IMOS I(VIPR) IPR V(40) VANODO 234 5 6 7 8 9 10 11 12 13 14 15 32 17 18 16 19 37 2122 23 24 25 26 27 28 31 30 33 34 35 20 62 64 29 59 41 38 40 1 44 52 85 86 87 88 89 90 91 92 93 94 95 56 55 53 57 Fig. 19: SPICE FEM based IGBT model. Fig. 19 shows a complete nine finite element IGBT model. Notice, at the top, FEM solution for time/space hole/electron distribution in low-doped IGBT base. Controlling parameter le is determined by the circuit at middle left and boundary conditions, at borders of IGBT base, with circuit in center. Circuit at right middle emulates voltage drops in junctions, space charge and ohmic zones along IGBT base. Circuits at left bottom emulate MOSFET part of IGBT. Circuit at right bottom calculates total voltage drop, so the IGBT is seen as current controlled voltage source. 5 RESULTS Some results, obtained with these models, are presented in Fig. 20, Fig. 21, Fig. 22, Fig. 23, Fig. 24 and Fig. 25. As a first example Fig. 20 shows reverse recovery simulation results (hole/electron concentration in time and space and current and voltage in time) for a diode with Nb=1014 cm-3, WB=90 µ m, τ =10 µ s, Dn=25cm2/s, Dp=10cm2/s, hp=hn=1.5*10E-14cm4/s. Simulation time is 20 seconds in a 133 MHz PC. Notice evolution of stored charge during first 800 nanoseconds SPICE Implementation of a FEM Based Model for Bipolar Power Semiconductors ADRIANO CARVALHO Adriano EPE 2003 - Toulouse ISBN : 90-75815-07-7 P.9