A survey on FEC techniques for industrial wireless communications

Received 26 September 2022; revised 27 October 2022; accepted 1 November 2022. Date of publication 4 November 2022; date of current version 18 November 2022. The review of this article was arranged by Associate Editor Thomas I. Strasser. Digital Object Identifier 10.1109/OJIES.2022.3219607 A Survey on FEC Techniques for Industrial Wireless Communications LORENZO FANARI 1(Graduate Student Member, IEEE), ENEKO IRADIER 1(Member, IEEE), IÑIGO BILBAO 1(Graduate Student Member, IEEE), RUFINO CABRERA 1(Graduate Student Member, IEEE), JON MONTALBAN 1,2 (Senior Member, IEEE), PABLO ANGUEIRA 1(Senior Member, IEEE), OSCAR SEIJO 3(Member, IEEE), AND IÑAKI VAL 3(Senior Member, IEEE) 1Department of Communications Engineering, University of the Basque Country (UPV/EHU), 48012 Bilbao, Spain 2Department of Electronic Technology, University of the Basque Country (UPV/EHU), 48012 Bilbao, Spain 3Ikerlan Technology Research Centre, Basque Research and Technology Alliance (BRTA), 20500 Arrasate, Spain CORRESPONDING AUTHOR: LORENZO FANARI (e-mail: [email protected]). This work was supported in part by the Basque Government under Grant IT1436-22, in part by the PREDOC under Grant PRE2019_099407, in part by the Spanish Government through project PHANTOM (MCIU/AEI/FEDER, UE) under Grant RTI2018-099162-B-I00 and through project THERESA under Grant PID2021-124706OB-I00 funded by MCIN/AEI/10.13039/501100011033 and by ERDF A way of making Europe, and in part by the Basque Government through project VIRTGRID under Grant Elkartek KK-2022/00069. ABSTRACT Industry 4.0 aims to digitize industrial processes entirely, and wireless technologies represent one of the enablers for scalable and flexible communications. However, the current standards and proprietary solutions do not meet the industry’s tight requirements in fundamental use cases such as factory automation (FA). One of the key research challenges toward replacing wired fieldbuses with wireless links is the design of techniques that enable real-time and deterministic behavior when transmitting short packets. Forward error correction (FEC) techniques are critical to this objective, and coding/decoding algorithms must comply with reliability and low latency specifications. This article surveys existing FEC techniques for short packet transmissions. Compared to other survey papers in the field, we propose several FEC candidate techniques specifically suitable for FA wireless systems. We explore four of these techniques, also examining hardware architecture proposals. This article proposes a methodology to evaluate their latency and reliability performance. We finally discuss the lessons learned and challenges for future research. INDEX TERMS Complexity, factory automation (FA), forward error correction (FEC), industrial wireless communications, Industry 4.0, latency, PHY, reliability, short packet transmission, wireless communications. ABBREVIATIONS USED IN THIS ARTICLE 3GPP 3rd Generation Partnership Project. 5G NR 5G New Radio. AR3A Accumulate-Repeat-3-Accumulate. AR4JA Accumulate-Repeat-by4-Jagged-Accumulate. AWGN Additive white Gaussian noise. ASIC Application specific integrated circuit. ASIP Application-specific instruction set processor. ATSC Advanced Television Systems Committee. ARQ Automatic repeat request. BM Base matrix. BP Belief propagation. BPSK Binary phase-shift keying. B-DMC Binary-input discrete memoryless channel. BER Bit error rate. BLER Block error rate. BCH Bose–Chaudhuri–Hocquenghem. BPM Burst position modulation. CVA Circular Viterbi algorithm. CCSDS Consultative committee for space data systems. CC Convolutional codes. CA-Polar CRC-aided polar. CRC Cyclic redundancy check. This work is licensed under a Creative Commons Attribution 4.0 License. For more information, see https://creativecommons.org/licenses/by/4.0/ 674 VOLUME 3, 2022 DVB-S2 Digital Video Broadcasting - Satellite - Second Generation. DVB-T2 Digital Video Broadcasting - Second Generation Terrestrial. DSSS Direct sequence spread spectrum. E2E End-to-end latency. FA Factory automation. FPGA Field programmable gate arrays. FEC Forward error correction. GPU Graphics processing unit. HART Highway addressable remote transducer protocol. HARQ Hybrid automatic repeat request. HAR2D-FI Hybrid channel Access with redundancy for reliable and deterministic Wi-Fi. IEC International Electrotechnical Commission. ISM Industrial Medical Scientific Band. ISA International Society of Automation. LDPC Low density parity check. LLR Logarithmic likelihood ratio. LTE Long-term evolution. LT Luby transform. MAP Maximum a posteriori. MediaFLO Media forward link only. MAC Medium access control layer. MBMS Multimedia broadcast multicast services. NASA National Aeronautics and Space Administration. OMNET++ Objective Modular Network Testbed in C++. OSI Open systems interconnection model. OSD Ordered statistics decoding. OFDMA Orthogonal frequency-division multiple access. OFDM Orthogonal-frequency division multiplexing. PER Packet error rate. PLR Packet loss rate. PCCC Parallel concatenated convolutional codes. H Parity check matrix. PHY Physical layer. PPDU Physical layer protocol data unit. PAC Polarization-adjusted convolutional codes. PEG Power edge growth. PA Process automation. QPSK Quadrature phase-shift keying. QC Quasi-cyclic. RAN Radio access network. RS Reed–Solomon. SCCC Serial concatenated convolutional codes. SNR Signal-to-noise ratio. SDR Software-defined radio. SVC Sparse vector code. SCF Successive cancellation flip. SCL Successive cancellation list. SHARP Synchronous and hybrid architecture for realtime performance. TBCC Tailbiting convolutional codes. TDMA Time-division multiple access. TPC Turbo product codes. URLLC Ultrareliable low latency communications. UWB Ultrawideband. UMTS Universal mobile telecommunications system. USRP Universal software radio peripherals. WirelessHP Wireless high-performance. WIA-FA Wireless networks for industrial automationdactory automation. WPAN Wireless personal area network. WiMAX Worldwide interoperability for microwave access. WAVA Wrap-around Viterbi algorithm. ZTBCC Zero tailbiting convolutional codes. I. INTRODUCTION The fourth industrial revolution, also referred to as Industry 4.0, is one of the most promising fields where research on information technologies is under development. Its principal goal is to digitalize the entire industrial process. The transition requires the inclusion of the latest communication technologies: wireless networks, tactile internet, Internet of Things, and in general, the optimization of the so-called cyber-physical systems. Wireless communications bring significant advantages to this scenario while posing relevant technological challenges [1]. Regarding the wireless transition, numerous actors from both the industrial world [2], [3], [4], [5], as well as from the standardization committees [6], [7], [8] have established several guidelines for successful wired to wireless transition in a variety of scenarios [4]. Indeed, the industrial world encompasses diverse environments, which differ in applications and environmental properties. Some examples are factory production processes or factory automation (FA), surveillance systems, electricity production assets, transport infrastructure, oil production, chemical material handling, etc. FA is among the most challenging use cases for ad hoc wireless system design and deployment. Contrary to the traditional requirements of generic wireless communications, which entail the transmission of large-size data, FA wireless communications involve the transmission of short data packets with high reliability and reduced latency. A. FIELDS OF APPLICATION FOR FA FA comprises different fields of application that are necessary for the operations of monitoring and controlling in the industrial environment. These processes are distinguishable among critical and noncritical processes. Based on the criticality level of the processes, several layers of the Open Systems Interconnection model (OSI model) have to be adapted [9]. Numerous players from the industrial world [2], [3], [4], [5] and from standardization committees [6], [7], [8] have suggested their use case vision for FA, and defining the desired performance at the MAC layer. However, such guidelines are challenging to accomplish in the case of highly critical or safety communications. Few proposals offer partial solutions VOLUME 3, 2022 675 FANARI ET AL.: SURVEY ON FEC TECHNIQUES FOR INDUSTRIAL WIRELESS COMMUNICATIONS TAB LE 1. Proposed Fields of Application that, nevertheless, do not entirely fulfill the required performance range [10]. Table 1 presents a classification of the fields of application for the industrial wireless systems as a function of the link-level requirements. The definition of requirements follows the guidelines of [4], [7]. We have considered three key parameters: payload length, reliability, and latency. Reliability and latency are defined as packet error rate (PER) and end-to-end (E2E) latency. The PER evaluates the correct interpretation of the message, while the E2E latency estimates the time interval between the data generation and its future reception at the MAC layer. Based on the presented parameters, three prominent fields of application are recognized: Non-critical communications, which include, for example, monitoring operations and involve less stringent requirements. Existing wireless technologies are currently applied in such scenarios. Critical communications demand communication systems designed to protect people, machines, and production processes. Such scenarios denote strict reliability and latency requirements. Finally, the case of safety communications covers all the risk reduction operations associated with personnel and equipment damage prevention and protection. In this case, the communications require extremely low latency data transfer. B. WHY FEC? Optimizing all ISO/OSI layers towards real-time communications [9] is necessary for the demanded performance for FA fields of application. Focusing on the PHY layer, two strategies can be considered [11]. First, the automatic repeat request (ARQ) techniques introduce some check-bits in the transmitted packet for retransmitting the erroneous messages. However, on the other hand, retransmissions introduce undesirable delay during the packet transmission [12]. The other strategy is the FEC. These techniques include some redundancy bits within the packet during transmission. At the receiver, this redundancy allows the detection and error correction of the received message, avoiding the delay effect discussed in the previous case. Consequently, including FEC techniques within the industrial wireless systems has potential benefits for achieving the desired performance in terms of reliability and latency. The requirements have been briefly introduced in Section I-A. C. RELATED WORKS AND CONTRIBUTIONS 1) RELATED WORKS Despite a large body of surveys on FEC for short packet transmissions, only [20] attempts to address some issues related to FA. The majority of the encountered surveys focus on URLLC, which requires different performances related to latency and reliability. However, their results are essential for the development of this topic. Sybis et al. [13] compare different FEC candidates for 5G URLLC communications, previously identified by 3GPP. Analysis for both reliability and complexity are proposed, considering different decoding algorithms. Liva et al. [14] present a survey of modern codes for short packet transmission. Iscan et al. [15] compare different FEC schemes for 5G URLLC communications. Moreover, different decoding algorithms are included in the study. Wu et al. [27], for short packet communications made with SDR, analyzes different FEC candidates. Tzimpragos et al. [17] review different FEC schemes for 100-Gb/s optical networks. Also, an analysis of the published results is included. Shirvanimoghaddam et al. [18] review the state of the art of the FEC techniques for URLLC. Moreover, a comparison of reliability and decoding complexity analyzes different decoding algorithms. The results are obtained from MATLAB simulations. Qiao et al. [19] compare the performance of numerous FEC within a flexible ASIP decoder. Zhan et al. [20] analyzes FEC candidates for WirelessHP. This work also offers future directions for designing FEC schemes for industrial control applications. Hajiyat et al. [21] compare different candidates for 5G machine-type communications. Shao et al. [22] analyze the published results of the ASIC implementations of different 3GPP FEC techniques. Ahmed et al. [23] in their survey focused on addressing the design for future ARQ schemes, reviews suitable FEC techniques. In [24], Habib et al. study different decoding algorithms for LDPC un the context of Reinforce Learning. Lian et al. compare different decoding algorithms for TBCC and Polar in terms of reliability and complexity [25]. Ferraz et al. [26] analyze and compare numerous decoding algorithms for LDPC addressing issues associated with high-throughput and low energy consumption. Table 2 outlines the existing survey articles and justifies how these publications differ from this survey article. Nowadays, no surveys in the literature simultaneously review numerous FEC techniques for short packet transmission and address the architectural and design problems of the FEC techniques for FA fields of Application. 2) CONTRIBUTIONS The surveys available in the literature do not address the specific challenges of FA communications. An exception is given by [20], whose main contribution consists of surveying a set of candidate codes, and then, suggesting an ad hoc set of architectures. However, this work lacks the analysis of decoding algorithms. To the best of our knowledge, there is no comprehensive survey in the literature about FEC 676 VOLUME 3, 2022 TAB LE 2. Related Works techniques for FA wireless systems that address at the same time reliability and latency aspect. Moreover, existing surveys neither consider theoretical nor hardware implementation results. The main contributions of this article are summarized as follows. 1) A comprehensive taxonomy of several FEC techniques developed for short packet communications. These techniques are classified into block and memory codes, and their features are collected and compared in a table. The features are associated with the requirements of the FA use cases. The best-performing FEC techniques are considered as candidates. 2) For each candidate, several decoding architecture proposals are compiled and analyzed. The gathered results have been found from the information-theoretic and technique-oriented literature. Moreover, we compare those contributions by using reliability and latency metrics. Some examples are BLER and the number of required clock cycles. 3) As the results of the previous contributions, the authors provide some metrics for evaluating the FEC performance within FA wireless systems. Finally, the suggested metrics are used to benchmark the candidates. 4) Some lessons learned and future challenges are outlined. D. ARTICLE OUTLINE The rest of this article is organized as follows. Section II describes the research method adopted for the proposed literature review. Section III briefly describes FEC and defines the metrics analyzed in this survey. Section IV offers stateof-the-art of several FEC techniques suitable for short packet communications focusing on FA. Section V reviews the industrial wireless systems proposed, analyzing their FEC. This Section also includes the candidates detected by the authors in Section IV. Section VI collects the performance of several candidate hardware implementations and compares them. Section VII offers reliability and latency comparisons based VOLUME 3, 2022 677 FANARI ET AL.: SURVEY ON FEC TECHNIQUES FOR INDUSTRIAL WIRELESS COMMUNICATIONS FIGURE 1. Survey structure. on simulations and published results for the detected candidates. Section VIII contains the future challenges detected by this study. Finally, Section IX concludes this article. Fig. 1 offers an outline of the survey content. II. RESEARCH METHOD This study proposes a systematic literature review approach for reviewing the articles encountered in the considered databases. PRISMA is the guideline followed [28]. This methodology comprises four main steps: issue detection and preliminary studies, collection of articles and reports, data extraction, and data inclusion. The first step aims to identify research questions, and therefore, the objectives. More in detail, this is the stage where the selection procedure of the article, keywords formulation for research and search queries, and the quality assessment criteria of extracted studies are defined. The subsequent step consists of using the keywords for the queries in the databases. The results are then collected 678 VOLUME 3, 2022 TAB LE 3. Research Question for This Survey TAB LE 4. Selected Keywords for This Survey in Zotero©, a software for managing bibliographic data and generally research materials encountered in databases or manually added. A. RESEARCH QUESTIONS This study suggests FEC techniques for wireless systems for industrial environments like FA. Moreover, several guidelines are provided to the audience for designing ad hoc PHY layers for future industrial wireless systems proposals. For this aim, six research questions have been considered (see Table 3). B. SELECTION CRITERIA After defining the objectives for this work, the databases are selected for the subsequent analysis. For this aim, the following databases have been considered IEEE Xplore, Google Scholar, and the 3gpp-database. This last collects many technical reports associated with FEC implementation for URLLC scenarios, which show similarities with FA. Then, a list of keywords for the queries is generated as shown in Table 4. These are organized into four groups. The first contains the FA-related keywords, and the second includes FEC-related keywords. In contrast, the decoding algorithm-related keywords are grouped in the third group. Finally, Group 4 collects the keywords associated with industrial wireless systems. Moreover, the articles selected are published in English and indicate a minimum of one citation. The result is a collection of documents published in English that covers more than 60 years of contributions associated with “FEC for short-packet communications.” C. STUDY SELECTION Fig. 2 resumes the decision steps for including the articles in this work. Initially, the research shows a total of 234 articles and technical reports to be analyzed. Among these, 18 were excluded as copies. Therefore, the amount passes to 216. Then, the study passes to the screening phase, which consists of an initial examination of the title and abstract, followed by a full-text analysis. During the first step, the number of articles was reduced to 192, and subsequently, they passed to 184. The excluded manuscripts did not show any element for this scope. In this case, there are no explanations of the methodology proposed or the absence of comparable results. Consequently, this survey considers a total of 184 documents divided into academic articles and technical reports. III. BACKGROUND This section presents a brief definition of FEC and the PHY-layer metrics proposed for analyzing the different FEC techniques presented in this work. According to the authors, this section aims to familiarize the general reader with the content proposed in this article. A. FEC IN A NUTSHELL In 1948, Shannon [29] proved that the error-free transmission of data is achievable in communication channels affected by noise. He demonstrated that the reliability is achievable in these scenarios by transmitting the data with a code rate R lower than the channel capacity, also known as Shannon limit. The FEC techniques are one of the common approaches to this problem. It consists of applying some redundancy to the VOLUME 3, 2022 679 FANARI ET AL.: SURVEY ON FEC TECHNIQUES FOR INDUSTRIAL WIRELESS COMMUNICATIONS FIGURE 2. Selection criteria based on PRISMA. data, which will be transmitted through the communication channel, with a determined code rate R.Ris the ratio between the original data size of Kbits and transmitted data of size N, where N>K. This redundancy helps the receiver detect and correct some corrupted bits within the transmitted data. Ideally, the Shannon limit tends to infinity, and consequently, it is much easier to analyze the performance of FECs in the case of large packets [30]. Consequently, more assumptions are needed to evaluate FECs in short packet communications. In [31] a solid theoretical bound is proposed for the evaluation of FEC within short packet communications. B. FEC METRICS FOR INDUSTRIAL WIRELESS SYSTEMS 1) RELIABILITY Industrial wireless systems require high reliability during the transmission of short data. A transmission failure could affect critical aspects of the manufacturing processes associated with safety, equipment, and machinery integrity. The error rate is a metric strictly related to the probability of transmission failure. Its measurement in these particular environments is defined at PHY or MAC layers and offers the rate of successfully delivered bits or packets. The error rate metrics described in this section are used to evaluate the industrial wireless systems performance, where the desired performances are achievable using FEC and retransmission techniques. Some examples are bit error rate (BER), block error rate (BLER), packet error rate (PER), packet loss rate (PLR), and connection error rate (CER). The terms BLER, PER, and PLR are interchangeable in these scenarios. Commonly, BLER is associated with 5G NR, while PER for IEEE 802 standards for both PHY and MAC layer. PLR only refers to MAC-layer performances. CER evaluates the reliability performance in the presence of multiple connections among devices, and thus, is not included in this study. Three main metrics have been detected and defined. BER is commonly used to evaluate the decoding performance at the PHY layer, indicating the probability of an erroneous bit transmission. BLER is defined exclusively at the PHY layer and represents the ratio between the erroneous packets received and the totality of transmitted packets. Finally, PLR considers 680 VOLUME 3, 2022 the erroneous transmission in the case of contiguous packets, evaluating the reliability at the MAC layer. In [20], the authors compare the BER/BLER of different FEC candidates for high-throughput communications within factories, resulting from previous studies. While in [32], BER is used as a threshold for testing the WirelessHP PHY layer with different low-order modulations at different communications distances. A BLER threshold is defined in [33] to compare different FEC candidates’ performance with the IEEE 802.11be PHY layer, assuming different industrial channel models. In [34], [35], and [36], BLER and PLR are an upper bound for testing the IEEE 802.11 PHY layer performance assuming deterministic protocols. Generally, in industrial communications and FA, a system is considered reliable if it provides only one communication failure during thousand years [7]. This assumption is based on the recommendation IEC 61784, where the communication failure should compose at most 1% of the Mean time to failure, in this case of thousand years [37]. A communication failure is caused when the receiver lacks the correct packet reception, and this depends on one of the three following events. 1) The receiver does not receive the packet. 2) The received packet contains erroneous bits. 3) The packet is received outside the latency requirement. Among the different metrics used for the reliability estimation, PER and BLER provide error rate values assuming the communication failure. Nevertheless, only BLER is focused on evaluating the performance at the PHY layer, and thus, is recommendable for evaluating the FEC techniques. For fair comparisons between different BLER results shown in different publications, additional elements such as SNR, channel typology, and channel properties must be included in the analysis. 2) LATENCY: DECODING LATENCY In industrial communications, latency is generally expressed as cycle time [4], [7], [36]. This metric expresses the latency between the data transmission and its reception. Three main processes affect this metric. The first one is the transmitter latency, which expresses the time elapsed between the data available at the MAC layer and its subsequent transmission by the PHY layer. Coding and modulation processes are parts of this period. Second, propagation latency represents the associated delay of the channel. Finally, the receiver latency considers the required time for demodulation and decoding. Moreover, for the criticality of the processes involved within the industrial environment, cycle time is commonly bounded by a maximum value Tmax, which is half of the update rate period of the sensors and actuators included in the network [7]. An accurate estimation of the impact of the FEC on the latency performance of the wireless system is a complex measurement. Different and uncorrelated factors must be considered, such as the decoder architecture, the programming language, the interpretation of the algorithm’s pseudocode, and the hardware performance. In consequence, the comparison among different proposals is not straightforward. FEC contributes notably to the receiver decoding latency [22]. In many works, it is described as the ratio between the clock cycles required by the decoding latency and the clock frequency of the hardware used for the implementation [33], [38], [39] Decoding Latency =Required Clock Cycles Decoder Clock Frequency.(1) IV. CHANNEL CODING: A TAXONOMY The literature includes many examples of FEC techniques suitable for short packet communication scenarios, and such choices have risen over the years. FEC can be addressed as memory-based and memoryless FEC (or Block Codes). This section aims to provide a state-of-the-art of them, moreover suggesting some FEC candidates for FA wireless systems. A. BLOCK CODES Block codes are a class of FEC in which the data stream turns into a block of Kbits; subsequently, by using a generating matrix, further N−Kbits, known as redundancy bits, have been included. The code rate R=K Nspecifies the number of these bits. A primary classification proposed for these techniques consists of distinguishing between linear and nonlinear techniques. Linear block codes are less complex than nonlinear ones and offer commonly good decoding performances. The nonlinear block codes are characterized by a very high complexity that does not allow their consideration in low latency communications nowadays [40]. On the contrary, the respective counterpart shows many applicative examples in numerous standards. The linear block codes can be classified as a function of the generating matrixes and attainable performance. On this basis, the linear block codes are grouped as follows: LDPC, algebraic, fountain, and compressive sensing based. Table 5 compares the block code techniques using reliability in short packet regime and parallel decoding capability. Parallel decoding is a crucial parameter for achieving the stringent latency requirements for FA. LDPC codes were discovered by Gallager in the 60s [41], and rediscovered in the late 90s by Mackay and Davey [42]. The remarkable decoding performance of this family have fostered their use in many standards since the first decade of XXI century. Some examples are IEEE 802.11 [43], WiMax [44], 5G NR [45], ATSC3.0 [46], 10GBase-T [47], WiGig [48], DVB-T2 [49], [50], DVB-S2 [51], and Consultative Committee for Space Data Systems (CCSDS) [52]. Generally the LDPC are classifiable into three main subfamilies: Random LDPC [41], Quasi-Cyclic (QC) LDPC [53], and Cyclic LDPC [54], among these QC-LDPC are suitable for communications in FA scenarios; indeed, the possibility of a full parallelization secures low latencies. Nevertheless, QC-LDPC shows error floors in BLER-based VOLUME 3, 2022 681 FANARI ET AL.: SURVEY ON FEC TECHNIQUES FOR INDUSTRIAL WIRELESS COMMUNICATIONS TAB LE 5. Block Codes and FEC Comparison analysis [20] in short packet transmissions. This problem can be partially solved by the combination with CRC [55], [56]. Algebraic codes include a wide set of FEC techniques that, due to their mathematical properties, exhibit two main advantages: easy implementation and generally high decoding performance [20]. WPAN [57], DVB-T [58], DVB-T2 [50], IEEE 802.11ad [59], CCSDS [60], [61], MediaFLO [62], and 5G NR [45] are examples of standards that employ this FEC family. Among the several FEC grouped as algebraic, the authors of this article have identified four main subfamilies: the Hamming codes [63], Golay codes [64], the BCH codes [65], [66], [67], and the Reed–Muller codes [68]. Among the most well-known Algebraic techniques, there are Reed–Solomon (RS) [69], and Gabidulin [70] that belong to BCH, whereas the Reed–Muller subfamily includes the recently developed Polar codes [71]. Regarding the algebraic codes in the short packet regime, on the one hand, their decoding performance worsens [20]. On the other hand, the use of parallel decoding is possible [20]. However, a few exceptions, suitable for short packet transmissions, have been introduced recently in the literature, as the cases of Polar codes [72], [73], [74], and BCH codes with OSD decoding [75]. A negative aspect concerned OSD decoding is the increased decoding latency [75]. Fountain codes were introduced in the late 90s by Bayers et al. [76] to propose an efficient solution in multicast communications, in particular, to enhance the efficiency of ARQ [77]. Indeed standards employed in multicast and broadcast communications, such as 3GPP MBMS [78], and ATSC3.0 [79] use these FECs. The large number of Fountain techniques developed over the years can be categorized into three main subfamilies: the LT codes [80], the Raptor codes [81], and the Tornado codes [82], [83]. Fountain codes present a high complexity [84] which prevents their use in URLLC and especially for FA [20]. However, recent versions of Fountain have been proposed for URLLC scenarios, such as in [85] and [86], where the transmission scheme is significantly simplified. The proposed scheme in [86] does not offer error floors for BLER values below 10−7. Sparse vector codes (SVC) are a novelty within the world of FEC techniques. Based on compressive sensing [87], their studies started around 2017. The first results are promising for ultrasmall values of K. In particular, for Kbelow 100 bits, they show comparable performance with Polar codes [88], [89], 682 VOLUME 3, 2022 TAB LE 9. Hardware Implementation Part I on ASIC and provide BLER of 10−6forSNRcloseto4dB. Ercan in 2020 offers an alternative to SCL by introducing the SCF algorithm, which provides similar reliability to Lin and Fan models, with a reduced complexity N/3P[171]. The Ercan model is currently the first implementation of SCF. In the specific, an ASIC has been used for the model [171]. Also, the implementation of the Sphere algorithm [148], [172], [173] reveals promising for reduced block lengths. However, the information on the hardware implementation of this approach is scarce. Similarly addressed is the use of the OSD VOLUME 3, 2022 689 FANARI ET AL.: SURVEY ON FEC TECHNIQUES FOR INDUSTRIAL WIRELESS COMMUNICATIONS TABLE 10. Hardware Implementation Part II 690 VOLUME 3, 2022 TABLE 11. Proposed Decoding Algorithm FIGURE 3. Reliability results for R=1/3. algorithm [16]. Among the various proposals examined, the BP algorithm [174] appears to be the least efficient for Polar codes. In conclusion, SCL-based implementations are the most efficient in complexity and reliability. Nevertheless, SCF is just a promise, and further investigation regarding this novelty is necessary. C. PARALLEL CONCATENATED CONVOLUTIONAL CODES (PCCC) PCCC code implementations support the use of Log-MAPbased algorithms that enable iterative decoding. Generally, all of the models allow semiparallel decoding, with complexities tending to 2N/P. Such models are Bougard’s [175], Wong’s [176], and Xiang’s [177]. Further implementations are Shin’s model, with complexity tending to N/P[178], and Maunder’s model [150] resulting so far the only proposed full parallel decoding for PCCC. Both models implement MAP. Among the different models, Wong’s model performs better in terms of reliability due to an ASIC implementation ensuring a BLER of 10−5at SNR of 1.75, 2.25, and 3 dB, for 512-, 256-, and 128-bit block sizes, respectively. D. TAILBITING CONVOLUTIONAL CODES (TBCC) In the TBCC case, iterative algorithms such as WAVA [179] [180], CVA [181], and OSD [182] are proposed for short packet transmissions. However, performance results are only available for WAVA-based proposals. In particular, the ZTE model suggested for the 5G NR standard provides a semiparallel architecture with a complexity per iteration tending to N/P[179]. VII. RELIABILITY AND LATENCY PERFORMANCE COMPARISONS FOR THE FEC CANDIDATES This section compares the candidate codes presented in Section III, i.e., QC-LDPC, Polar, TBCC, and PCCC. The analysis is based on a comparison of their reliability and latency performances. Reliability is analyzed using MATLAB simulations based on BLER metrics. Finally, latency is evaluated as decoding latency, following the approach proposed by previous works [33], [38], [39]. The decoding algorithms were previously suggested in Section IV. A. PRELIMINARIES The suggested metrics are applicable to comparisons among different FEC techniques, offering reliability and latency performances for various payload sizes. The BLER represents the reliability metric. For the latency evaluation, the decoding latency is optimal for focusing on the PHY layer performance. Finally, the proposed payload lengths are 16, 32, and 64 B. Concerning the decoding latency evaluation, its calculation is available by counting the number of clocks required in the decoding complexity. For this analysis, the results offered in Section VI are the reference. The FEC candidates compared in this section are QC-LDPC, CA-POLAR, LTE TURBO, and TBCC. QC-LDPC and CA-POLAR are in the 5G NR standard, while TURBO and TBCC are part of LTE. Furthermore, QC-LDPC has coupled to the Belief Propagation algorithm, CA-Polar to an SCL with L=2, and a CRC of 24 bits, while LTE Turbo uses Log-MAP finally, TBCC with WAVA. B. RELIABILITY The reliability analysis discussed in this section aims to evaluate the performance of the candidates expressed in terms of BLER at different payload lengths. The BLER threshold value is taken by the reliability comparisons proposed in [20], which surveyed and analyzed different FEC techniques candidates for WirelessHP. BLER values have been obtained with a specifically developed MATLAB workbench, which provides simulation results to compare different FEC techniques with code rates 1/3 and 1/2. The code rate at 1/2 is a well-known configuration for industrial communications [20], whereas the VOLUME 3, 2022 691 FANARI ET AL.: SURVEY ON FEC TECHNIQUES FOR INDUSTRIAL WIRELESS COMMUNICATIONS FIGURE 4. Reliability results for R=1/2. case of 1/3 is a configuration proposed for 5G NR for the signaling transmission of the Physical Broadcast Channel [183], also targeted for short packet communications. In this case, the data size varies between 40 and 100 bits. The simulations assume QPSK modulation over an AWGN channel. Further simulation parameters are the number of transmissions per simulation point (3 ·106to obtain a BLER threshold of 10−6). The SNR curve is obtained with a step of 0.25 dB. Figs. 3 and 4 display the simulation results. The curves show the variation of reliability as a function of the payload size. The vertical axis represents the payload values, while the horizontal axis shows the SNR values obtained for each BLER threshold. Fig. 3 presents the threshold values for code rate 1/3. The figure shows how the SNR for different payload sizes varies according to the FEC employed. It is possible to observe how for the range 16–32 B QC-LDPC, and CA-POLAR provide similar performance, while CA-POLAR is better for 16-B payloads. CA-POLAR lacks the threshold for 64 B due to its specific design in the 5G NR standard. In the 64-B case, QC-LDPC and LTE TURBO have comparable performance. Finally, analyzing TBCC, a constant threshold can be observed as a function of the different payload lengths because it is a CC type. Fig. 4 shows the threshold values for code rate 1/2. First, is is observed that CA-POLAR provides the best performance in all considered ranges. However, QC-LDPC gets closer when the payload is 64 B. LTE TURBO offers 16 dB lower performance than CA-POLAR, whereas TBCC only offers comparable performance to LTE TURBO for 16 B. The most relevant conclusions deducted from the results are the following. First, CA-Polar and QC-LDPC outperform the other candidates. Nevertheless, CA-Polar shows slightly better performances. Among the candidates, TBCC offers the worst decoding performance. Second, the variation of payload sizes affects the decoding performances of the candidates, except for TBCC. C. LATENCY Decoding latency is defined using (1). However, this definition requires a previous step, which regards the estimation of the algorithmic complexity in terms of cycle clocks. Table 11 shows required clock cycles associated with the decoding algorithm choices (It and Pcorrespond to the number of iterations and parallel processes, respectively). BP and LogMAP enable full parallel decoding, while SCL and WAVA only allow semiparallel decoding. For CA-POLAR, P=32 was assumed for payloads of 16 B, since [170] does not consider such low payload sizes. Table 12 shows both the count of clocks required by the decoding algorithm and the corresponding decoding latencies. The number of clock cycles respects the values of the parameters shown in Table 11. The decoding latency calculation is performed as defined in [39].The clock frequency is considered at 300 MHz. This choice is motivated by the similar clock frequencies performed by the FPGA models used in [10] and [32]. In [32] a Spartan DS610 is used, whereas [10] proposes a Xilinx 7035i Zynq SoC. The results show that QC-LDPC and LTE TURBO provide very low decoding latency due to the full parallel decoding, ensuring constant values as the block length varies. QC-LDPC provides a decoding latency of 0.017µs and 0.01µs, respectively, for code rates of 1/2 and 1/3, while LTE TURBO provides a constant decoding latency of 0.053 µs. Although CA-POLAR does not offer a fully parallel architecture, it allows low latency decoding for 16 and 32 B. In the case of 16 B, it guarantees 0.027µs for code rate 1/2 and 0.13µs for code rate 1/3, while for 32 B, it offers 0.05 and 0.13 µs respectively. Finally, in the case of 64 B, the decoding latency obtained is 0.11µs. In conclusion, the best performing choice in terms of latency is the QC-LDPC. VIII. FUTURE CHALLENGES Nowadays, current industrial wireless systems adopt classical FEC techniques with reduced complexity, such as CC and RS. Nevertheless, the numerous contributions in short packet communications risen in URLLC have introduced valid alternatives for these scenarios. Many of these proposals achieve the decoding latency performance of these classic solutions due to the property of parallel decoding typical of the adopted decoding algorithms. Examples are LDPC and Polar codes applied in 5G NR and TBCC and Turbo applied in LTE as observed in Section V-C. Moreover, the recent novelties SVC [88], [91], [92] and PAC Polar [139], whose research is in a preliminary phase, could offer more alternatives for URLLC and FA future developments. Therefore, based on the results obtained in this study, we discuss some open issues that emerged for FEC techniques in FA environments as follows. 1) MAC layer aspects: Wireless systems for FA need to ensure stringent performance at the MAC layer. Due to the characteristics of industrial environments, the MAC must provide deterministic communications with a reduced number of retransmissions to ensure low latencies and high reliability, particularly for safety applications, as discussed in Section I-A. In this case, a wireless 692 VOLUME 3, 2022 TABLE 12. Decoding Latency Results for a Decoding Clock Frequency of 300 MHz system design that combines a reduced number of retransmissions at the MAC layer with high-performant FECs at the PHY layer could achieve the desired performance for critical scenarios. 2) FEC candidates: Future directions are addressed here for the FEC candidates. The mathematical property of QC-LDPCs allows high performance (as observed in [53]) and a reduced decoding latency due to the full parallel decoding. The literature mainly offers proposals based on MIN-SUM and BP regarding decoding algorithms for short packets. The results proposed within the survey are proposed for AWGN channels, proposing both implementations on FPGAs and ASICs.CA-Polars show high performance for short packets when SCL is adopted. The proposals surveyed in this work allow semiparallel decoding and reduced decoding latencies. However, the decoding latencies are higher than QCLDPC. Numerous trials published in the literature adopt ASIC [22]. Moreover, new decoding algorithms for CA-Polar have been proposed recently, offering interesting results (SCF, Sphere) [148], [171], [172], [184]. However, only preliminary results are provided.The proposed Log-Map decoding algorithm for Turbo codes in [150] offers a full-parallel solution for the first time in these FECs. Finally, TBCC with WAVA seem to cope with the high decoding latencies characteristic of this FEC technique [179].The authors have detected the following future directions for the proposed solutions. On the one hand, the combination with the FEC and the suggested algorithms must be tested with simulations to evaluate their performance with industrial channels. On the other hand, field trials within industrial environments must be conducted. 3) Noveloneous decoding algorithms for the FEC candidates: CA-Polar is a hot topic concerning the coding theory due to its demonstrated performance for short packet transmissions. Traditionally, SCL is the decoding algorithm adopted with this FEC. Nevertheless, novelties such as SCF [171] and sphere decoding algorithms [148], [172], [184] could achieve SCL performance with lower latencies. Therefore, further studies in this direction are needed. Analyzing the contents of these articles is possible addressing the following challenges. For [148], [171], and [172] the algorithms structure is described, and preliminary results obtained by simulations are given. Therefore, the subsequent hardware implementation for these proposals must be proposed considering FPGA or ASIC to compare with the previous proposals’ results. Finally, the authors in [184] offer a detailed description of the proposal with a guideline for its hardware implementation. Nevertheless, this work lacks comparable results; consequently, preliminary studies must be conducted to evaluate the algorithm’s performance with simulations, considering AWGN and industrial channel models. 4) Novelties on FEC techniques: SVC has recently emerged as a potential FEC technique for extremely short packet transmission (payloads below 100 bits), offering performance comparable to CA-Polar [88], [89], [90], [91], [92]. Preliminary studies show that SVC has limitations in code rate values (lower or equal than 1/4) and modulations. Nevertheless, SVC could be considered an excellent candidate for future FA applications, particularly in safety communications. Therefore, its hardware implementation toward ultralow latency communications is a future challenge. PAC, recently introduced by Arikan [139], also presents capabilities as a future candidate for FA communications, potentially outperforming CA-Polar. Nevertheless, the studies presented are preliminary, showing a few contributions focused on decoding algorithms. Potentially, PAC could be a potential FA candidate if combined with decoding algorithms designed for lowlatency communications. Therefore, the development of decoding algorithms will be a hot topic and raise interest in future studies. 5) Toward the use of nonlinear codes in FA applications: The binarization of the Preparata and Kerdock codes combined with low complex decoding algorithms addresses future challenges for low latency communications [40]. In this first proposal, only the MAP decoding algorithm has been considered. Therefore, the following challenges have been detected. First, a hardware implementation must be conducted as it could open new frontiers for low latency communications and FA. Second, different decoding algorithms suitable for FA environments, such as BP or SCL, must be tested and compared with the results of adopting MAP, as this research topic shows only this preliminary contribution. VOLUME 3, 2022 693 FANARI ET AL.: SURVEY ON FEC TECHNIQUES FOR INDUSTRIAL WIRELESS COMMUNICATIONS IX. CONCLUSION FEC techniques within FA wireless systems are crucial for meeting FA requirements. Several articles on URLLC identify FEC as the tool for ensuring high reliability and low latency wireless communications when short payloads are transmitted. However, there is a gap in the literature on the method for applying FEC techniques for FA communications, which, compared to URLLC, have more demanding requirements. In this work, the aim was to satisfy this need. This article has studied the FA background at a high level and several proposals related to the design of wireless systems for FA. Subsequently, the study focused on a general overview of the use cases proposed. One relevant conclusion is the lack of focus on the PHY layer. As a result, the use cases exclusively offer requirements for the MAC layer. However, the PHY layer design is not negligible in this particular family of wireless communications. The properties of the propagation model typical of the industrial channel models complicate the exclusive use of retransmission techniques to fulfill the FA requirements. Such requirements refer to the inherent criticality of industrial processes, where the protection of workers, machinery, and production is essential. After discussing the problems related to the FA requirements, the focus shifts to the in-depth study concerning the FEC techniques. The first part of this study has consolidated a comprehensive state-of-the-art of FEC techniques. The proposed techniques are considered the most suitable for short packet communications. The chosen parameters are parallel decoding, which benefits the latency performance and high reliability in short packet communications. The identified FEC candidates are QC-LDPC, POLAR, TBCC, and PCCC. In particular, in POLAR, CA-POLAR is considered, while LTE TURBO for the case of PCCC. Another relevant aspect regarding the FEC techniques is the choice of decoding algorithms. These methodologies strongly influence the PHY layer performance and are essential to meet the requirements. The suggested combinations are BP for QC-LDPC, SCL for CA-POLAR, WAVA for TBCC, and Log-MAP for LTE TURBO. These choices arise from the performance analysis of several proposals encountered in the literature. A further element resulting from this work is the absence of specific metrics in the analysis of FEC for short packet communication scenarios. Consequently, the desired PHY layer performance for FA use cases is not precise. One result of this work is the proposals of PHY layer metrics. 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His research interests include coding theory and wireless communications. ENEKO IRADIER (Member, IEEE) received the M.S. and Ph.D. degrees in telecommunications engineering from the University of the Basque Country, Bilbao, Spain, in 2018 and 2021, respectively. In 2017 and for a year and a half, he worked as a Student Researcher with IK4-Ikerlan Technology Center, where he developed ultrareliable low latency communications communications and ultralow consumption systems. Since 2015, he has been part of the TSR Research Group, University of the Basque Country, where he is currently a Postdoctoral Researcher. He did an internship with the Communications Research Centre Canada, Ottawa, ON, Canada, during his doctoral studies. His current research interests include designing and developing new technologies for the future physical layer of communication systems and wireless solutions for Industry 4.0. Dr. Iradier has served as a Reviewer for several renowned international journals and conferences in wireless communications. 698 VOLUME 3, 2022