D3.1 - System Specifications

This document is part of a project that has received funding from the European Union’s Horizon Europe research and innovation programme under agreement No 101192615. The content of this document reflects only the author's view and the European Commission is not responsible for any use that may be made of the information it contains. Project Acronym: NOVETROL Grant Agreement number: 101192615 (HORIZON-CL5-2024-D2-01) Project Full Title: Novel current control for climate neutral energy infrastructure DOCUMENT CATEGORY D3.1 – System Specifications Dissemination level: PU -Public Type of deliverable: R -Report Contractual date of delivery: 30 November 2025 Deliverable leader: EAT Status - version, date: Final – v1.0, 2025-11-28 Keywords: Current limiter; specifications; optimisation D3.1 – System Specifications Final – v1.0, 2025-11-28 Dissemination level: PU -Public Page 2 Executive Summary This document, D3.1 - System Specifications, defines the analytical requirements and design methodologies for Current Limiting (CL) devices intended for DC and hybrid AC/DC microgrid infrastructures. The content is aligned with the NOVETROL project’s objective of enabling safe and efficient power flow control in climate-neutral energy systems. As included in the Description of Action, the requirements for the EMR-components are selected to comply to the different use-case scenarios and applications identified in T2.1. The specifications of the EMR components will be considered for each operating mode of the CL device (Fault current limiter - FCL, tuneable current limiter - TCL, and pre-charger - PC), in the use-cases defined by UPB and ACT. Real-device and components behaviour obtained through the other WP3 tasks will help to further refine the requirements for the different use-case scenarios modelled in T2.2. After a brief review of the existing technologies and solutions for current limiting devices, the specifications definition starts by establishing mathematical models for the main components of the current limiter, the magnetic field generator and the EMR chips, and then combines these models to describe overall system behaviour. It also describes how magnetic flux density, inductance, and extraordinary magnetoresistance affect the resistance, efficiency, and fault current under different operating conditions. The document introduces a multi-objective optimization framework to determine optimal design parameters for each use case. The optimization aims to minimize fault current while maximizing efficiency, subject to geometric, volumetric, and performance constraints. For example, the use case for a 48V, 20A system demonstrates the approach, achieving an efficiency of 99.5% and limiting fault current to 264A. The five High-Level Use Cases (HLUC) described in Deliverable 2.1 are considered: photovoltaic installations, battery storage, DC-operated loads, hybrid AC/DC grids, and electric vehicle charging. The functional parameters can be classified in 30 specific scenarios grouped into three current bins ranging from below 50A to 1600A, covering power levels from small residential systems to high-power industrial applications. Each scenario was analysed to identify optimized designs, all of which achieved efficiencies above 98%. To improve economic viability, a down-selection process reduced the number of design variants from 30 to 10 while assuring compliance with performance criteria. The document concludes that proposed system specifications can be used in the main use cases, at the same time outlining next steps, including validating optimized designs through simulation and real-world testing, further reducing design variants for cost-effectiveness, and preparing integration guidelines for DC distribution standards. Scalability for high-power applications such as industrial processes and megawatt EV charging is also identified as a future focus. D3.1 – System Specifications Final – v1.0, 2025-11-28 Dissemination level: PU -Public Page 3 Deliverable leader: EAT Contributors: Nikolaos Fotias, Stefan Costea (EAT) Reviewers: Grigore Stamatescu (UPB) and Mina Gheamalinga (ACT) Approved by: UPB Document History Version Date Contributor(s) Description 0.1 17/10/2025 Stefan Costea Nikolaos Fotias Initial ToC and first draft 0.2 25/11/2025 Stefan Costea Nikolaos Fotias Updated content 1.0 28/11/2025 Stefan Costea Nikolaos Fotias Final version for submission D3.1 – System Specifications Final – v1.0, 2025-11-28 Dissemination level: PU -Public Page 4 Table of Contents Executive Summary .................................................................................................................................. 2 List of Figures ........................................................................................................................................... 5 List of Tables ............................................................................................................................................. 6 Abbreviations ........................................................................................................................................... 7 1. Introduction ..................................................................................................................................... 8 2. Current limiter technologies ............................................................................................................ 9 2.1 Current Limiting Principles ........................................................................................... 9 2.2 Technologies for 20 A Range ...................................................................................... 10 2.3 Technologies for 200 A Range.................................................................................... 10 2.4 Technologies for 1000 A Range.................................................................................. 11 3. Current Limiter Modelling and Design........................................................................................... 13 2.1 Magnetic Field Generator model ......................................................................... 13 2.2 EMR Element Model............................................................................................. 14 2.3 Current Limiter Device Model .............................................................................. 17 4. Optimal Design Definition via Multi-Objective Optimisation ........................................................ 19 3.1 An Introduction to Multi-Objective Optimisation ................................................ 19 3.2 Objective Function Selection ................................................................................ 19 3.3 Non-Linear Constraints ........................................................................................ 19 3.4 Linear Constraints ................................................................................................ 20 3.5 Example Case ....................................................................................................... 20 5. NOVETROL Uses Cases Specifications ............................................................................................ 23 6. Use Case Optimisation and Down-selection .................................................................................. 26 7. Conclusion & Next Steps ................................................................................................................ 31 References.............................................................................................................................................. 32 D3.1 – System Specifications Final – v1.0, 2025-11-28 Dissemination level: PU -Public Page 5 List of Figures Figure 1. Basic DC circuit configuration ..................................................................................... 9 Figure 2. EMR Chip Resistance (𝑹𝑬𝑴𝑹) for (𝑩) perpendicular to the conduction path. ...... 16 Figure 3. Magnetoresistance ratio (𝑴𝑹) dependence on the geometrical parameters......... 16 Figure 4. Pareto Front for the described optimisation problem ............................................. 21 Figure 5. Current profile through the current limiter .............................................................. 22 D3.1 – System Specifications Final – v1.0, 2025-11-28 Dissemination level: PU -Public Page 6 List of Tables Table 1. Current limiting technologies comparison ................................................................. 12 Table 2a. Bin1: 20A and 40kW ................................................................................................. 24 Table 2b. Bin 2: 20A to 200A and 22kW to 120kW.................................................................. 25 Table 2c. Bin 3: 100A to 1000A and 150kW to 570kW ............................................................ 25 Table 3a. Optimized design and operation parameters for Bin 1 ........................................... 26 Table 3b. Optimized design and operation parameters for Bin 2 ........................................... 27 Table 3c. Optimized design and functional parameters for Bin 3 ........................................... 27 Table 4a. Limited current and efficiency for Bin 1 ................................................................... 27 Table 4b. Limited current and efficiency for Bin 2................................................................... 28 Table 4c. Limited current efficiency for Bin 3 .......................................................................... 29 Table 5. Selected design variants ............................................................................................. 30 D3.1 – System Specifications Final – v1.0, 2025-11-28 Dissemination level: PU -Public Page 7 Abbreviations Abbreviation Description CL Current Limiter DC Direct Current EMR Extraordinary Magnetoresistance MMF Magnetomotive Force NTC Negative Temperature Coefficient PTC Positive Temperature Coefficient MOSFET Metal-Oxide-Semiconductor Field-Effect Transistor IGBT Insulated Gate Bipolar Transistor SCR Silicon Controlled Rectifier SSCB Solid-State Circuit Breaker HVDC High Voltage DC FCL Fault Current Limiter TCL Tuneable Current Limiter PC Pre-charger EV Electric Vehicle SiC, GaN Silicon Carbide, Galium Nitride MR Magnetoresistance Ratio MOO Multi Objective Optimization HLUC High Level Use Case SSH Safe Storage at Home CotS Cottage in the Sun MCS Megawatt Charging System WP Work package D3.1 – System Specifications Final – v1.0, 2025-11-28 Dissemination level: PU -Public Page 8 1. Introduction As the Energy Transition requires increased control over power flows and efficient energy use, especially for electrical energy, a significant challenge is represented by safety measures and the prevention of dangerous operation modes. As part of the proposed solutions, Direct Current (DC) power systems are increasingly used in renewable energy, electric vehicles, data centers, and industrial applications. Protecting these systems against overcurrent and fault conditions is critical for reliability and safety. Excessive current during faults or inrush events needs to be managed, to reduce stress on components and improve system resilience. The NOVETROL project aims at developing new Current Limiting (CL) devices, based on highmobility materials and the extraordinary magnetoresistance (EMR) effect, as well as their integration into DC and hybrid AC/DC microgrid infrastructures. The novelty of such emerging electrical distribution technology, with supply at low and medium DC voltage, given the incipient stage of standardization, requires a large effort to derive appropriate models and related worst-case scenarios for both control and optimal operation, in a sustainable framework and from a life cycle engineering perspective. The requirements for the current limiters can be generated in an analytical way, and later be used in different use cases, as specified in deliverable 2.1. Starting with the current limiter operation, mathematical models for the current limiter concept can be extracted, leading to the requirements for each use case. Adjusting the selection criteria, a reduced number of design variants are proposed, to ensure product viability. D3.1 – System Specifications Final – v1.0, 2025-11-28 Dissemination level: PU -Public Page 9 2. Current limiter technologies Current limiting technologies have been proposed and implemented in electrical distribution. This section reviews state-of-the-art technologies for managing excessive DC currents across three target ranges: 20 A, 200 A, and 1000 A. 2.1 Current Limiting Principles Current limiters operate by introducing additional impedance or controlling current flow during overcurrent conditions. Their main function of a device acting as FCL in DC power systems is to reduce the maximum current value in case of faults. This limitation can impose significant stress on the current limiter itself, therefore the practical implementations use the device for a specific duration (up to 1ms or so), until the circuit protection device can interrupt the current. As the solid-state circuit breakers have a very fast operation, they do not usually require a current limiter. However, a more affordable solution is to use hybrid circuit breakers, with longer interruption times. Figure 1 shows the basic DC circuit topology employing a hybrid circuit breaker (650 µs operation) and the effect of the inductive current limiter. Figure 1. Basic DC circuit configuration It can be seen from the simulation results that the current value can reach 6.2kA before the circuit breaker can interrupt the circuit, if no current limiting device is used. If a 130 µH inductor is used, the current rises with a lower slope and the maximum current is only 2.5 kA, which is more easily managed by the circuit breaker. If the device is operated as pre-charger, its main function is also to limit the current in the system during the charging of the DC link capacitance of a converter that is connected to an operating DC grid. This limited current must be within the operating range of the system; therefore, it will not overstress the pre-charging device. It should be mentioned that the implementation of this function may pose more challenges for the EMR material capabilities, but this objective will be addressed during the execution of WP3. D3.1 – System Specifications Final – v1.0, 2025-11-28 Dissemination level: PU -Public Page 16 Figure 2. EMR Chip Resistance (𝑹𝑬𝑴𝑹) for (𝑩) perpendicular to the conduction path. Figure 3. Magnetoresistance ratio (𝑴𝑹) dependence on the geometrical parameters D3.1 – System Specifications Final – v1.0, 2025-11-28 Dissemination level: PU -Public Page 17 2.3 Current Limiter Device Model Combining the equations presented in sections 2.1 and 2.2 the mathematical model of the current limiter can be extracted. Specifically, the total resistance of the limiter can be expressed in relation to the current flowing through it, as per the following equation: 𝑅𝐸𝑀𝑅=𝜌0𝑡𝐸𝑀𝑅 𝑆𝐸𝑀𝑅 ( 1+ 𝜇𝑚𝑎𝑡 2(𝑁𝜇0 𝑙𝑔𝑎𝑝𝐼)2 1+𝜇𝑚𝑎𝑡𝑁𝜇0 𝑙𝑔𝑎𝑝𝐼𝑡𝐸𝑀𝑅 𝐿𝐸𝑀𝑅 ) =𝜌0𝑡𝐸𝑀𝑅 𝑆𝐸𝑀𝑅 ( 1+ 𝜇𝑚𝑎𝑡 2𝑁2𝜇02𝐼2 𝑙𝑔𝑎𝑝 2 1+𝜇𝑚𝑎𝑡𝑁𝜇0𝐼𝑡𝐸𝑀𝑅 𝑙𝑔𝑎𝑝𝐿𝐸𝑀𝑅 ) (16) The presented equation provides a detailed representation of the resistance of the collective EMR and field generator components and can be used to further extract valuable system metrics. Specifically, for a certain nominal operating current of the system and load rated power at the aforementioned nominal current, the efficiency of the current limiter can be expressed as 𝜂𝑠𝑦𝑠=𝑉𝑛𝑜𝑚𝐼𝑛𝑜𝑚 𝑉𝑛𝑜𝑚𝐼𝑛𝑜𝑚+ 𝜌0𝑡𝐸𝑀𝑅 𝑆𝐸𝑀𝑅 ( 1+ 𝜇𝑚𝑎𝑡 2𝑁2𝜇02𝐼𝑛𝑜𝑚 2 𝑙𝑔𝑎𝑝 2 1+𝜇𝑚𝑎𝑡𝑁𝜇0𝐼𝑛𝑜𝑚𝑡𝐸𝑀𝑅 𝑙𝑔𝑎𝑝𝐿𝐸𝑀𝑅 ) 𝐼𝑛𝑜𝑚 2(17) Finally, for a specified nominal operating voltage the limiting current can be calculated during a fault condition, assuming that the fault is a perfect short. In this case when steady state is achieved the total system voltage will appear on the EMR chip of the current limiter and therefore the fault current will be given as a solution of the following equation: 𝜌0𝑡𝐸𝑀𝑅 𝑆𝐸𝑀𝑅 ( 1+ 𝜇𝑚𝑎𝑡 2𝑁2𝜇02𝐼𝑓𝑎𝑢𝑙𝑡 2 𝑙𝑔𝑎𝑝 2 1+𝜇𝑚𝑎𝑡𝑁𝜇0𝐼𝑓𝑎𝑢𝑙𝑡𝑡𝐸𝑀𝑅 𝑙𝑔𝑎𝑝𝐿𝐸𝑀𝑅 ) 𝐼𝑓𝑎𝑢𝑙𝑡=𝑉𝑛𝑜𝑚 (18) The above equation is a third order polynomial equation and therefore will have three solutions. For certain values of the component parameters the solution is given by 𝐼𝑓𝑎𝑢𝑙𝑡 =√√(−27𝑎2𝑑+9𝑎𝑏𝑐−2𝑏3)2+4(3𝑎𝑐−𝑏2)3+(−27𝑎2𝑑+9𝑎𝑏𝑐−2𝑏3) 33√2 3𝑎 −√2 3(3𝑎𝑐−𝑏2) 3𝑎√√(−27𝑎2𝑑+9𝑎𝑏𝑐−2𝑏3)2+4(3𝑎𝑐−𝑏2)3+(−27𝑎2𝑑+9𝑎𝑏𝑐−2𝑏3) 3−𝑏 3𝑎 Where, D3.1 – System Specifications Final – v1.0, 2025-11-28 Dissemination level: PU -Public Page 18 𝑎=𝜇𝑚𝑎𝑡 2𝑁2𝜇02 𝑙𝑔𝑎𝑝 2(20) 𝑏=𝜇𝑚𝑎𝑡𝑁𝜇0𝑡𝐸𝑀𝑅 𝑙𝑔𝑎𝑝𝐿𝐸𝑀𝑅 (21) 𝑐=1−𝜇𝑚𝑎𝑡𝑁𝜇0𝑆𝐸𝑀𝑅𝑉𝑛𝑜𝑚 𝑙𝑔𝑎𝑝𝐿𝐸𝑀𝑅𝜌0(22) 𝑑=−𝑆𝐸𝑀𝑅𝑉𝑛𝑜𝑚 𝑡𝐸𝑀𝑅𝜌0(23) Even though the presented equation is relatively difficult to manipulate, it will be used as the basis for the optimisation efforts presented in the following chapter. D3.1 – System Specifications Final – v1.0, 2025-11-28 Dissemination level: PU -Public Page 19 4. Optimal Design Definition via Multi-Objective Optimisation Given the plethora of design variables to be specified for the current limiter, it was decided to utilise multi objective optimisation to select the best set of variables for each current limiter design. 3.1 An Introduction to Multi-Objective Optimisation Multi-objective optimisation, is a branch of mathematical optimisation that deals with problems involving more than one objective function to be optimised simultaneously, taking into consideration different constraintslinear and non-linear, for the optimisation variables. Unlike single-objective optimisation, where the goal is to find one optimal solution, multiobjective optimisation provides a set of Pareto optimal solutions. Those solutions, which are defined as the set of solutions where no objective can be improved without worsening at least one other objective, will be used to define the design parameters of the current limiter. 3.2 Objective Function Selection A relative obvious objective function for the system is to minimise the absolute value of the current during a fault event. Therefore, equation (25) is selected as one of the objective functions of the optimisation problem. Given the increasing focus in component efficiency, a decision was made to consider the efficiency as the second objective function. Give that the optimisation tries to minimise the objective functions, the following function will be defined to be minimised: 𝑓2=1−𝜂𝑠𝑦𝑠 (24) Therefore, the optimisation problem is defined as: min 𝑥∈𝑋{𝐼𝑓𝑎𝑢𝑙𝑡,1−𝜂𝑠𝑦𝑠}(25) Where x is the vector of design variables 𝑡𝐸𝑀𝑅, 𝑙𝐸𝑀𝑅, 𝑤𝐸𝑀𝑅, 𝐴𝑔𝑎𝑝, 𝑙𝑔𝑎𝑝 and 𝑁, and X is the allowable set of vectors the design variable vector can take, defined by upper and lower limits for each variable. It should be noted that the design space was selected to include the width of the chip instead of the cross-section area, with the cross-sectional area given by 𝑆𝐸𝑀𝑅=𝑙𝐸𝑀𝑅𝑤𝐸𝑀𝑅 (26) The reason for this choice will become more apparent when considering the geometrical constraints of the design problem. 3.3 Non-Linear Constraints Following the definition of the objective functions a set of non-linear constraints can be enforced in the problem to achieve different specification in the system, in this problem definition, three non-linear constraints were identified. Specifically, give the EMR chip need to fit perpendicularly in the air gap, it’s length should always be less than the length of the D3.1 – System Specifications Final – v1.0, 2025-11-28 Dissemination level: PU -Public Page 20 core. Assuming a core with a square cross-sectional area and ignoring the fringe effect, the first nonlinear constraint was: 𝑙𝐸𝑀𝑅<√𝐴𝐸𝑀𝑅 (27) The second constraint has to do with the total volume of the current limiter. To ensure the product is competitive it needs to offer advantages when compared to already established solutions. One application case that was examined was the replacement of time buying inductors in hybrid circuit breakers with the EMR current limiter under investigation. The comparison of interest in this case is the total volume of the system and given the correlation of the size of the inductor with its total inductance at a nominal current, it was decided that the other nonlinear constraint would ensure that the inductance of the current limiter will be lower than the inductance of a time buying inductor for an equivalent application. Therefore: 𝑁2𝜇0𝐴𝑔𝑎𝑝 𝑙𝑔𝑎𝑝 <𝐿𝑖𝑛𝑑 (28) The final non-linear constraint sets a limit to the maximum allowable fault current the optimiser will provide as a viable solution. As an initial set-point the limit was selected to be: 𝐼𝑓𝑎𝑢𝑙𝑡<100𝐼𝑛𝑜𝑚 (29) 3.4 Linear Constraints Linear constraints are like the nonlinear constraints, where the design parameters are constrained via a system of linear equations. For the optimisation of the current limiter one linear constraint was identified. Specifically, as already mentioned the chip needs to be placed perpendicularly in the airgap and therefore the width of the chip needs to be less than the length of the airgap. Therefore, the linear constraint is: 𝑤𝐸𝑀𝑅<𝑙𝑔𝑎𝑝 (30) 3.5 Example Case To showcase the results of the optimisation problem that was described in the previous section, an optimal current limiter was designed for a selected use case. The optimization algorithms were implemented in MATLAB and Simulink. Specifically, for the optimisation the drafted script used the gamultiobj function from the global optimisation toolbox, which used as inputs three user defined functions: objective functions (obj_fun.m), non-linear constraints (nonlin_con.m) and linear constraints (lin_con.m). Moreover, for the validation of the optimisation, simulation models capturing the component physics (magnetic field generator, with the dependence of the magnetic flux on the operating current, and the EMR device, with the dependence of the resistance on the magnetic flux value) were created in Simulink, using the Simscape library. Specifically, a current limiter was designed for to be integrated in a system with nominal voltage of 48V, maximum voltage of 52V and a maximum nominal current of 20A. Using those parameters, as well as selecting a maximum inductance of 100μH, the following pareto front of Figure 4 was extracted. D3.1 – System Specifications Final – v1.0, 2025-11-28 Dissemination level: PU -Public Page 21 Figure 4. Pareto Front for the described optimisation problem To ensure maximum efficiency without a significant fault current the solution selected provides an efficiency of 99.5% and a fault current of 264A. The designed parameters for this solution were: 𝑁=49 𝑙𝑔𝑎𝑝=0.011𝑚 𝐴𝑔𝑎𝑝=2.51 10−4𝑚2 𝑤𝐸𝑀𝑅=0.002𝑚 𝑙𝐸𝑀𝑅=0.0155𝑚 𝑡𝐸𝑀𝑅=0.0065𝑚 Utilising these values, a simulation can be set-up to validate the expected results, i.e., the value of the fault current and the system efficiency. The model was set-up in Simscape to ensure a combined simulation of the electrical and magnetic domain. The load is continuously supplied the peak nominal current of 20A and at 1s a perfect short circuit fault is injected. The current limiter current profile is presented in Figure5, showing the current profile through the current limiter with the effective limitation of the fault current to the designed value, after forcing a short circuit fault at 1s. Finally, the efficiency during the nominal operating condition was measured to be 99.47%. D3.1 – System Specifications Final – v1.0, 2025-11-28 Dissemination level: PU -Public Page 22 Figure 5. Current profile through the current limiter D3.1 – System Specifications Final – v1.0, 2025-11-28 Dissemination level: PU -Public Page 23 5. NOVETROL Uses Cases Specifications The High-Level Use Cases (HLUC) considered in NOVETROL are described in Deliverable “D2.1 – NOVETROL Use Cases and Scenarios”. Here we are reviewing the main areas where the energy transition can be enabled by the application of DC power distribution. There are 5 HLUCs that cover fast expanding technologies for generation, storage, and common loads: Photovoltaic installations. These applications are covered by the High-Level Use Case 1 (HLUC1) “Cottage in the Sun - CotS”, which include small houses, for powers up to 3.5kW, up to small commercial building or group of houses, for powers up to 18kW. For NOVETROL the cases of 10A and 50A were considered, with 2 level of possible voltages, 48V for small systems, and 350V for full house or building DC distribution. Battery storage. This application is described by the HLUC2 “Safe Storage at Home - SSH”. However, be sides the residential house application of 48V for new systems and 220V for systems that use the existing cabling, higher power applications, using 350V, were considered, for larger buildings. The main characteristic of this use case is the higher currents (100A and 200A) which can be encountered for battery discharge. DC operated loads. These use cases do not consider the DC power generation, but focus on the protection of the DC assets, in a DC power distribution system. The relevant voltage and power levels are specified in the HLUC3 “Safe DC at Home” (for powers up to 11kW and voltages up to 350V) and HLUC4 “Emerging DC at Work” (with high power capabilities, 1500V and up to 1-2MW power). Hybrid AC/DC grids. Similarly, the DC assets are considered in cases when the power distribution combines AC and DC sub-grids in the same system (usually behind the meter), in which the DC sub-grids have a bidirectional interface and integrate local generation and storage for power flow and energy optimization. These cases are also covered by HLUC3 and HLUC4. EV charging and V2X. The DC applications involving electric vehicles have special consideration because of the variety of voltage levels implemented (300V, 400V and 800V), as well as relatively high-power levels that are needed (up to 350kW for ultra-fast EV charging) in an automotive environment. The latest power levels implemented for heavy duty vehicles (1MW and more in the Megawatt Charging System MCS) need special consideration and are not covered in NOVETROL. HLUC5 “DC in Motion” is specifying the voltage and power levels that NOVETROL is studying. D3.1 – System Specifications Final – v1.0, 2025-11-28 Dissemination level: PU -Public Page 24 The parameters of the high-level use cases presented in deliverable D2.1 can be classified in 30 combinations of voltage and current levels, as presented in Table 2. If we consider the current ranges that NOVETROL is targeting, we can cluster the cases within the 3 categories: a) Bin1: Current below 50A; power up to 40kW (Table 2a) b) Bin2: Current 50A - 100A; power 22kW - 120kW (Table 2b) c) Bin3: Current 200A - 1000A; power 150kW - 570kW (Table 2c) Table 2a. Bin1: 20A and 40kW Case Current [A] Voltage [V] Power [W] HLUC 20 1 48 48 Safe DC Home 21 4 48 192 Safe DC Home 1 10 48 480 CotS 3 10 350 3500 CotS 22 10 220 2200 Safe DC Home 23 16 220 3520 Safe DC Home 24 16 350 5600 Safe DC Home 25 32 350 11200 Safe DC Home 2 50 48 2400 CotS 4 50 350 17500 CotS 11 50 300 15000 DC in Motion 14 50 400 20000 DC in Motion 17 50 800 40000 DC in Motion D3.1 – System Specifications Final – v1.0, 2025-11-28 Dissemination level: PU -Public Page 25 Table 2b. Bin 2: 20A to 200A and 22kW to 120kW Case Current [A] Voltage [V] Power [W] HLUC 5 100 48 4800 SSH 7 100 220 22000 SSH 9 100 350 35000 SSH 26 125 350 43750 Safe DC Work 27 125 650 81250 Safe DC Work 12 150 300 45000 DC in Motion 15 150 400 60000 DC in Motion 18 150 800 120000 DC in Motion 6 200 48 9600 SSH 8 200 220 44000 SSH 10 200 350 70000 SSH Table 2c. Bin 3: 100A to 1000A and 150kW to 570kW Case Current [A] Voltage [V] Power [W] HLUC 28 380 650 247000 Safe DC Work 29 380 1500 570000 Safe DC Work 19 440 800 352000 DC in Motion 13 500 300 150000 DC in Motion 16 500 400 200000 DC in Motion It should be mentioned that use case 30 (1600A and 1500V) covers special applications, such as energy intensive industries (glass and steel furnaces) and will require dedicated design. Case Current [A] Voltage [V] Power [W] HLUC 30 1600 1500 2,400,000 Safe DC Work D3.1 – System Specifications Final – v1.0, 2025-11-28 Dissemination level: PU -Public Page 32 References [1] https://www.digikey.com/en/ptm/a/ametherm/dc-inrush-current-limiter [2] https://www.ametherm.com/inrush-current/selecting-an-inrush-current-limiter.html [3] https://www.analog.com/en/resources/technical-articles/simple-methods-for-limitingcurrent.html [4] L. Qi, J. Pan, X. Huang and X. Feng, "Solid-state fault current limiting for DC distribution protection," 2017 IEEE Electric Ship Technologies Symposium (ESTS), Arlington, VA, USA, 2017, pp. 187-191 [5] https://www.ti.com/lit/an/snva604/snva604.pdf [6] A. Latorre, T. B. Soeiro, A. K. Iyer, R. Geertsma and H. Polinder, "High-Speed Solid-State Circuit Breaker With Latching Current Limiter for DC Systems," in IEEE Open Journal of Power Electronics, vol. 6, pp. 1882-1895, 2025. [7] https://www.energy.gov/oe/articles/fault-current-limiters-fcl-fact-sheet [8] J. Xun et al., “Design of Self-Powered Solid-State Fault Current Limiters for VSC DC Grids” in Frontiers in Energy Research. 9, 2021. [9] P. Wang et al., "A DC Solid-State Current Limiter With Adaptive Current-Limiting Ability," in IEEE Transactions on Industry Applications, vol. 59, no. 1, pp. 970-980, Jan.-Feb. 2023 [10] Z. Dong et al., "A Current Limiting Strategy for WBG-Based Solid-State Circuit Breakers With Series-Connected Switching Cells," in IEEE Transactions on Power Electronics, vol. 37, no. 12, pp. 14062-14066, Dec. 2022 [11] N. Fotias, S. D. Costea, L. G. Enger and J. Létang, “A Multi-Objective Based Design Optimisation Approach of Extraordinary Magnetoresistance Current Limiters”, submitted to ACDC Europe 2026, Berlin, April 2026