Integrated Circuits design using open-source EDA tools and OpenPDKs

MOS-AK, LatAm 2025 Projects: BMFTR -> FMD-QNC (16ME0831) Integrated Circuits design using open-source EDA tools and open-source PDK’s Krzysztof Herman IHP in a nutshell IHP is the European research and innovation centre for silicon-based systems, ultrahigh-frequency circuits and technologies, Unique selling point of a 200mm pilot line for state-ofthe-art BiCMOS technologies, operated under industrylike conditions, 24/7, for the provision of prototypes and low-volume production runs. Qualified technological platform with direct access for science and industry Vertical structure from material research to system architecture 350+ employees, 40+ nationalities Vision "We create foundations and prototype applications based on future silicon-based technologies and systems for a digitalized and networked world as well as for the sustainable preservation of our natural living conditions." www.ihp-microelectronics.com | © IHP all rights reserved | MOS-AK 2025 212/12/2025 130nm SiGe BiCMOS Technologies for RF Applications SG13S SG13G2 SG13G3Cu HBT ft/ fmax 250 / 340 GHz 350 / 450 GHz 470 / 650 GHz W Emitter 170 nm 130 nm 110 nm HBT BVCE0 1.7 V 1.6 V 1.5 V CMOS node 130 nm Active devices Schottky diodes, Antenna diodes, PN diodes, ESD Varactors NMOS Varactor TWIN -RELECTors Poly-Si, Thin Film Poly-Si MIM Caps 1.5 fF / µm² (Al) 2.1 fF / µm² (Cu) 1.5 fF / µm² (Al) 2.1 fF / µm² (Cu) 2.1 fF / µm² Metallization 7 Layers AL incl. 2 & 3 µm layers or *Cu: 4 + 2 (3µm) Al: 2 (3µm) 7 Layers AL incl. 2 & 3 µm layers or *Cu: 4 + 2 (3µm) Al: 2 (3µm *Cu: 4 + 2 (3µm) Al: 2 (3µm ▪SG13G2 technology was selected for the development of an open source PDK *Cu BEOL from X FAB Target are high-end technology developments, low volume market introduction, technology transfer for potential mass production in commercial fabs SG13S & SG13G2 are qualified and ready for Low Volume of high end products SG13G3Cu is early access - qualification scheduled 2025 www.ihp-microelectronics.com | © IHP all rights reserved | MOS-AK 2025 312/12/2025 What is open-source ? www.ihp-microelectronics.com | © IHP all rights reserved |MOS-AK 2025 412/12/2025 Inside the app: PowerPoint → File → Account → About PowerPoint → look for Third-Party Notices/Additional Credits. Microsoft includes a “Third-Party Software Notices and Information” page with the open-source licenses used in that build Well known and used open-source projects: Linux kernel Android OS RISC-V ISA Open source is software whose source code is publicly available under a license that lets anyone use, study, modify, and share it. Two big license families: Permissive (MIT, BSD, Apache-2.0): few restrictions; OK for closed-source forks. Copyleft (GPL, AGPL, LGPL): derivatives must remain open under similar terms Dual license –is a freqent option Red Hat (RHEL) —subscriptions, support & services around open-source Linux (acquired by IBM for ~$34B). Traditional ASIC development (academic perspective) EDA provider Existig IP blocks Foundry PDK NDA walls Designer Flexibility is wanted www.ihp-microelectronics.com | © IHP all rights reserved |MOS-AK 2025 512/12/2025 Open source silicon development cycle test cases, regression tests, benchmarks, use cases, user stories, feedback, error reports, feature requests www.ihp-microelectronics.com | © IHP all rights reserved | MOS-AK 2025 612/12/2025 Open-source EDA Tools Tools are usually task specific: simulation, layout editing, schematic capture, design checks etc. Flow is a set of tools to execute tasks in a specified order Flows are specific: analog, digital, mixed signal, RF, low power, verification etc… Flow can be parametrized Flow can be automated (TCL, Python) www.ihp-microelectronics.com | © IHP all rights reserved | MOS-AK 2025 712/12/2025 Analog/RF Open Source Design Flow: status at a glance KLayout-oriented flow Layout design Parameterizable cells Physical Verification QUCS-S, xschem ngspice, Xyce, gnucap, VACASK Openvaf, ADMS OpenEMS, ElmerFEM, AWS Palace www.ihp-microelectronics.com | © IHP all rights reserved | MOS-AK 2025 812/12/2025 12.12.2025 www.ihp-microelectronics.com | © IHP all rights reserved | MOS-AK 2025 9 Digital LibreLane based flow https://github.com/librelane/librelane Tools www.ihp-microelectronics.com | © IHP all rights reserved | MOS-AK 2025 1612/12/2025 Docker imagesJKU, IEEE UNICAS Setup own machine at the university Build your own capacities to setup and maintain the tools Experiment with coding agents to contribute Domain knowledge OpenSource repositories AI Agents IEEE UNICAS and SSCS activities www.ihp-microelectronics.com | © IHP all rights reserved | MOS-AK 2025 1712/12/2025 Low cost access to the silicon using open-source PDKs www.ihp-microelectronics.com | © IHP all rights reserved | MOS-AK 2025 1812/12/2025 ChipFoundry.io 996 USD/ sq. mm Padframe + SOC+ Board 100 x QFN RTL to GDS open source flow 4 months turn around time Not disclosed designs IHP SG13CMOS5L 1500 EUR/sq. mm 20 bare dies 4 months turn around time Wafer sharing in EU Min area 1 sq. mm. Open source –yes Not disclosed –yes (higher price) Wafer.space 350 USD/sq. mm Min area 20 sq. mm. 1000 bare dies 4 months turn around time Not disclosed designs TBD 5576 USD/sq. mm The future –Joint Evaluation –get involved! 19 Receiving your own silicon is just one milestone—it doesn’t mean the development cycle is complete. The samples/wafers from free OpenMPW will be stored at IHP Anybody can rent chips for mesurments Silicon cross validation as research good practices Verified IP can become part of an open-source design library How to organize the measurement to balance the load of the measurements lab ? How to organize the data processing ? www.ihp-microelectronics.com | © IHP all rights reserved | MOS-AK 2025 1912/12/2025 IHP –Open Test Structures 20 Test structures to characterize the process Fully open source Ducumented testfields –layout + DUT parameters Diced chips can be shared anywhere Wafer sharing in EU is an option www.ihp-microelectronics.com | © IHP all rights reserved | MOS-AK 2025 2012/12/2025 The future –European Chip Design Platform with open-source www.ihp-microelectronics.com | © IHP all rights reserved FSiC-20252112/12/2025 Chips JU initiative for SME’s (training, acceleration) Cloud based design environment with EDA tools, flows and IP’s Open source is part of the platform: Analog, RF, AMS, Digital and Photonics related tools, flows Open-source design library: open source IP’s DCT DET DETDET www.ihp-microelectronics.com | © IHP all rights reserved | MOS-AK 2025 2112/12/2025 IHP Open-source ADK Development •IHP Silicon Interposer Technology •130 nm Back-end of line (BEOL) •High-resistive silicon wafer •4 Aluminum Metallization (3/2/0.49/0.49 µm) •MIM Capacitor (TM1-M5, 1.5 fF/μm²) •TFR Resistor (TiN - TFR, M5-M4, 25 Ω/□) 12.12.2025 www.ihp-microelectronics.com | © IHP all rights reserved | MOS-AK 2025 22 Heterogenous integration CMIM TFR TM2 TM1 M5 M4 IHP internship opportunities 23 www.ihp-microelectronics.com | © IHP all rights reserved | MOS-AK 2025 2312/12/202 5 3 months paid internship (we do not cover the travel expanses), work visa, preferably early master, late undergrads students, dedicated task development (ie. RF components modeling and simulation using XSPICE and EM simulator) EDA PDK Design Measurements Data analysis Internship NlNet Project with IHP www.ihp-microelectronics.com | © IHP all rights reserved | MOS-AK 2025 How to reach us Email [email protected] GitHub issues –for reporting issues, questions discussions –for requesting features Open Source Fossi-Chat.org channel: #ihp-sg13g2 general discussions announcements 24 12/12/202 5 Acknowledgements 25 To BMFTR -> FMD-QNC (16ME0831) https://www.elektronikforschung.de/projekte/fmd-qnc To our team at IHP To all members of the open-source community who have supported and contributed our initiatives www.ihp-microelectronics.com | © IHP all rights reserved | MOS-AK 2025 2512/12/202 5