“© © 2025 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes, creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works.” Title: An 8-Channel Time-Tagger for Coincidence Measurement in Quantum Photonics Applications Authors: Mehmet Ali Uluisik∗, Mehmet Caglar Koca, Francesco Malanga, Piergiorgio Daniele, Ivan Rech, and Giulia Acconcia Affiliation: Politecnico di Milano, Piazza Leonardo da Vinci 32, 20133 Milan, Italy Corresponding Author: Mehmet Ali Uluisik (
[email protected]) DOI: 10.1109/CLEO/EUROPE-EQEC65582.2025.11110247
An 8-Channel Time-Tagger for Coincidence Measurement in Quantum Photonics Applications Mehmet Ali Uluisik ∗ , Mehmet Caglar Koca, Francesco Malanga, Piergiorgio Daniele, Ivan Rech, and Giulia Acconcia Politecnico di Milano, Piazza Leonardo da Vinci 32, 20133 Milan, Italy ∗[email protected] Precise time measurement and event correlation have gained a prominent role in a large variety of quantum photonics applications, including quantum communication, quantum simulation, and quantum computing. The increasing complexity and scale of quantum photonic systems, particularly those capable of generating, manipulating, and detecting single photons, necessitate advanced electronic timing systems that can accurately capture coincidence events across multiple channels. A highly effective approach for measuring the time of arrival of a photon, detected by single-photon detectors such as single-photon avalanche diodes (SPADs) or superconducting nanowires, is the cascading of a time-to-amplitude converter (TAC) with an analog-to-digital converter (ADC), a configuration distinguished by its high precision and linearity [1]. In this work, we present a novel 8-channel time-tagger featuring an ASIC 8-channel TAC implemented in 350-nm Si-Ge technology. The TAC architecture builds upon the parallelization of the single-channel TAC design previously introduced in [2], enabling the measurement of time intervals across four selectable full-scale range (FSR) options: 12.5 ns, 25 ns, 50 ns, and 100 ns. The acquisition chain of the time-tagging module is illustrated in Fig. 1(a). The electrical pulses generated by photodetectors (start) are processed through high-speed, low-jitter comparators before the TAC measures their arrival times relative to a reference signal (stop). These measurements are subsequently digitized by an 8-channel ADC and processed in real time by a Kintex-7 FPGA (XC7K160T), which produces absolute time-tagging of events. The resulting data is transmitted to a PC via a USB 3.0 interface, ensuring high-speed data transfer. Fig. 1(b) demonstrates the precision performance of the system, highlighting a timing jitter as low as 3.4 ps-rms with a resolution of 763 fs over the shortest FSR of 12.5 ns. Additionally, the module achieves a differential nonlinearity (DNL) as low as 1.44%-rms of the LSB. At the core of the system, the 8-channel TAC facilitates precise and linear measurements while employing resource-sharing techniques to minimize area occupation, establishing it as a scalable and robust foundation for the development of time-tagging units with an expanded number of channels. 8-channel TAC (zoomed-in) ADC Comparators FPGA USB 3.0 Stop Start External PC 0 2 4 6 8 10 12 Time Interval [ns] 0 0.2 0.4 0.6 0.8 1 Normalized Counts CH0 CH1 CH2 CH3 CH4 CH5 CH6 CH7 5.1 5.15 5.2 5.25 Time Interval [ns] 0 0.2 0.4 0.6 0.8 1 Normalized Counts CH4 CH7 (zoomed-in) (a) (b) Fig. 1 (a) Schematic of the time-tagging system featuring an 8-channel TAC. The front-end includes high-speed, low-jitter comparators, with the TAC measuring the time interval, digitized by an ADC. Data processing occurs in real-time via an FPGA, with results transferred through a USB 3.0 interface. (b) Precision performance of the system: example measurements of specific time intervals, showcasing a timing jitter as low as 3.4 ps-rms with a resolution of 763 fs over 12.5 ns FSR. References [1] J. Szyduczy ´ nski, D. Ko ´ scielnik, and M. Mi ´ skowicz, ”Time-to-Digital Conversion Techniques: A Survey of Recent Developments,” Measurement. 214, 112762, (2023). [2] G. Acconcia, F. Malanga, S. Farina, M. Ghioni, and I. Rech, ”A 1.9 ps-rms Precision Time-to-Amplitude Converter With 782 fs LSB and 0.79%-rms DNL,” IEEE Trans. Instrum. Meas. 72, 2003711 (2023). Funding: This work was supported by the European Union under Grant No. 101135876, Ministero dell’Universit ` a e della Ricerca under Grant No. 2022JRSST2 and Agenzia Spaziale Italiana under funding agreement No. 2024-5-E.0.