A modulation algorithm for inter-phase balancing in CHB Converters

1 A simple modulation algorithm for inter-phase balancing in CHB Converters Pablo Montero, and Francisco Gordillo, Member Department of Systems Engineering and Automation University of Seville, Spain Abstract—This paper presents a simple modulation algorithm which accomplishes the voltage balance across the capacitors of a Cascaded H-bridge (CHB) converter using zero voltage injection. CHB converters are widely used in renewable energy production, specially in solar plants due to its modularity. This advantage can also become a trouble when the power generated by the solar cell or consumed by a load is not equal among the three phases, leading to an unbalanced situation. A well-known technique consists in injecting a zero sequence voltage according to the power distribution. A simple modulation algorithm is presented in this paper including a mathematical proof. The proposed algorithm has been tested by simulation with a fivelevel CHB converter. At the end of the paper, a modification is introduced to improve the converter efficiency. I. INTRODUCTION MULTILEVEL converters have found a wide range of applications from power converter for renewable energy integration to electric vehicle uses as they have been growing in popularity [1]. Nowadays Several multilevel converters topologies have been presented and the number of levels it can be reached seems never ending. Generally, a multilevel converter uses several capacitors to provide differents levels of voltage. This fact lets to use power semiconductors of lower operating voltage, reducing losses and allowing a power semiconductor device to be used in a higher voltage application. However, having more than one capacitor leads to the necessity of controlling the voltage difference among them, increasing the control complexity. Because of this, a external control is usually used to balance the different voltage capacitors. Among the different multilevel converter topologies, this papers focus on the Cascaded H-bridge (CHB) converter [2]. A CHB converter is composed of a string of H-bridges, allowing every cell to set null voltage, the direct or the reverse voltage drop of the capacitor between its terminals. Due to the modularity that CHB converter offers, different string of solar panels can be connected to each H-bridge cell, being possible to reach the optimum power point individually [3]. If the number of levels of the three-phase converter is more than 3 then there are more than one H-bridge per phase, hence the unbalance issue not only appears as an inter-phase problem but also as an in-phase one. In [4] the in-phase balance is analyzed and a solution is presented for a single-phase five-level CHB converter from a power distribution perspective. There are many results in the literature which focus on how to achieve the dc-link voltage balance for the cells of different phases for a three-phase system [5]. Therefore, this paper would focus on balancing the total dc-link voltage using zero voltage injection, which can only be used in a threephase system [6], [7]. This technique consists in adding a zero voltage sequence, which has no effect on the current tracking, to the reference voltage obtained by the current control allowing to charge or discharge the capacitors on a specific phase by selecting the phase and the amplitude of it. In [8] a zero sequence voltage injection and a negative sequence voltage injection are presented together with its control scheme as a methodology to solve the unbalance. In [9] a zero sequence voltage injection is included in a phase-shift PWM and a CHB converter is tested with this modulation technique. In [10] the inphase balance is presented in an one-cycle control in addition to the tracking of the zero component calculated to correct the unbalance. In this paper, a 3-phase five-level CHB converter is analyzed under differents loads for each phase and a voltage balance algorithm is presented. The main advantage of the presented algorithm is its simplicity compared to the solutions cited previously and the guarantee it works under the conditions obtained by the mathematical proof. To evaluate the performance of the converter and the algorithm it is assumed that it is connected to a balanced symmetrical grid. In Section II, the model of the five-level converter is discussed together with the proposed balancing algorithm. Section III presents the mathematical proof resulting in the conditions under which the voltage balance is guaranteed. Afterwards, in section IV a modification in the algorithm which reduce the voltage ripple of the neutral point is presented. Section V shows the results of the simulation and the value of the simulation parameters. Finally, a conclusion about the algorithm and future work is provided. II. PROBLEM STATEMENT AND CONTROL LAW MOTIVATION In this section a five-level CHB Converter (Fig. 1) will be presented with the equations of its model. This system is composed by two H-bridge cells per phase and they are connected to the grid Uabc through an inductor L. Variables Ia, Iband Icare the phase currents which are defined positive as inputs to the converter. Inside each cell there is a capacitor denoted as Cij where i∈ {a, b, c}and j∈ {1,2}according to the phase and the position of the capacitor. Each cell has a parallel constant power load and the current through the load is named Idcij with the same criteria than the capacitors. 2 Fig. 1. A five level CHB grid-connected converter There are four switching devices in every H-bridge cell. Considering the switching-on signal of two of them complementary there are 4 possible stages, which are also depicted in Fig. 1. Thus, a five-level CHB converter yields 16 possible conmutation stages per phase which are shown in Table I. In this table the switching stages are classified according to the switching-on signals – firstly the S1and S2signal of the top cell (S1TS2T) and then, the same signals of the bottom cell (S1BS2B). Depending on the value of the Voltage output of each stage, a state number is associated to it. Within the same state several redundant stages exist, thus a substate number is associated to each of them. TABLE I SWITCHING STAGES PER PHASE OF A FIVE-LEVEL CHB CONVERTER Switching −on Signals State −Substate V oltage Output 1111 1 VCi1+VCi2 0111 21 VCi2 1011 22 1101 23 VCi1 1110 24 0101 31 0 1001 32 0110 33 1010 34 1100 35 0011 36 0100 41 −VCi2 1000 42 0010 43 −VCi1 0001 44 0000 5 −VCi1−VCi2 Considering the stages displayed and the capacitor equation: CdVCi1 dt =Ii(f1+f23 +f24 +f35 −f36 (1) −f43 −f44 −f5)−Idci1 CdVCi2 dt =Ii(f1+f21 +f22 +f36 −f35 (2) −f41 −f42 −f5)−Idci2 Where i∈ {a, b, c}and fxy is the unitary percentage of a switching cycle corresponding to the case where the two cells were in the state xand substate y. Every state (x) consists of a number of substates (y), except for the states 1and 5 which has no substate and the yannotation is not needed. The signal fxrepresents the unitary percentage of the whole xstate. According to this definition the following constraints have to be fullfilled: 4 X y=1 fxy =fx, x ∈ {2,4}; 6 X y=1 f3y=f3; 5 X x=1 fx= 1 Taking the phase average dc-link values and adding up the dc currents, the following two variables are defined: VCi =VCi1+VCi2 2(3) Idci =Idci1+Idci2(4) where i∈ {a, b, c}. Adding (1) and (2) and using (3) and (4) yields: CdVCi dt =Ii 2(2f1+f2−f4−2f5)−Idci 2(5) where (2f1+f2−f4−2f5)is equal to the output waveform mi∈[−2,2], which is set by the current control. With this definition, eq. (5) can be written as: CdVCi dt =Iimi 2−Idci 2(6) To characterize the interphase issue two error signals has to be defined: Vd1=Vdc −VCa (7) Vd2=Vdc −VCb (8) where Vdc =VCa+VCb+VCc 3. Thus, derivating (7) and (8) and combining them with (6) yields: CdVd1 dt =1 6(−2Iama+Ibmb+Icmc+γ1)(9) CdVd2 dt =1 6(Iama−2Ibmb+Icmc+γ2)(10) where γ1is equal to 2Idca −Idcb −Idcc and γ2is equal to −Idca + 2Idcb −Idcc. By adding a new component xto the signals ma, mband mcin (9)-(10) and considering Ia+Ib+ Ic= 0 results in: ˙ Vd1=1 6C(−2Iama+Ibmb+Icmc+γ1−3Iax)(11) ˙ Vd2=1 6C(Iama−2Ibmb+Icmc+γ2−3Ibx)(12) The addition of this new signal xequals a zero component injection given the fact that the value is the same for the three phases. To determine what is the value of xthat reduces the error signals Vd1and Vd2, a Lyapunov function candidate is defined: W=|Vd1|+|Vd2|(13) The target is to reduce the value of Was much as possible, which equals to make ˙ Wthe most negative value achievable. Special attention should be paid to (13) as it is not differentiable around Vd1= 0 and Vd2= 0. Thus, differentiating (13) assuming constants signs: ˙ W=sign(Vd1)˙ Vd1+sign(Vd2)˙ Vd2(14) 3 ˙ W·6C=sign(Vd1)(−2Iama+Ibmb+Icmc+γ1) + sign(Vd2)(Iama−2Ibmb+Icmc+γ2)−3x(sign(Vd1)Ia+sign(Vd2)Ib) (15) Combining (11) and (12) into (14), (15) is obtained. In order to avoid overmodulation, the highest and lowest value achievable for xis limited by (mi+x)∈[−2,2]. Inspired by the last term of (15) and considering this limitation, the resulting algorithm would conclude as: if (sign(Vd1)Ia+sign(Vd2)Ib)≤0 then x=−2−min(ma, mb, mc)(16) else x= 2 −max(ma, mb, mc) This algorithm can be used in any control methods which involves the output waveform (mi) computation. Once miis computed as usual, the xvalue is calculated using (16) and added afterwards. The algorithm (16) relies on its simplicity as no further computation is required. III. MAIN RESULT Theorem 1. Consider the voltage differences dynamics (11)- (12) with the output waveforms given by the current control and the value of xgiven by (16). If 0.26Pt< Pc<0.406Pt and Pt(0.874 −2p)< Pc< Pt(1.1261 −2p)– where Ptis equal to the system input power; Pa, Pband Pcis equal to the power demanded by the phase a, b and crespectively; and p=Pb Pt– then, the voltage differences Vd1and Vd2tend to band around zero. Proof. it will be proved that ∆Wis always negative when evaluated at the grid frequency rate. This statement is only valid when the absolute values of the error signals at the beginning of the evaluated grid period is high enough to prevent them from changing their sign for the whole grid period. A. Assumptions To begin with, it is assumed that the total voltage and current controllers have reached the steady state, thus the input power is equal to the load demand and the currents and output waveform signals are senoidals. It is also assumed that there is no exchange of reactive power between the grid and the system. The balance of the cells in the same phase is not the aim of this paper, so the loads of each cell within the same phase are assumed equal. Ia=Acos(wt)ma=Vref VCa cos(wt −φ) Ib=Acos(wt −2π 3)mb=Vref VCb cos(wt −2π 3−φ) Ic=Acos(wt +2π 3)mc=Vref VCc cos(wt +2π 3−φ)(17) Where Ais the current amplitude, Vref is the amplitude of the reference voltage and φis the constant phase angle difference between the output waveform and the grid voltage. From now on, Vrefa=Vref cos(wt −φ),Vrefb= Vref cos(wt −2π 3−φ)and Vrefc=Vref cos(wt +2π 3−φ). It is also assumed that the loads absorb a constant amount of power (18). Idca =Pa VCa ;Idcb =Pb VCb ;Idcc =Pc VCc (18) B. Case analysis Four possible cases are obtained when assuming a constant sign of the error signals. By introducing (17) and integrating the possible cases in (15) over a grid period, four inequalities are obtained: (19) and (20); which have to be accomplished in order to succeed in proving the good behaviour of the algorithm. To summarize, two integrals – Hfor the left side of the inequality and F(x)for the right side of the inequality – have to be evaluated for each case. ZT 0 Hdωt < ZT 0 F(x)dωt (21) 1) Lower bound for F:In this subsection, a lower bound for Fis found in order to consider the worst scenario for the achievement of (21). Considering the behaviour of xaccording to the sign of the error signals and the current expressions, the minimum value of the integral can be calculated, proportional to A, depending on the value of φ. The evaluation of the two cases of RT 0F(x)dωt in (19) and also in (20) results in the same value due to the bahaviour of x. Finally, evaluating RT 0F(x)dωt with every possible value of φ, Fig. 2 is obtained. Hence, the lowest value are directly read from it. For the two cases of (19) these values correspond to (22) and for the two cases of (20) these values correspond to (23): ZT 0±3x(Ia+Ib)dωt > 4.11A(22) ZT 0±3x(Ia−Ib)dωt > 7.13A(23) 2) Upper bond for H:In order to compute an upper bound for RT 0Hdωt some aproximations will be made, always from a conservative view. Taking into account that the input power is equal to the power demanded by all the loads, it is evident that the signs of the error signals show if the power demanded by a phase (a, b or c) is over or under the third part of the incoming power. For example, consider the case Vd1>0and Vd2= 0, this would mean that VCa is under the average level (Vdc) while VCb is equal to the average level and thus VCc is over the average level. As the output waveform signals mifor i={a, b, c, }are equal but out of phase –similar to the phase currents– the 4 Vd1≷0; Vd2≷0 : ZT 0±1 VCa (Pa−IaVrefa)±1 VCb (Pb−IbVrefb)±2 VCc (−Pc+IcVrefc)dωt < ZT 0±3x(Ia+Ib)dωt (19) Vd1≷0; Vd2≶0 : ZT 0±3 VCa (Pa−IaVrefa)±3 VCb (IbVrefb−Pb)dωt < ZT 0±3x(Ia−Ib)dωt (20) Fig. 2. Values for both groups of RT 0F(x)depending on the value of φ power supplied to each phase is equal among them, hence RT 0IiVrefidωt =Pt/3for i∈ {a, b, c}. If the loads of a phase demands a different amount of power then its average capacitor voltage level (VCi) would change, increasing in the case of demanding less power or decreasing in the case of demanding more power. Therefore, in the case exemplified, the phase aload is demanding more power than the third part of the incoming power while the phase c load is demanding less power. By applying the same logic with the four possible cases of error signals signs, Table II is obtained. When the error signal TABLE II RELATION BETWEEN THE THIRD PART OF THE INPUT POWER AND THE POWER DEMANDED BY THE LOADS OF EACH PHASE,DETERMINED BY THE SIGNS OF THE ERROR SIGNALS Vd1Vd2PaPbPc >0>0> > < >0<0> < <0>0< > <0<0< < > signs are different, the power demanded by phase ccan not be determined only by the signs but it is not necessary as it does not appear in (20). The conclusion is that the upper bound of RT 0Hdωt can be obtained maximizing all the terms that appear in it, since they are all positive under its own case. In order to bound them, it is considered that the average capacitor voltage level of each phase can not underpass a minimum level of voltage as a conservative measure; since they appear in the denominator of (19) and (20). This value is equal to that which allows to modulate a whole grid wave without overmodulating. Denoting the RMS voltage value of the grid as VRMS g, the minimum value allowed will be VCimin =VRMS g/√2. By equalling this value to VCa, VCb and VCc into (19) and (20): Vd1≷0; Vd2≷0 : ZT 0±1 VCimin (Pa+Pb−2Pc)dωt (24) Vd1≷0; Vd2≶0 : ZT 0±3 VCimin (Pa−Pb)dωt (25) Applying the definition of the total power Pt=Pa+Pb+Pc to (24) and the variable p=Pt/Pbto (25): Vd1≷0; Vd2≷0 : ±2π VCimin (Pt−3Pc)(26) Vd1≷0; Vd2≶0 : ±6π VCimin (Pt(1 −2p)−Pc)(27) 3) Comparision between integrals: By comparing the values of the integrals obtained: (26) with (22), (27) with (23); and using the definition of power in an AC System where there is no reactive power involved Pt= 3 A √2VRMS g, which equals to AVCimin =Pt 3, the restrictions for each case are obtained: Vd1>0; Vd2>0 : Pc>0.26Pt Vd1>0; Vd2<0 : Pc> Pt(0.874 −2p) Vd1<0; Vd2>0 : Pc< Pt(1.1261 −2p) Vd1<0; Vd2<0 : Pc<0.406Pt These restrictions result in a power region depicted in Fig. 3 where the algorithm is capable of correcting the unbalance. Fig. 3. Power region where the algorithm has been proven mathematically IV. IMPROVING THE NEUTRAL POINT VOLTAGE RIPPLE In order to improve the system efficiency in a solar system, the voltage ripple of the neutral point (depicted as N in Fig. 1) has to be reduced. A current leakage exists between the neutral point and the ground that might be modelled as a capacitor, thus the bigger the voltage ripple is the greater the losses are. 5 The previous algorithm always applies the maximum absolute value for x, thus in steady state, where the error signals signs may change within a switching period, xcan be switched from his maximum value to his minimum value from a switching instant to the next one. This would lead to a high ripple of the voltage drop between the neutral point and the ground (VNn). In order to reduce it, the switching has to be smoother by restricting the algorithm behaviour. A new variable Kxis defined for this porpuse, whose aim is to reduce the value of the xapplied. The variable Kxwould multiply xand its value would be reduced progressively by a proportional control as the Lyapunov function (W) gets closer to the steady state: x0=Kx·x Kx=sat(Kp(W−f W)) Kx∈[0,1] (28) where ‘sat’ is the standard saturation between zero and one, x0is the new applicable value of x,Kpis the control parameter of the proportional control, Wis the value of the Lyapunov function defined in (13) and f Wis the reference that the modified algorithm will make the Lyapunov function to reach in the steady state. The modified algorithm would no longer try to reach the zero value of the Lyapunov function but the value indicated by f W. Whenever the value of Kxis equal to 1, the modified algorithm behaviour is identical to the original one, thus the signals error would be reduced provided that the system conditions are inside the power region. The value of Kxstarts declining when Wreach a specific value (Wband) given by: Kp(Wband −f W) = 1 →Wband =1 Kp +f W Therefore, the modified algorithm will make Wto be below Wband, since the original algorithm is applied when Wis over Wband. V. SIMULATION RESULTS The parameters of the simulation are shown in the table III. Notice that the power of each phase are out of the power region, which means that the algorithm is able to work in an extended region in a real application and the region depicted in Fig. 3 is a conservative result. TABLE III SIMULATION PARAMETERS Parameter Value Vdcref 300 V Pa7000 W Pb5000 W Pc8000 W L3.3mH Vg220 Vrms Cdclink 2000 µf The Fig. 4 shows the diagram block of the implemented control. It consists in a voltage controller, which provide a reference power (Pref ) from the desired dc-link voltage ( ˜ Vdc) and the average dc-link voltage (Vdc), that is transformed into the reference currents in dq axis (˜ Idand ˜ Iq). This references are compared with the real ones in the current control scheme, resulting in two voltage references ( ˜ Vdand ˜ Vq), that are backtransformed to abc axis (Vrefa,Vrefband Vrefc) and divided by the average dc-link voltage of his phase branch (VCa,VCb and VCc) to obtain the output waveforms (ma,mband mc). Next, (16) is applied and the modified output waveforms are obtained (m0 a,m0 band m0 c). The signals ωand ωt are the grid frequency (rad/s) and the grid angle (rad) respectively. Qref is set to 0. This control is deeper explained in [11]. Fig. 4. Block diagram of the control used The sequence this simulation follows starts with a preload stage with no loads. After it, the voltage and current controls are activated, although the value of xis set to zero and no loads are still connected. At t= 0.35 sthe constant power loads are activated and at t= 0.4sthe balancing algorithm is activated. In Fig. 5 the evolution of the DC voltages of each phase are depicted along with the error signals Vd1and Vd2for both the original and the modified algorithm. It can be seen that there is a tendency to unbalance the capacitors from the moment the loads are activated (t= 0.35 s). This tendency is supressed and corrected from the moment the algorithm is activated (t= 0.5s). In the modified algorithm simulation, the parameter f Wis equal to 35 and Kp= 0.1. As can be seen in Fig. 6, the inclusion of the algorithm does not take a remarkable effect on the reference currents tracking. In Fig. 7 the ripple of the voltage VNn is compared in both cases through a Fourier analysis. It can be seen a considerable harmonics reduction with the modified algorithm. VI. CONCLUSION The algorithm presented in this paper is a new and a very simple way of using the zero current injection to balance the capacitors in a CHB converter. A modification is introduced in order to make it more appealing to Solar system integration. Despite of making the mathematical analysis for power 6 Fig. 5. (a) Signals VCa,VCb and VCc with the original algorithm; (b) Error signals Vd1and Vd2with the original algorithm; (c) Signals VCa,VCb and VCc with the modified algorithm; (d) Error signals Vd1and Vd2with the modified algorithm Fig. 6. Evolution of the phase currents in simulation consuming loads, the analysis can be replicated with power generating loads like solar panels. As future work, a conmutation reduction could be considered given the fact that this algorithm is focused on balancing the capacitors. This strategy opens a window to new performance-improving strategies along with a basic solution to the unbalance issue of CHB converters that could leads to more complex, more sophisticated algorithm taking advantage Fig. 7. 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