Mitigation of Power Losses and Enhancement in Voltage Profile by Optimal Placement of Capacitor Banks With Particle Swarm Optimization in Radial Distribution Networks

POWER ENGINEERING AND ELECTRICAL ENGINEERING VOLUME: 20 |NUMBER: 4 |2022 |DECEMBER Mitigation of Power Losses and Enhancement in Voltage Profile by Optimal Placement of Capacitor Banks With Particle Swarm Optimization in Radial Distribution Networks Muhammad Fawad SHAIKH , Abdul Majeed SHAIKH , Shoaib Ahmed SHAIKH , Raheel NADEEM , Abdul Moiz SHAIKH , Arif Ali KHOKHAR Department of electrical Engineering, Sukkur IBA University, Nisar Ahmed Siddiqui Road, 65200 Sukkur, Pakistan muhammadfaw[email protected], abdulma[email protected], [email protected], [email protected], ab[email protected], [email protected] DOI: 10.15598/aeee.v20i4.4615 Article history: Received Jun 30, 2022; Revised Sep 01, 2022; Accepted Sep 28, 2022; Published Dec 31, 2022. This is an open access article under the BY-CC license. Abstract. The prime purpose of placing a capacitor bank in a power system is to provide reactive power, reduce power losses, and enhances voltage profile. The main challenge is to determine the optimum capacitor position and size that reduces both system power losses and the overall cost of the system with rigid constraints. For this purpose, different optimization techniques are used, for example Particle Swarm Optimization (PSO) which converges the complex non-linear problem in a systematic and methodological way to find the best optimal solution. In this paper, the standard IEEE 33-bus and 69-bus systems are used to find the optimum location and size of the capacitors bank. These power networks are simulated in Siemens PSS®E software. For the optimum solution of capacitor banks, the PSO algorithm is used. The PSO fitness function is modelled in such a way which contains the high average bus voltage, the small size of capacitor banks, and low power losses. The fitness function used is a weighted type to reduce the computation time and multi-objective function complexity. Keywords Capacitor bank, optimal placement, power losses, voltage profile and cost function. 1. Introduction The global ongoing high penetration of Distributed Generation (DG) units within electrical power networks seem to be a consequence of the deregulation of energy markets, the reduction of pollutants, and scientific advancement. The DGs were installed mostly in distribution systems in an ill-advised and unmanaged manner over the last 20 years, providing severe concerns and hurdles. These issues include the necessity of bidirectional power flow throughout modern networks since they are opposed to unidirectional power flow from larger to reduced voltages, including the critical issues of voltage decline with power losses [1], [2] and [3]. The reduction of hazardous pollutants and unlimited fundamental electricity resources seem to be the fundamental benefits of employing renewable distributed generation sources. Unfortunately, the key drawbacks are limited performance, large expenses, and unpredictability [4] and [5]. Since the number of DGs throughout the distributing network enhances, this really remains everyone’s best desire to deploy resources in the most efficient manner possible to maximize stability, eliminate unnecessary losses, and improve the voltage profile, thus maintaining the fundamental objective of electricity injection. Nevertheless, power losses have become one of the issues that distributed systems are coping with. ©2022 ADVANCES IN ELECTRICAL AND ELECTRONIC ENGINEERING 505 POWER ENGINEERING AND ELECTRICAL ENGINEERING VOLUME: 20 |NUMBER: 4 |2022 |DECEMBER According to research from earlier articles, distribution losses account for 13 % to 18 % of the overall power produced [6]. Spontaneous energy losses mostly comprise of power losses inside transformer and line elements of electrical systems. Such losses, which primarily result from current passing across various types of system equipment, are inversely linked with element resistance and indeed the square of the current passing across them. The active as well as reactive elements of the current define its intensity; lowering the reactive component while keeping the active component unchanged seems to be an efficient strategy to decrease power losses [7]. Additionally, this really seems significant to note that lower power factor values result in a decrease in systems performance, and increased losses which ultimately yield a decrease in voltage, hence high operating expenses [8]. The issue of where to deploy capacitors inside the distributed network is one that research scholars are always trying to address. The ideal arrangement of capacitors remains a challenging stochastic optimizing issue [9]. The best location of the capacitors is already suggested by a number of optimized approaches and different algorithms [10]. The 2 3rule, which was used to deploy capacitors while maintaining a balanced load upon that distribution feeder, may be the first methodology for doing this. However, it has several serious flaws, including the fact that it takes a long period and therefore seems impractical for complex systems [11] and [12]. For the purpose of loss minimization, authors in [13] have presented a parallel Tabu Search method. A graph-based technique was put into use by authors in [14]. They determine where permanent and variable capacitors should be placed inside the radial distribution systems. Authors in [15] also suggested the arrangement of the capacitors for such conservative voltage reductions over the distribution feeders. The traditional Index Vectors dependent technique for the best capacitor bank placements in the distribution system was presented by authors in [16]. Authors in [17] proposed the branch and bound strategy regarding the best arrangement of capacitor banks. Authors in [18] proposed a Fuzzy-Genetic Algorithm for the ideal position of capacitors within radial distributing systems. A Heuristic Constructive Approach was recommended by authors in [19] for the installation of the capacitors within the distribution network. Authors in [20] have designed a model for minimizing the cost of the distributed network. Authors in [21] have used the ant colony optimization strategy, to reduce overall real power losses. Arrangement of capacitors across imbalanced distributed systems becomes the focus of the researchers in [22]. The voltage stability index is being used to choose the extremely sensitive bus for optimal placement of capacitors. The paper [23] investigates a comparative analysis of power networks with and without power compensating devices like capacitors. A strategy for choosing the best location and size for capacitors on a radial distributing network has been presented in [24]. The efficiency was shown using a conventional IEEE 33-bus system. Through the support of a previously developed sperm whale technique, the authors in [25] propose an enhanced approach for loss minimization throughout medium voltage distributing systems employing optimum capacitors arrangement. Researchers in [26] report somewhat upon optimum capacitors installation and proper sizing of the shunt capacitors in a distributed network which has undergone significant distortion. Essentially in [27], a different technique is utilized that itself decides the groups of buses for location; the sizes as well as the eventual ideal state of an individual particle have been picked once a comprehensive search was carried out in the measuring region. In order to narrow down the issues for the best buses which need to have shunt capacitors placed, a novel method for addressing the optimum shunt capacitor installation and scaling challenge across the radial distributed system has been introduced [28]. According to [29], proper capacitors’ location and sizing reduce overall power losses of both distribution networks. The consistency of simulation has been tested on a 33 kV radial distributed network. simulated results are then applied to a 0.4 kV 26 bus distributed system. Findings have been examined, including power losses with voltage stability. Employing the genetic algorithm in the ETAP software, various simulated results are optimized with different capacitor locations for mitigating the power losses and enhancing the voltage profiles. Actual and fictitious power load conditions affect the voltage profiles and power losses within the distributed networks. Besides strategically placing capacitors, this could be successfully handled via the regulated actual as well as reactive power flow [30]. Due to this, experts have developed a number of methods that might be applied while significantly altering the current structure, including the Network Reconfiguration (NR) procedure, inserting capacitors, and adding Distributed Energy resources. Adaptive Particle Swarm Optimization successfully addresses the issue of current Distributed generation and Capacitor bank allocation within a radial distributed network to improve voltages and minimize power losses. Depending upon the particle’s optimum performance from the preceding iteration, the inertial Weighted formula (W) inside the velocity updated equation has been swapped out to modify the traditional PSO [31] and [32]. ©2022 ADVANCES IN ELECTRICAL AND ELECTRONIC ENGINEERING 506 POWER ENGINEERING AND ELECTRICAL ENGINEERING VOLUME: 20 |NUMBER: 4 |2022 |DECEMBER Considering IEEE 33-bus system, the researchers have used various approaches such as Spring Search Algorithm (SSA), Crow Search Algorithm (CSA), Bacterial Foraging Optimization Algorithm (BFOA), Particle Swarm Optimization (PSO) for optimal sizing of capacitors and mitigation of power losses and improve voltage profile [33], [34], [35] and [36]. The optimal power loss achieved with BFOA is 144.04 kW and the sizes of capacitor banks placed at bus no. 18, 30 and 33 is 0.349, 0.821 and 0.277 MVAr. The minimum voltage achieved is 0.936 [33]. Meanwhile, CSA produces 131.5 kW with capacitor banks having values of 0.6, 0.3,0.45 and 0.6 MVAr at bus no. 11, 33, 24 and 30 respectively. The minimum voltage achieved is 0.943 [34]. Adding further, PSO yields 132.48 kW power losses and minimum voltage is 0.945. The size of capacitor banks placed at bus no. 2, 7, 31, 15 and 29 is 0.9, 0.45,0.45, 0.3 and 0.45 MVAr consecutively [35]. Spring search algorithm delivers 130.912 kW power losses with 0.951 as minimum voltage. The capacitor placement is at bus no. 14, 24, 30 with 0.3973, 0.4511 and 1.0 MVAr ratings respectively [36]. In this paper, the optimal power losses value for IEEE 33-bus system is achieved and that is 130 kW and minimum voltage is 0.99. Apart of this, the capacitor size placed at bus no. 3, 13 and 14 is 500 kvar. This signifies that lower power losses and improved voltage profile with smaller size of capacitor bank is achieved. Similarly, analysis is also carried out for IEEE 69-bus system. In this paper, the optimal location for the placement of capacitors is found where the power losses for IEEE 33-bus system and IEEE 69-bus system reach minimum. Further, the PSO Technique is implemented on IEEE 33-bus system and IEEE 69-bus system to find out minimum cost function and optimal location of capacitors for IEEE 33 and IEEE 69 in a very efficient and cost-effective way. This paper is organized into four sections. The introduction is explained in detail in Sec. 1. , methodology and the details of assumed systems are provided in Sec. 2. , results are represented in Sec. 3. and in the end Sec. 4. concludes this research study. 2. Methodology In this paper, IEEE 33-bus and 69-bus system in a radial distribution system is assumed for analyzing the voltage profile and power losses by placing the capacitors with different ratings at different locations. For this analysis, two strategies have been adopted and these are the hit and trial method (without any algorithm), and the PSO algorithm. The analysis is made by using Power System Simulator for Engineering (PSS®E) software and MATLAB/Simulink software for the optimal placement and sizing of capacitors using both techniques. The standard systems IEEE 33bus and 69-bus system are shown in Fig. 1 and Fig. 2, respectively. The bus data and line data used for these standard systems are mentioned in Tab. 1, Tab. 2, Tab. 3 and Tab. 4 [37]. 23 24 25 26 27 28 29 30 31 32 33 1 2 3 4 5 6 Substation 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 Fig. 1: SLD for IEEE 33-bus system [37]. 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 53 54 55 56 57 58 59 60 61 62 63 64 65 1 2 3 45 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 S/S 52 51 67 66 68 69 28 29 30 31 32 33 34 35 Fig. 2: SL diagram of IEEE 69-bus system [37]. Tab. 1: Bus data IEEE 33-bus system. Bus Bus Voltage PGen PLoad QLoad no. type profile (MW) (MW) (MVAR) (PU) 1 Swing 1.06 3.843934 0.1 0.06 2 Load 1.0577 0 0.09 0.04 3 Load 1.0473 0 0.12 0.08 4 Load 1.0424 0 0.06 0.03 5 Load 1.0376 0 0.06 0.02 6 Load 1.0282 0 0.2 0.1 7 Load 1.0273 0 0.2 0.1 8 Load 1.0195 0 0.06 0.02 9 Load 1.0165 0 0.06 0.02 10 Load 1.0139 0 0.045 0.03 11 Load 1.0134 0 0.06 0.035 12 Load 1.0125 0 0.06 0.035 13 Load 1.0113 0 0.12 0.08 14 Load 1.0092 0 0.06 0.01 15 Load 1.0079 0 0.06 0.02 16 Load 1.0067 0 0.06 0.02 17 Load 1.0048 0 0.09 0.04 18 Load 1.0043 0 0.09 0.04 19 Load 1.0572 0 0.09 0.04 20 Load 1.0539 0 0.09 0.04 21 Load 1.0532 0 0.09 0.04 22 Load 1.0526 0 0.09 0.05 23 Load 1.044 0 0.42 0.2 24 Load 1.0377 0 0.42 0.2 25 Load 1.0344 0 0.06 0.025 26 Load 1.0272 0 0.06 0.025 27 Load 1.0259 0 0.06 0.02 28 Load 1.0184 0 0.12 0.07 29 Load 1.0131 0 0.2 0.6 30 Load 1.0107 0 0.15 0.07 31 Load 1.0099 0 0.21 0.1 32 Load 1.0091 0 0.06 0.04 33 Load 1.0088 0 0.1 0.06 ©2022 ADVANCES IN ELECTRICAL AND ELECTRONIC ENGINEERING 507 POWER ENGINEERING AND ELECTRICAL ENGINEERING VOLUME: 20 |NUMBER: 4 |2022 |DECEMBER Tab. 2: Line data IEEE 33-bus system. From bus To bus R (PU) X (PU) 1 2 0.057526 0.029449 2 3 0.307595 0.156668 2 19 0.102324 0.097644 3 4 0.228357 0.1163 3 23 0.281515 0.192356 4 5 0.237778 0.121104 5 6 0.510995 0.441115 6 7 0.116799 0.386085 6 26 0.126657 0.064514 7 8 1.067786 0.77061 8 9 0.642643 0.461705 9 10 0.651378 0.461705 10 11 0.122664 0.040555 11 12 0.233598 0.077242 12 13 0.915922 0.720634 13 14 0.337918 0.444796 14 15 0.36874 0.328185 15 16 0.465635 0.340039 16 17 0.80424 1.073775 17 18 0.456713 0.358133 19 20 0.938508 0.845668 20 21 0.255497 0.298486 21 22 0.442301 0.584805 23 24 0.559037 0.442425 24 25 0.61519 0.437434 26 27 0.17732 0.090282 27 28 0.660737 0.582559 28 29 0.501761 0.437122 29 30 0.316642 0.161285 30 31 0.607953 0.60084 31 32 0.193729 0.225799 32 33 0.212758 0.330805 The detailed workflow of this research is depicted in steps as follows. Steps: 1. Designing IEEE 33-bus and 69-bus systems on PSS®E and MATLAB/Simulink software and performing load flow analysis. 2. Implementation of hit and trial method to calculate voltage profile for IEEE 33-bus and 69-bus system. 3. Comparative analysis of Voltage profile for IEEE 33-bus system and 69-bus system. 4. Calculation of power losses with hit and trial method at different locations having different capacitor sizes. 5. Comparative analysis of power losses with and without capacitors for IEEE 33-bus and 69-bus systems. 6. Implementation of PSO to calculate cost function for capacitors having same capacitors, different swarm at different iterations for IEEE 33-bus system. 7. Finding the optimal location of capacitors with the same number, different swarm at different iterations with PSO. 8. Repeat steps 6 and 7 for IEEE 69-bus system. Tab. 3: Bus data IEEE 69-bus system. Bus Bus Voltage PGen PLoad QLoad no. type profile (MW) (MW) (MVAR) (PU) 1 Swing 1.0000 3.974315 0.0026 0.0022 2 Load 1.0000 0 0.0404 0.0300 3 Load 1.0000 0 0.0750 0.0540 4 Load 1.0000 0 0.0300 0.0220 5 Load 0.9997 0 0.0280 0.0190 6 Load 0.9945 0 0.1450 0.1040 7 Load 0.9891 0 0.1450 0.1040 8 Load 0.9879 0 0.0080 0.0050 9 Load 0.9872 0 0.0080 0.0055 10 Load 0.9849 0 0.0455 0.0300 11 Load 0.9844 0 0.0600 0.0350 12 Load 0.9825 0 0.0600 0.0350 13 Load 0.9796 0 0.0010 0.0006 14 Load 0.9768 0 0.1140 0.0810 15 Load 0.9740 0 0.0050 0.0035 16 Load 0.9734 0 0.0280 0.0200 17 Load 0.9726 0 0.0140 0.0100 18 Load 0.9726 0 0.0140 0.0100 19 Load 0.9721 0 0.0260 0.0186 20 Load 0.9718 0 0.0260 0.0186 21 Load 0.9714 0 0.0140 0.0100 22 Load 0.9714 0 0.0195 0.0140 23 Load 0.9713 0 0.0060 0.0040 24 Load 0.9711 0 0.0260 0.0186 25 Load 0.9710 0 0.0260 0.0186 26 Load 0.9709 0 0.0000 0.0000 27 Load 0.9709 0 0.0240 0.0170 28 Load 1.0000 0 0.0240 0.0170 29 Load 0.9999 0 0.0012 0.0010 30 Load 0.9998 0 0.0000 0.0000 31 Load 0.9998 0 0.0060 0.0043 32 Load 0.9997 0 0.0000 0.0000 33 Load 0.9994 0 0.0392 0.0263 34 Load 0.9991 0 0.0392 0.0263 35 Load 0.9990 0 0.0000 0.0000 36 Load 1.0000 0 0.0790 0.0564 37 Load 0.9998 0 0.3847 0.2745 38 Load 0.9996 0 0.3847 0.2745 39 Load 0.9996 0 0.0405 0.0283 40 Load 0.9996 0 0.0036 0.0027 41 Load 0.9989 0 0.0043 0.0035 42 Load 0.9986 0 0.0264 0.0190 43 Load 0.9986 0 0.0240 0.0172 44 Load 0.9986 0 0.1000 0.0720 45 Load 0.9985 0 1.2440 0.8880 46 Load 0.9985 0 0.0320 0.0230 47 Load 1.0000 0 0.0000 0.0000 48 Load 0.9996 0 0.2270 0.1620 49 Load 0.9989 0 0.0590 0.0420 50 Load 0.9992 0 0.0180 0.0130 51 Load 0.9878 0 0.0180 0.0130 52 Load 0.9878 0 0.0280 0.0200 53 Load 0.9854 0 0.0280 0.0200 54 Load 0.9832 0 0.0027 0.0300 55 Load 0.9802 0 0.0026 0.0022 56 Load 0.9773 0 0.0404 0.0300 57 Load 0.9581 0 0.0750 0.0540 58 Load 0.9486 0 0.0300 0.0220 59 Load 0.9449 0 0.0280 0.0190 60 Load 0.9406 0 0.1450 0.1040 61 Load 0.9334 0 0.1450 0.1040 62 Load 0.9331 0 0.0080 0.0050 63 Load 0.9327 0 0.0080 0.0055 64 Load 0.9309 0 0.0455 0.0300 65 Load 0.9303 0 0.0600 0.0350 66 Load 0.9847 0 0.0600 0.0350 67 Load 0.9847 0 0.0010 0.0006 68 Load 0.9833 0 0.1140 0.0810 69 Load 0.9833 0 0.0050 0.0035 The hit and trial method requires complete human interaction. All commands are being given manually. After that, the size and place of the capacitor bank ©2022 ADVANCES IN ELECTRICAL AND ELECTRONIC ENGINEERING 508 POWER ENGINEERING AND ELECTRICAL ENGINEERING VOLUME: 20 |NUMBER: 4 |2022 |DECEMBER Tab. 4: Line data IEEE 69-bus system. From bus To bus R (PU) X (PU) 1 2 0.000310 0.000744 2 3 0.000310 0.000744 3 4 0.000930 0.002232 3 28 0.002728 0.006696 3 36 0.002728 0.006696 4 5 0.015560 0.018228 4 47 0.002108 0.005208 5 6 0.226920 0.115568 6 7 0.236220 0.120340 7 8 0.057160 0.029140 8 9 0.030560 0.015560 8 51 0.057530 0.029326 9 10 0.507780 0.167830 9 53 0.107880 0.054932 10 11 0.116060 0.038370 11 12 0.441060 0.145760 11 66 0.124744 0.037882 12 13 0.638600 0.210800 12 68 0.458428 0.151528 13 14 0.647280 0.213900 14 15 0.655960 0.216750 15 16 0.121890 0.040300 16 17 0.232120 0.076750 17 18 0.002914 0.000992 18 19 0.203110 0.067150 19 20 0.130570 0.042780 20 21 0.211790 0.069900 21 22 0.008680 0.002852 22 23 0.098640 0.032610 23 24 0.214710 0.070990 24 25 0.464250 0.153450 25 26 0.191590 0.063300 26 27 0.107380 0.035460 28 29 0.039680 0.097030 29 30 0.246630 0.081530 30 31 0.043520 0.014380 31 32 0.217600 0.071920 32 33 0.520180 0.174592 33 34 1.058960 0.350050 34 35 0.913880 0.302120 36 37 0.039680 0.097030 37 38 0.065286 0.076260 38 39 0.018840 0.022010 39 40 0.001116 0.001302 40 41 0.451546 0.527550 41 42 0.192200 0.224620 42 43 0.025420 0.029636 43 44 0.005704 0.007192 44 45 0.067518 0.085120 45 46 0.000558 0.000744 47 48 0.052760 0.129140 48 49 0.179670 0.439640 49 50 0.050960 0.124680 51 52 0.205770 0.069068 53 54 0.125860 0.064108 54 55 0.176204 0.089714 55 56 0.174406 0.088846 56 57 0.985800 0.330890 57 58 0.485894 0.163060 58 59 0.188604 0.062372 59 60 0.239380 0.072660 60 61 0.314650 0.160270 61 62 0.060388 0.030752 62 63 0.089900 0.045756 63 64 0.440510 0.224378 64 65 0.645421 0.328724 66 67 0.002914 0.000868 68 69 0.002914 0.000992 are decided where it must be placed into the system. Since this method involves manual human interaction as capacitor banks locations and their sizes are totally dependent on human desire like any random numbers. This may be considered as one of the major drawbacks of this method because these random numbers do not always provide the optimum location and size of capacitor banks. In this study, for IEEE 33-bus and 69-bus systems, capacitors are placed randomly and system voltages and power losses are analyzed. In this method, some losses of the system decreased from the nominal losses. PSO is a population-based stochastic optimization technique inspired by the intelligent collective behavior of some animals, such as bird flocks or fish schools. To get results in PSO we utilize results from the hit and trial method. In order to enhance the system more efficiently these previous results of the hit and trial method play a vital role in deciding the output of the PSO algorithm. The losses and buses number that we have obtained in the hit and trial method is also used in PSO programming using MATLAB/Simulink, PSO updates those losses and buses and gives us new and specified the best location of the capacitors banks to be installed in the system after several iterations. 3. Results and Discussion 3.1. IEEE 33-bus and 69-bus System Voltage Profile with Hit and Trial Method The behaviour of the Per Unit (PU) voltages at different buses with and without capacitor placement having different ratings has been discussed in detail in Fig. 4. The nominal voltages of the IEEE 33-bus system (radial distribution system) are mentioned in Fig. 4(a). These are the PU voltages without the placement of the capacitor into the system. It clearly signifies that the voltages at receiving end are less than the voltages at sending end because the load is connected at the far end buses. Since the load is inductive into the system so reactive power starts to flow and as a result, voltages are reduced at receiving. This is also evident from Fig. 4(a) that voltages at sending end are 1.06 PU while at receiving end these are almost 1 PU. Another important thing to remember is that the power factor of the system also reduces which ultimately enhances the power losses in the radial distribution network. With the hit and trial method, random placement of capacitors at different buses with different ratings has been initiated and this is shown in Fig. 4. It is clear from Fig. 4(b) that when a capacitor of 600 kvar is placed randomly at bus no. 3, 13, 14 the some of the PU voltages are enhanced. So, by comparing Fig. 4(a) and Fig. 4(b), a small improvement in PU voltages has been observed. After that, at same buses, a capaci- ©2022 ADVANCES IN ELECTRICAL AND ELECTRONIC ENGINEERING 509 POWER ENGINEERING AND ELECTRICAL ENGINEERING VOLUME: 20 |NUMBER: 4 |2022 |DECEMBER Start Initialization No of Swarms (k) No of Iterations Set value of 𝑪𝟏, 𝑪𝟐 and w Randomly initialize the swarms Set Iter = 01 Input data of Power System Run load flow for each swarm Evaluate objective function for each particle Determine the PBest and GBest of all swarms Evaluate each swarms velocity and position 𝑽𝒊 𝒌+𝟏 = 𝒘𝒗𝒊 𝒌+𝒄𝟏𝒓𝟏൫𝒑𝒃𝒆𝒔𝒕𝒊 𝒌−𝒙𝒊 𝒌൯+𝒄𝟐𝒓𝟐൫𝒈𝒃𝒆𝒔𝒕𝒌−𝒙𝒊 𝒌൯ 𝒙𝒊 𝒌+𝟏 = 𝒙𝒊 𝒌+𝒗𝒊 𝒌+𝟏 Calculate: 𝒘𝒌+𝟏 = 𝒘𝒎𝒂𝒙 +ቀ𝒘𝒎𝒊𝒏−𝒘𝒎𝒂𝒙 𝒌𝒎𝒂𝒙 ∗ 𝒌ቁ , 𝒄𝟏 𝒌+𝟏 = 𝒄𝒎𝒂𝒙 +ቀ𝒄𝒎𝒊𝒏−𝒄𝒎𝒂𝒙 𝒌𝒎𝒂𝒙 ∗𝒌ቁ & 𝒄𝟐 𝒌+𝟏 = 𝒄𝒎𝒊𝒏 +ቀ𝒄𝒎𝒂𝒙−𝒄𝒎𝒊𝒏 𝒌𝒎𝒂𝒙 ∗𝒌ቁ 𝒙 𝒊 𝒌+𝟏 > Power system Buses 𝒙 𝒊 𝒌+𝟏 = Power System Buses & 𝑽𝒊 𝒌+𝟏 = Random Value Yes No Iter = Iter + 1 Iter = No of Iterations No GBest Yes Stop Fig. 3: PSO flow chart. ©2022 ADVANCES IN ELECTRICAL AND ELECTRONIC ENGINEERING 510 POWER ENGINEERING AND ELECTRICAL ENGINEERING VOLUME: 20 |NUMBER: 4 |2022 |DECEMBER 0.92 0.94 0.96 0.98 1 1.02 1.04 1.06 1.08 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 Voltage (PU) No. of buses (a) Nominal voltages. 0.96 0.98 1 1.02 1.04 1.06 1.08 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 Voltage (PU) No. of buses (b) Less improved voltages. Buses (3, 13, 14) 600 kvar capacitor rating. 0.94 0.96 0.98 1 1.02 1.04 1.06 1.08 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 Voltage (PU) No. of buses (c) Some improved voltages. Buses (3, 13, 14) 500 kvar capacitor bank. 0.94 0.96 0.98 1 1.02 1.04 1.06 1.08 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 Voltage (PU) No. of buses (d) Much improved voltages. Buses (3, 28, 32) 800 kvar capacitor bank. Fig. 4: PU voltages of IEEE 33-bus system with and without capacitor placement. 0.86 0.88 0.9 0.92 0.94 0.96 0.98 1 1.02 1 3 5 7 9 111315171921232527293133353739414345474951535557596163656769 Voltage (PU) No. of buses (a) Nominal voltages. 0.88 0.9 0.92 0.94 0.96 0.98 1 1.02 1 3 5 7 9 111315171921232527293133353739414345474951535557596163656769 Voltage (PU) No. of buses (b) Improved voltages. Buses (57, 66, 62) 600 kvar capacitor rating. 0.88 0.9 0.92 0.94 0.96 0.98 1 1.02 1 3 5 7 9 111315171921232527293133353739414345474951535557596163656769 Voltage (PU) No. of Buses (c) Improved voltages. Buses (58, 48, 69, 43, 63) 600 kvar capacitor rating. 0.88 0.9 0.92 0.94 0.96 0.98 1 1.02 1 3 5 7 9 111315171921232527293133353739414345474951535557596163656769 Voltage (PU) No. of buses (d) Improved voltages. Buses (60, 69, 51, 65, 56, 48, 45) 500 kvar capacitor rating. Fig. 5: PU voltages of IEEE 69-bus system with and without capacitor placement. tor of a different rating i.e., 500 kvar, is placed and it can be said that the number of improved voltages is more than 600 kvar, although the rating of the capacitor is smaller this is clearly mentioned in Fig. 4(c). Finally, a capacitor of 800 kvar is placed at different buses i.e., 3, 28 and 32, so it is also analysed that a lot of improvement in the PU voltages has been analysed at the receiving end while comparing this location and size of the capacitor with nominal voltages and 600 kvar and 500 kvar capacitors. Similarly, with the hit and trial method, the behaviour of the PU voltages at different buses with and without capacitor placement having different ratings has been discussed in detail in Fig. 5. The nominal voltages of the IEEE 69-bus system (radial ©2022 ADVANCES IN ELECTRICAL AND ELECTRONIC ENGINEERING 511 POWER ENGINEERING AND ELECTRICAL ENGINEERING VOLUME: 20 |NUMBER: 4 |2022 |DECEMBER 0.92 0.94 0.96 0.98 1 1.02 1.04 1.06 1.08 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 Voltages (PU) No. of buses Without Capacitor Voltage (PU) With Capacitor Voltage (PU) Fig. 6: Comparison of voltages with and without capacitor banks for IEEE 33-bus system. 0.86 0.88 0.9 0.92 0.94 0.96 0.98 1 1.02 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 53 55 57 59 61 63 65 67 69 Voltage (PU) No. of buses Nominal voltages 3 capacitor 5 capacitor 7 capacitor Fig. 7: Comparison of voltages with and without capacitor banks for IEEE 69-bus system. distribution system) are mentioned in Fig. 5(a) without any capacitor. The Fig. 5(b), Fig. 5(c) and Fig. 5(d) shows the difference of PU voltage analysed into IEEE 69-bus system with different capacitor ratings and locations. First, a capacitor bank having 600 kvar rating is placed at the bus no. 57, 66 and 62. Second, the capacitor with the same rating at different buses i.e., 58, 48, 69, 43, 63 is injected into the system and in the end capacitor with 500 kvar rating at the bus no. 60, 69, 51, 65, 56, 48 and 45 are placed to analyse the PU voltages. 1) IEEE 33-bus and 69-bus System Voltage Profile with and without Capacitors Figure 6 shows the comparison of voltages with and without capacitor banks at different locations of the IEEE 33-bus Radial Distribution System. It clearly shows that voltages are improved by injecting capacitor banks at different locations through the hit and trial method. As the capacitor feeds reactive power locally to the load which is not so far from the load, hence voltages and power factor of the system get improved. Similarly, for IEEE 69-bus system the comparison of PU voltages is depicted in Fig. 7. 2) Mitigation of Power Losses with Capacitor Bank Placement for IEEE 33-bus and 69-bus Systems Since the capacitor supplies reactive power, it becomes necessary to measure the power losses. To mitigate power losses, capacitors with different ratings are placed on numerous buses. Figure 8 shows the detailed analysis of power losses with different capacitor ratings at different locations. It can be seen from Fig. 8(a), Fig. 8(b) and Fig. 8(d) that even capacitors with different ratings are placed at the same locations i.e., bus no. 3, 13 and 14 but, the power losses measured are different. Capacitors with 600 kvar, 400 kvar and 500 kvar ratings at the same locations produces 170 kW, 160 kW and 130 kW power losses. While capacitor with 800 kvar produces 140 kW as shown in Fig. 8(c). Therefore, a capacitor with 500 kvar produces less losses and bus no. 3, 13 and 14 are optimal locations for capacitor placement. ©2022 ADVANCES IN ELECTRICAL AND ELECTRONIC ENGINEERING 512 POWER ENGINEERING AND ELECTRICAL ENGINEERING VOLUME: 20 |NUMBER: 4 |2022 |DECEMBER 170 1 0 50 100 150 200 kW losses (a) Reduced kW losses. Buses (3, 13, 14) capacitor rating 600 kvar. 160 1 0 50 100 150 200 kW losses (b) Reduced kW losses. Buses (3, 13, 14) capacitor rating 400 kvar. 140 1 0 50 100 150 200 kW losses (c) Reduced kW losses. Buses (3, 28, 32) 800 kvar capacitor rating. 130 1 0 50 100 150 200 kW losses (d) Most suitable kW losses. Buses (3, 13, 14) capacitor rating 500 kvar. Fig. 8: Mitigation of power losses with different capacitor ratings for IEEE 33-bus system. 200 1 0 50 100 150 200 kW losses (a) Reduced kW losses. Buses(46, 52, 66) capacitor rating 700 kvar. 180 1 0 50 100 150 200 kW losses (b) Reduced kW losses. Buses (68, 69, 65) capacitor rating 900 kvar. 170 1 0 50 100 150 200 kW losses (c) Reduced kW losses. Buses (64, 21, 6) capacitor rating 600 kvar. 150 1 0 50 100 150 200 kW losses (d) Most suitable kW losses. Buses (61, 63, 56) capacitor rating 600 kvar. Fig. 9: Mitigation of power losses with different capacitor ratings for IEEE 69-bus system. Similarly, power losses for IEEE 69-bus system are also mitigated by using different capacitor ratings at different allocations. Figure 9 clearly shows the comparative analysis of power losses. 3) Power Loss Analysis for IEEE 33-bus and 69-bus System A comparative analysis of power losses with and without capacitors has been carried out for both systems. Since it is clear from previous section that a capacitor with 500 kvar produces less losses. But it is also mandatory to measure the losses into IEEE 33-bus system without injection of capacitor banks. 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International Journal of Emerging Electric Power Systems. 2020, vol. 21, iss. 1, ISSN 1553-779X. DOI: 10.1515/ijeeps-2019-0217. [37] ARIF, S. M., A. HUSSAIN, T. T. LIE, S. M. AHSAN and H. A. KHAN. Analytical Hybrid Particle Swarm Optimization Algorithm for Optimal Siting and Sizing of Distributed Generation in Smart Grid. Journal of Modern Power Systems and Clean Energy. 2020, vol. 8, iss. 6, pp. 1221–1230. ISSN 2196-5625. DOI: 10.35833/MPCE.2019.000143. About Authors Muhammad Fawad SHAIKH (corresponding author) was born in Sukkur Sindh, Pakistan. Muhammad Fawad Shaikh received B.Eng. degree in Electrical engineering from Sukkur IBA University Sindh, Pakistan in 2018 and pursuing the M.Eng. degree in Electrical Power System from Sukkur IBA University Sindh, Pakistan. Currently, he is working as Lab Engineer in electrical engineering department at Sukkur IBA University. He has more than 10 research publications proceedings in IEEE conferences and Journals. His research area includes the Power System Analysis, Power Quality and Renewable energy systems. ©2022 ADVANCES IN ELECTRICAL AND ELECTRONIC ENGINEERING 521 POWER ENGINEERING AND ELECTRICAL ENGINEERING VOLUME: 20 |NUMBER: 4 |2022 |DECEMBER Abdul Majeed SHAIKH was born in Sukkur Sindh, Pakistan. He is pursuing his M.Eng. in Power Systems from Sukkur IBA University, and completed his B.Eng. (Electronic Engineering) from QUEST Nawabshah in 2009–2010. His area of interest covers Renewable Energy Systems, Power Quality, Power Systems, Smart grid, and Micro grid. He has more than 8 publications in journals and conference proceedings. Shoaib Ahmed SHAIKH was born in Shikarpur Sindh, Pakistan post graduated from NED University, Karachi and graduated from QUEST N/Shah Sindh, Pakistan is currently working as Lecturer at Sukkur IBA University. He has more than 15 research publications in conferences, nstitute of Electrical and Electronics Engineers (IEEE) proceedings and journals. His area of interest includes: Power System Protection, Renewable Energy System and Power quality. Raheel NADEEM was born in Naushahroferoze Sindh, Pakistan. He has done Bachelor of Engineering in Electrical from Sukkur IBA University in 2018. He is also doing Master’s in Electrical Engineering from Sukkur IBA University, Pakistan. His research areas include Power Systems, Control Engineering, Power Quality. Abdul Moiz SHAIKH was born in Larkana Sindh, Pakistan. He received his B.Eng. in Electrical Engineering from Sukkur IBA University in 2021. His research focus includes Power systems, Distributed Generation and Control Engineering. Arif Ali KHOKHAR was born in Sindh, Pakistan. He did received his B.Eng. in Electrical Engineering from Sukkur IBA University in 2021. His research areas are optimization techniques, Power systems, Smart grid, and Microgrid. ©2022 ADVANCES IN ELECTRICAL AND ELECTRONIC ENGINEERING 522