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An Accurate Automatic Quality-Factor Tuning Scheme for Second-Order LC Filters Faramarz Bahmani, Member, IEEE, Teresa Serrano-Gotarredona, and Edgar Sánchez-Sinencio, Fellow, IEEE Abstract—This paper presents a scheme to accurately tune the quality factor of second-order LC bandpass filters. The information of the magnitude response at the center and one of the cutoff frequencies is used to tune both the amplitude and the quality factor of the filter using two independent yet interacting loops. Furthermore, the synergic interaction between the loops makes the proposed scheme stable and insensitive to the mismatch between the input amplitudes. A chip prototype was implemented in a 0.35- m CMOS process and consumes 4.3 mA from a single 1.3-V supply. Measurement results show that at 1.97 GHz the quality factor is tunable from 60 to 220 while the amplitude is tunable between 15 and 0 dBm with worst case quality factor and amplitude tuning accuracies of 10% and 7%, respectively. Index Terms—Automatic -tuning, CMOS circuits, LC band-pass filter, -enhancement. I. INTRODUCTION DURING the last few years, there has been an increasing demand for wireless communication equipment. There are some points in the signal processing chain of such equipment where bandpass integrated filters are required. These filters have to operate at frequencies in the gigahertz range [1]–[3]. Traditionally, gigahertz filters were implemented off-chip with lumped RLC components, but recently, the increasing demand for portable low-cost radio frequency front ends has motivated the emergence of integrated LC filters [3]. However, the implementation of integrated LC filters continues to present a challenge. The low quality factor of on-chip inductors requires the introduction of active circuitry implementing a negative resistance to compensate for the losses associated with the inductance [4]. Furthermore, the large unpredictable variations in component values and parasitics of monolithic implementations produce large variations in the resonance frequencies and filter quality factors. These variations make the filter completely useless unless some kind of tuning can be done after fabrication. Even in this scenario, the variations in temperature and operating conditions make it necessary to include automatic tuning circuitry to have a practical commercial product. Automatic frequency tuning schemes for LC filters have already been developed [3], [5], and [6]. They employ the same techniques used for – filters [7]–[11]. A master filter in a voltage-controlled oscillator (VCO) configuration is used to sense the oscillation frequency and a phase-locked loop (PLL) is used to lock the oscillation frequency of the VCO to the desired reference frequency. However, the quality factor tuning scheme of LC filters cannot follow the same principles of – filters due to the lack of a simple relation between and amplitude response at the center frequency. In this paper, we introduce a technique for automatic tuning of the quality factor of the LC filters which relies neither on the phase information of the filter nor the exact value of the amplitude gain at the center frequency. The quality-factor tuning is achieved based on the adjustment of the amplitude response of the filter at the center and one of the cutoff frequencies. Furthermore, since most of the information is processed at very low frequencies good accuracies are obtained. For example it can achieve an accuracy of 1.9% for . This technique is validated through experimental results. We will present the development of -tuning architectures to reach the optimal proposed stable architecture. The paper is structured as follows. In Section II, the secondorder LC bandpass filter architecture and issues associated with its tuning are described. Previous tuning schemes reported in the literature are reviewed in Section III. The proposed automatic -tuning scheme is also presented in Section III. The potential tuning errors limiting the accuracy of the proposed technique are discussed in Section IV. The experimental results of the fabricated chip are presented in Section V. In Section VI, conclusions are given. II. LC FILTER ARCHITECTURE A parallel LC tank can be used as a second-order resonator. Due to the losses associated with the integrated spiral inductors, the achievable quality factor in RF range is limited. Thus, to implement an on-chip narrow band LC filter, positive feedback is needed for -enhancement which is equivalent to adding a negative resistance to compensate for the losses [4]. Serial parasitic resistance of the on-chip inductors, lowdiode junction capacitances, and the lossy substrate are the main sources of loss in the LC tank. The inductor resistance is the dominant loss. The center frequency and the quality factor of the resonator in Fig. 1 can be described as (1)
Fig. 1. Linear model of a Q -enhanced LC tank. Fig. 2. Q -enhanced LC bandpass filter. (2) where . The circuit implementation of the negative transconductance, , is going to be explained later on in this section. Note that (2) is valid only around the LC tank’s resonant frequency, due to the fact that the equivalent series resistance from the inductor loss varies with frequency. The series combination of the inductor and its loss can be modeled as a parallel combination of and [12]. If the inductor quality factor is large enough then, and . Thus, the frequency response of the filter in Fig. 1 can be approximated as (3) where and . Fig. 2 shows the circuit implementation of a second-order -enhanced LC filter. The center frequency tuning is achieved through varactors which are pMOS transistors implemented in separate wells (in an n-well technology) and with their drain/ source terminals connected together to the well terminal. The capacitance seen by the gate is adjusted by changing the voltage and exploiting the variation of the gate capacitance when the transistor goes from weak inversion to the accumulation region [2]. The negative transconductance is implemented by transistors M1–M3. Transistors M2–M3 form a differential pair with its output nodes cross-connected to its inputs, while M1 provides the bias current . The transconductance associated with this cross-coupled pair can be expressed as [13]. By substituting in this equation the expression of the bias current , the following expression for the negative transconductance, , as a function of the bias voltage can be obtained (4) where and and refer to the ratios of in Fig. 2. In the above equations , and have their usual meaning of mobility, oxide capacitance density and threshold voltage of the MOS transistors. Observe from (2) and (4) that the quality factor of the filter can be tuned by adjusting the bias voltage . The control voltage changes the transconductance of the input differential pair - thus, changing the peak amplitude gain of the filter while keeping the invariant. Note that as a function of can be expressed as (5) where and and refer to the ratios of and in Fig. 2, respectively. Thus, using (4) and (5), the peak amplitude gain ,defined in (3), can be expressed as (6) In a similar way, the quality factor can be expressed as (7) III. AUTOMATIC QUALITY-FACTOR TUNING A. Existing Quality-Factor Tuning Techniques The traditional -tuning schemes reported for – filters [9]–[11], [14]–[16] are not applicable to LC filters mainly because most of them rely on the fact that . Currently, available -tuning schemes for high frequency LC filters manipulate the frequency response of the filter in a digital [17]–[20] or an analog [6] feedback loop. In [17] the quality-factor tuning is achieved by converting the LC filter to an oscillator and then varying the negative transconductance until the desired (stable) is achieved. However, this technique relies on the assumption that the variation of the negative transconductances in the filter and the oscillator is constant which is valid only if a relatively high quality-factor inductor is used in the resonator. In [18], the center frequency and the quality-factor tuning are achieved by comparing the amplitude gain at three different frequencies. Low accuracy of the gain comparison at high frequencies and relying on the matching between the sampling times of
the error signal at different frequencies are the main drawbacks of this technique. In [19], a digital tuning scheme based on the phase comparison of the filter at different frequencies is presented. However, finite resolution of the needed frequency synthesizer, phase offset and parasitic poles and zeros of the filter limit its performance especially for high frequency applications. The scheme presented in [20] is based on direct characterization of the complete frequency response of the filter, and it is not adaptable to automatic -tuning. Finally, the VCO-based -tuning approach presented in [6] is a significant advance in the theory of automatic -tuning of LC filters. It varies the negative transconductance to tune a number of LC resonators to behave as ideal (loss-less) resonators based on a master-slave approach. However, the fact that the negative transconductance added to the LC resonators compensate the losses of the passive components only at one particular frequency imposes restriction on wider frequency range filters. B. Proposed Quality-Factor Tuning Scheme The proposed scheme in this work independently tunes the quality factor and the amplitude gain of the filter at its center frequency, while using information of the transfer function at two different frequencies. Assuming that these two frequencies are the center and one of the 3-dB cutoff frequencies , an iterative scheme to tune the and the gain of the filter at the center frequency is proposed. Based on the fact that and dB , the following results can be obtained: (8) (9) The proposed tuning scheme is shown in Fig. 3. The two interacting loops associated with tuning of the and are called amplitude tuning loop and -tuning loop, respectively. The input signals of the amplitude and -tuning loops are two sinusoids at and , respectively. The relation between these two frequencies determines the desired quality factor of the filter [see (8)]. Let us first concentrate on the amplitude tuning loop. Assuming that the input signal is and the filter is tuned at the desired center frequency , the peak amplitude gain can be tuned using the amplitude tuning loop shown in Fig. 3. The difference between the desired gain and the actual gain is characterized by which can be expressed as (10) When the amplitude tuning loop settles to its steady state, i.e., when , the peak amplitude gain at the center frequency is tuned to the desired amplitude gain of . The steps to achieve are indicated in Fig. 3. Based on the 3-dB cutoff frequency information, the quality factor of the filter can be tuned to the desired using the Fig. 3. Proposed schemes for amplitude and quality-factor tuning. -tuning loop shown in Fig. 3. This technique relies on the fact that if Re( , then the correct value of is achieved. Note that according to (9) the output of the filter at has two components with equal amplitudes of but 45 phase difference. However, if the proper quality factor of the filter has not already been achieved, the real part of the amplitude gain at the frequency of will differ from . Let us call this gain . Thus, the error of the -tuning loop can be expressed as (11) Observe from (11), when then becomes zero which means that the quality factor is appropriately tuned. Also note that the feedback signal FB in Fig. 3 does not degrade the performance of the -tuning loop due to mismatches in the input amplitudes and . Provided that the amplitude tuning loop has been already settled to and the condition holds, if then becomes zero which means that the quality factor is correctly tuned. Let us analytically study the behavior of the -tuning loop. As explained above, the -tuning loop adapts the real part of the gain at the 3-dB cutoff frequency to be . Assume that the proper value of has not yet been achieved. Let us call the actual filter quality factor of the filter that differs from the
Fig. 4. Resulting amplitude and quality-factor tuning loops eliminating the feedback coupling between loops. desired one, . The output signal of the filter in the -tuning loop for an input of can be expressed as (12) Observe from (12) that the real part of the gain at the target cutoff frequency is . Indeed, if then and if then . The deviation of the real part of the gain at , from its ideal value can be related to the relative error in the quality factor (13) (14) where . When the -tuning loop in Fig. 3 reaches its equilibrium state, becomes 2 and therefore . C. Amplitude and -Tuning Loops Coupling As observed from Fig. 3, in the proposed scheme, there is a feedback signal called FB that couples the amplitude tuning and the -tuning loops. This coupling between the loops would force us to have two identical filters simultaneously available to implement the tuning scheme. An immediate solution would be to eliminate the feedback coupling between the two loops. This would result in the scheme shown in Fig. 4 which has two independent tuning loops. The upper tuning loop is identical to the amplitude tuning loop in Fig. 3 and forces the peak amplitude gain to settle to the desired value . The lower loop in Fig. 4 controls the quality factor of the filter. The error signal that controls the voltage becomes . When becomes zero the loop forces the real part of the gain at to be equal to . Thus, according to (11) the actual quality factor equals the desired one . Due to the dependence of the and on both and [see (6) and (7)], the stability of the tuning scheme in Fig. 4 has to be carefully explored. Assume the amplitude control loop is not yet settled such that the overall gain is too low. Then, even if is correct, the -tuning loop will see too small an output signal and think the is too large. Based on (7), will then be erroneously adjusted to reduce the . This reduction through will further reduce the gain [see (6)], resulting in an unstable tuning scheme. To fix the instability problem of Fig. 4, when the amplitude tuning loop is not settled yet, the -tuning loop needs to know that the amplitude is too small (not yet settled). This can be accomplished by sending the amplitude error signal, , to the -tuning loop. This is precisely the scheme proposed in Fig. 3. An extensive analysis, shown in the next subsection, has been carried out to study the stability of the tuning schemes proposed in Figs. 3 and 4. D. Stability Analysis Bellow, the stability of the -tuning schemes shown in Figs. 3 and 4 is analyzed assuming the second-order LC filter shown in Fig. 2 is being tuned. We can compute the target equilibrium values of the controlling voltages and of the second-order filter shown in Fig. 2. Using (6) and (7) and imposing that at equilibrium and , the target equilibrium values of the controlling voltages and of the second-order filter shown in Fig. 2 can be obtained as (15) (16) Next, we demonstrate that both tuning systems shown in Figs. 3 and 4 with the LC second-order filter shown in Fig. 2 have the above values of and as equilibrium point. However, the nature of the equilibrium points of both systems is very different from a stability point of view. Let us first study the dynamics of the system shown in Fig. 4. The derivatives of the two control voltages and in the amplitude and -tuning loops in Fig. 4 can be expressed as (17) (18) where and are defined in (13) and (6), respectively.
Fig. 5. Phase portrait corresponding to Fig. 4. Substituting and for their expressions in (13) and (6) and defining the following variables and , (17) and (18) can be re-expressed as (19) (20) where and . Equations (19) and (20) define the differential equations of a second-order nonlinear system. From these equations, we identify and as an equilibrium point, which is the same equilibrium point defined by (15) and (16). The linear approximation of the system behavior around the equilibrium point defines a stable equilibrium point. However, extensive transient simulations of the transient behavior of the nonlinear system confirm that the system does not converge to the equilibrium point for every possible initial state. These results can be confirmed graphically applying the phase portrait concept to the nonlinear system [22]. Using the phase portrait concept the qualitative behavior of the system given any initial condition can be determined. The above technique has been applied to (19) and (20) for the following parameters: pF, nH, m/ m/ , and . The phase portrait of the system is plotted in Fig. 5. Observe that the equilibrium point is a stable focus but with a reduced attraction zone. The system diverges away from the equilibrium point for a large set of possible initial conditions in the state space. In particular, the trajectories beginning with low values converge to the equilibrium point. However, trajectories with larger values diverge from that point. In Fig. 5, we have represented the phase portrait of all possible initial states of the system, that is, for the range of values that correspond to . Values lower than have not been considered as in that region (6) and (7) are no longer valid as the transistor goes into the weak inversion region. The same approach described above has been also used to study the stability of Fig. 3. Since the amplitude tuning loop in both schemes of Figs. 3 and 4 are the same thus the expressions for and remain intact. However, the expressions for and are changed to the following: (21) (22) The same equilibrium point and can be identified from (20) and (22). Let us identify its stability behavior using the phase-portrait concept. Fig. 6 shows the phase portrait of the system defined by (20) and (22) using the same filter parameters used in Fig. 5. This figure clearly shows that there has been a change in the nature of the equilibrium point. The equilibrium point is now a stable nodal sink and the system is asymptotically stable for any possible initial condition in the state space as Fig. 6 shows. The settling behavior of the proposed -tuning scheme can be studied by exploring the behavior of the equilibrium point, defined by (20) and (22), as a function of the filter parameters. It has been observed that by increasing the ratio / or by increasing the value of the target quality factor , the area of attraction of the equilibrium point is reduced. On the contrary the area of attraction of the equilibrium point enlarges when
Fig. 6. Phase portrait corresponding to Fig. 3. Fig. 7. Conceptual block diagram of the filter used in SIMULINK simulations. the intrinsic quality factor of the filter increases. That is, when capacitance is increased and/or inductance is decreased. The behavioral performance of the previously proposed tuning schemes in Figs. 3 and 4 have been examined using SIMULINK and their stability properties have been confirmed through SIMULINK simulations. The conceptual block diagram of the second-order LC bandpass filter used in the SIMULINK simulations is shown in Fig. 7. Fig. 8 shows the simulation results of the tuning scheme proposed in Fig. 4. The simulation is done for the following target values, rad/s, and . The filter parameters are the same used in the previous computations. The initial conditions of the loops were set to and . For that system, the equilibrium point is V and V. In the simulation, we can observe how the system diverges from the equilibrium point as can be foreseen from the system phase portrait. Fig. 9 shows the simulation results of the tuning scheme proposed in Fig. 3. The target values, filter parameters and initial conditions are the same ones used in the previous simulation Fig. 8. SIMULINK simulation of the tuning scheme of Fig. 4. (a) V versus time. (b) V versus time. of Fig. 8. However, observe that in this case the system control voltages and evolve towards their stable equilibrium point. Fig. 10 shows the magnitude and phase plots of the resulting tuned filter. It has the desired and the desired gain at the center frequency. In Section V, it will be shown that in practice the proposed tuning scheme in Fig. 3 can be implemented, in an iterative way, using only one loop.
Fig. 9. SIMULINK simulation of the tuning scheme of Fig. 3. (a) V versus time. (b) V versus time. IV. NONIDEAL EFFECTS A. Remarks on the Effect of Parasitic Capacitances The main parasitic capacitances in the circuit implementation of the LC filter are shown in Fig. 11. The overall transfer function of the filter can be expressed as (23) where is the gate-drain capacitance of - and and are the gate-drain and gate-source capacitances of - , respectively. Comparing (3) and (23) reveals that by considering the parasitic capacitances, center frequency will decrease to , which can be corrected in a frequency tuning loop, while will increase to . The effect of the right half plane zero can be neglected since it is located too far away from the center frequency of the filter. Note that at the center frequency , the phase, , of the transfer function of the filter will change from 0 to and the amplitude response of the filter will increase by a factor of . Note that for very small . Since the proposed -tuning scheme in Fig. 3 is relying neither on the phase nor on the absolute value of the peak amplitude gain of the filter, the above variations in the phase and amplitude of the transfer function will not affect the performance of the presented scheme. In summary, our proposed tuning scheme can absorb these parasitic effects. B. Remarks on the Effect of dc Offsets Assume the dc offsets of the combination of the multipliers together with the LPFs in Fig. 3 can be modeled as additive Fig. 10. (a) Magnitude and (b) phase plots of the tuned filter in Fig. 4 for Q = 26 and A =1 at f =2 : 07 GHz. Fig. 11. Parasitic capacitances of the filter. terms . Similarly, assume the dc offsets of the summers in Fig. 3 can be modeled as additive terms . Including the above dc offset terms in the amplitude and -tuning loops of Fig. 3
Fig. 12. Effects of the dc offsets on the Q -tuning scheme of Fig. 3 (a) Loop1 (b) Loop2. results in the block diagram shown in Fig. 12. By following the steps shown in Fig. 12, the final error in the amplitude tuning loop including the dc offset errors can be found as (24) Thus, in steady state, i.e., , the relative error of the peak amplitude gain can be expressed as (25) Similarly, the final error of the -tuning loop in Fig. 12 including the dc offset terms, can be expressed as (26) Recall from (13) and (14) that the real part of the gain at the lower cut off frequency is . Thus, the relative Fig. 13. Estimated errors versus (a) relative peak amplitude error (b) relative Q error. -tuning error, including the dc offset terms, can be expressed as (27) The numeric value of has been accurately extracted as a function of the input amplitude from the difference between the simulation and the measurement results (see Fig. 17, shown later). Assuming , the relative errors in (25) and (27) for to mV in steps of 10 mV have been plotted in Fig. 13. Based on these results the relative errors of the amplitude and the -tuning loops for mV and mV are around 1.2% and 2.5%, respectively. As Fig. 13 shows, besides minimizing the dc offsets of different blocks, by increasing the input amplitude, the relative errors in the amplitude and the -tuning loops can be decreased. For example, by increasing the input amplitude by 10%, for mV and mV, the above errors decrease by 0.1% and 0.12%, respectively. Furthermore, under the influence of process variations due to the mobility (10%), threshold voltage (10%) and width (5%) deviations of MOS transistors as well as 15% degradation in the sheet resistance of the top metal layer, the simulation results show that the quality factor of the filter is changed by 8% which can be tuned back using the proposed scheme. V. TEST-CHIP MESEAUREMENT RESULTS A prototype has been designed and fabricated in a TSMC 0.35- m, 2-poly, four metal standard CMOS technology. The
Fig. 14. Chip microphotograph. Fig. 15. Block Diagram of the fabricated chip. Fig. 16. Schematic of the multiplier with the RC LPF as its load. microphotograph is shown in Fig. 14 which occupies a silicon area of 0.0725 mm and contains a filter with two multipliers. A simple open drain output buffer is employed at the output of the filter to drive the 50 load of the instrument which shows a stand-alone attenuation of around 10 dB at 1.8 GHz. Fig. 15 shows the block diagram of the fabricated prototype chip. Note that we are using only one loop (filter). Note that the input sinusoids at and can be generated by a fractional-N synthesizer with an LC oscillator. However, we have used external inputs in the following experimental results. Fig. 16 shows the transistor level implementation of the multiplier [21]. The injected current, called bleeding current, allows separate control of current flowing through the drive stage ( and ) from the current switches (M3-M6). For the same drive bias current, bleeding reduces the current flowing through the current switches and load resistance. Thus, the flicker noise contributed by the switches is significantly reduced and allows us to use large load resistors which increase the conversion gain. Since the load of the multiplier is resistive, Fig. 17. DC level at the output of the multiplier MX2 in Fig. 15 as a function of the input amplitude at 2 GHz (circles: measured, solid line: simulated). Fig. 18. Tuning algorithm using one filter. the need of a common mode feedback circuit at the multiplier output is avoided. It is of great importance to have exact knowledge of the dc performance of the multiplier for different input amplitudes. This has been carried out by the precise extraction of the dc output of the multiplier using the HP4156C while the test chip is shielded by the test fixture Agilent 16442A. The above setup is set to operate in the long time (1 s) mode during which the measured output is averaged over 1000 samples. Fig. 17 compares the measured and simulated dc output voltages of the multiplier with both inputs connected together. Note that the deviation of the measured data from the simulation data for amplitudes greater than 3 dBm is mainly due to the large signal operation of the multiplier which no longer provides the exact multiplication of the input amplitudes. In this experimental prototype we chose to implement the low frequency portion of the control loops off-chip. That gives us more flexibility in the loops configuration during the testing process of the proposed procedures. However, as can be observed from Figs. 3 and 4, all the off-chip operations are just simple mathematical expressions of the signals at low frequency and thus, are appropriate for full integration of the entire tuning loop. Furthermore, the center frequency of the filter has been tuned manually throughout the following measurement results.