Hardware Secure Boot. A Review Of ”IRIS: An Embedded Secure Boot for IoT devices” [Póster]

Hardware Secure Boot. A Review Of ”IRIS: An Embedded Secure Boot for IoT devices” Germ´ an Cano Quiveu Dpto. Tecnolog´ ıa Electr´ onica, Universidad de Sevilla Av. Reina Mercedes s/n, 41012 Sevilla [email protected] Paulino Ruiz de Clavijo V´ azquez Dpto. Tecnolog´ ıa Electr´ onica, Universidad de Sevilla Av. Reina Mercedes s/n, 41012 Sevilla [email protected] Manuel Jes´ us Bellido Dpto. Tecnolog´ ıa Electr´ onica, Universidad de Sevilla Av. Reina Mercedes s/n, 41012 Sevilla [email protected] Jorge Juan Chico Dpto. Tecnolog´ ıa Electr´ onica, Universidad de Sevilla Av. Reina Mercedes s/n, 41012 Sevilla [email protected] Juli´ an Viejo Cortes Dpto. Tecnolog´ ıa Electr´ onica, Universidad de Sevilla Av. Reina Mercedes s/n, 41012 Sevilla [email protected] Jes´ us Barrionuevo Vallecillo Dpto. Tecnolog´ ıa Electr´ onica, Universidad de Sevilla Av. Reina Mercedes s/n, 41012 Sevilla jesbarv[email protected] Abstract—This study proposes IRIS a hardware secure boot solution, that is suitable for integrating IoT devices. IRIS can boot a Linux kernel image pre-stored in removable media and comprises a data verifier securing the authenticity, integrity, and confidentiality of the boot process. IRIS is fully developed as a hardware module and the results reveal short boot-up times and a small hardware footprint when implemented on FPGA chips. In addition, IRIS is an open-source generic solution that can be adapted to multiple architectures and includes a crypto-core called E-LUKS that can be used outside the boot-loading process to add confidentiality, integrity, and authenticity to data stored on off-chip storage like a flash device. IRIS shows a reduction in lookup tables footprint when compared to other IoT boot solutions consuming from 2 times to 8 times less resources and only slightly greater, around 30%, with solutions that only cover authentication and integrity. Index Terms—field programmable gate array; secure boot; Internet of Things (IoT); bootloader; hardware; embedded device. Tipo de contribuci´ on: Investigaci´ on ya publicada en [1] I. INTRODUCTION The significant growth in connected Internet of Things (IoT) devices in recent years increased attacks on these types of devices. Security is a priority in environments where these devices are part of critical systems or deal with private data. Security must be addressed at all levels, from the hardware to the full software stack. The link between hardware and software is the bootloader which is the first piece of software executed on the device. Current SoCs store the full bootloader chain in off-chip flash memory (on-board flash chip or removable media). Hence, it can be tampered with or altered with appropriate tools. To avoid these types of attacks, a procedure called secure boot aims at protecting the data and/or code involved in the bootloader chain. The secure boot process comprises a chain of stages where the previous stage verifies the next stage before launching it. The component called the root of trust (RoT) is considered trusted by default and is usually an immutable preloader stored in an on-chip ROM. Each stage attaches a digest of its data to be used in a verification procedure run before starting. This verification ensures the stage integrity of the bootloader chain using a hash-based message authentication code (HMAC), and is called chain of trust (CoT). In addition to integrity, authentication is achieved by encrypting the digest. In addition, secure boot can also support confidentiality by encrypting the data of the stages and preventing them from being read by unauthorized users. This contribution proposes a custom secure boot hardware called IRIS. It is focused on SoC devices with low footprins, allowing them to boot a Linux OS securely. IRIS guarantees confidentiality, integrity, and authenticity when booting a Linux kernel image stored in off-chip memory. II. IRIS SECURE BOOT IRIS is a generic hardware solution that provides Secure- Boot to IoT devices. In Fig. 1 it shows a schematic of the IRIS solution. IRIS main features are: •It has a low hardware footprint for resource-constrained devices. •It is a generic secure boot solution for embedded devices, and it is easy to adapt to different processors and buses. •The design has an open-source license for easier integration and re-usability in other projects. •It only needs to change the bus connection to be adapted to other SoC solutions. IRIS uses the E-LUKS core to provide confidentiality, integrity and authenticity. E-LUKS provides a Full Disk Encryption such as LUKS [2]. However, E-LUKS implements lightweight cryptographic algorithms such as PRESENT, SPONGENT and a variation of the key derivation function (KDF) presented in [3] providing an integrity and authentication layer to the confidentiality already in LUKS, by signing the whole partition with an HMAC algorithm. JNIC 2024 ISBN:978-84-09-62140-8 512 The IRIS secure boot procedure starts after an SoC poweron or hard-reset. It begins with the Boot Module asserting the processor’s reset signal to take control of the internal bus until the secure boot is completed. The boot procedure requires secret parameters to initialize the E-LUKS Module. They are preloaded in the Boot Module, which is in charge of initializing the E-LUKS Module. Once the E-LUKS Module is configured, the Boot Module waits for a response containing the total number of bytes of the E-LUKS partition or an error signal. When all checks are correct, the E-LUKS Module reads a data stream from the SD card, decrypts , and sends it to the Boot Module. The Boot Module copies the data received into RAM and finally de-asserts the processor’s reset signal, leaving internal bus control to the processor, which will execute the first stage of the boot-up process. RAM 8,8 cm E-LUKS Module Boot Module E-LUKS Bridge Processor SD Card SD Host OR IRIS ext_reset cpu_reset System Bus BootModule Bridge Fig. 1. Schematic of the IRIS subsystem. III. RESULTS To validate IRIS has been implemented in Xilinx Artix7 XC7A100T-1CSG324C FPGA chip[4]. This solution includes an SD card as boot media with an E-LUKS partition.The entire code used for this section can be accessed on the author’s GitHub [5]. In order to compare IRIS to other solutions, first it has been tested against a non-secure hardware boot solution (Regular Boot). Table I shows the comparison between these two solutions. IRIS has around 25% more slices than the nonsecure bootloader. Against other solutions, IRIS proves to have a smaller footprint than [6] and [7], both solutions offer authenticity and integrity and only [6] offers confidentiality. In contrast, [8] shows better results, however, this solution only offers an HMAC core while IRIS provides confidentiality, integrity and verification. All these data are shown in Table II. IV. CONCLUSIONS The IRIS system introduced here is a full hardware secure boot solution for IoT devices on FPGA with a low footprint. IRIS provides confidentiality, integrity, and authenticity to the boot process. It remains available at runtime after the boot process and can be used to access secured data on removable TABLE I IRIS VS.REGULAR BOOTLOADER. FPGA RESOURCES UTILIZATION ON THE XILINX ARTIX7 XC7A100T-1CSG324C, ENTIRE SOC IMPLEMENTATION Core Slices Flip Flops LUT’s No. % No. % No. % Regular Bootloader SoC 3282 20.71 6527 5.15 9293 14.66 OpenRISC 1411 8.90 2020 1.59 4233 6.68 DDR Controller 1546 9.75 3714 2.93 4041 6.37 Regular Bootloader 215 1.35 428 0.34 584 0.92 IRIS SoC 4173 26.33 9378 7.40 11539 18.20 OpenRISC 1251 7.89 1938 1.53 3666 5.78 DDR Controller 1526 9.63 3714 2.93 4064 6.41 IRIS 1345 8.48 3301 2.60 3298 5.20 Increment of IRIS 891 +27.14 2851 +43.7 2246 +24.15 TABLE II RESOURCES UTILIZATION FOR IOTSECURE BOOT SOLUTIONS. Work Flip Flops LUT’s FPGA Family No. % No. % Streit et al. [6] 5934 16.9 6783 38.5 Zynq IRIS 3269 9.29 3319 18.86 Zynq ITUS [7] 6722 1.65 27170 13.33 Kintex-7 IRIS 3299 0.81 3334 1.64 Kintex-7 CrytoCore CARE [8] 1715 1.35 2591 4.08 Artix-7 IRIS 3365 2.65 3390 5.35 Artix-7 media. IRIS is an open-source design and can be adapted to different SoC architectures by rewriting the glue logic for the internal bus. Comparisons against similar solutions reveal significant improvements in hardware resource requirements even when compared to solutions that do not support all aspects of a secure boot process, making IRIS a valuable option for secure boot in IoT devices. REFERENCES [1] G. Cano-Quiveu, P. R. de Clavijo-Vazquez, M. Bellido, J. Juan-Chico, and J. Viejo-Cortes, “Iris: An embedded secure boot for iot devices,” Internet of Things, vol. 23, p. 100874, 2023. [Online]. Available: https://www.sciencedirect.com/science/article/pii/S254266052300197X [2] C. Fruhwirth and M. Broz, “LUKS1 On-Disk Format Specification,” 2018. [Online]. Available: https://mirrors.edge.kernel.org/pub/linux/utils/ cryptsetup/LUKS docs/on-disk-format.pdf [3] F. F. Yao and Y. L. Yin, “Design and analysis of password-based key derivation functions,” in Topics in Cryptology – CT-RSA 2005, A. Menezes, Ed. Berlin, Heidelberg: Springer Berlin Heidelberg, 2005, pp. 245–261. [4] Xilinx, “7 Series FPGAs Data Sheet: Overview (DS180),” vol. 180, pp. 1–18, 2010. [Online]. Available: www.xilinx.com [5] “GitHub - germancq/ELUKS/examples/bootloader,” 2022. [Online]. Available: https://github.com/germancq/ELUKS/tree/main/ examples/bootloader [6] F.-J. Streit, F. Fritz, A. Becher, S. Wildermann, S. Werner, M. Schmidt- Korth, M. Pschyklenk, and J. Teich, “Secure boot from non-volatile memory for programmable soc architectures,” in 2020 IEEE International Symposium on Hardware Oriented Security and Trust (HOST), 2020, pp. 102–110. [7] V. B. Kumar, S. Deb, N. Gupta, S. Bhasin, J. Haj-Yahya, A. Chattopadhyay, and A. Mendelson, “Towards designing a secure risc-v system-on- chip: Itus,” Journal of Hardware and Systems Security, vol. 4, no. 4, pp. 329–342, 2020. [8] A. Dave, N. Banerjee, and C. Patel, “Care: Lightweight attack resilient secure boot architecture with onboard recovery for risc-v based soc,” in 2021 22nd International Symposium on Quality Electronic Design (ISQED), 2021, pp. 516–521. A Review Of “IRIS: An Embedded Secure Boot for IoT devices” 513