High current efficiency classAB OTA with high open loop gain and enhanced bandwidth

High current efficiency class- AB OTA with high open loop gain and enhanced bandwidth Shirin Pourashraf1a), Jaime Ramirez-Angulo1, Alejandro Roman-Loera2, Antonio J. Lopez-Martin3, Alejandro Diaz-Sanchez4, and Ramon G. Carvajal5 1Klipsch School of Electrical and Computer Engineering Department, New Mexico State University, USA 2Autonomous University of Aguascalientes, Mexico 3Department of Electrical and Electronic Engineering, Public University of Navarra, Campus Arrosadia, Pamplona E-31006, Spain 4Instituto Nacional de Astrofisica, Optica Electronica, Puebla, Mexico 5Department of Electronic Eng., University of Seville, Spain a) shirin_[email protected] Abstract: An efficient class-AB OTA with enhanced output current, slew rate, open loop gain, and gain bandwidth is presented. The circuit is based on a class-AB input stage with adaptive biasing, and an output stage with dynamically biased cascode transistors. It can deliver output currents 100 times larger than the bias current with a total quiescent power dissipation of 72 µW. Measurement results of a 180 nm CMOS test chip prototype show slew rate, gain bandwidth, and open loop gain enhancement. Keywords: class-AB, OTA, current efficiency Classification: Integrated circuits References [1] W. Sansen: in Analog Design Essentials (Springer, US, 2006) 337–362. [2] A. J. Lopez-Martin, et al.:“Power-efficient analog design based on the class AB super source follower,”Int. J. Circuit Theory Appl. 40 (2012) 1143 (DOI: 10.1002/cta.776). [3] M. Yavari: “A new class-AB folded cascode operational amplifier,”IEICE Electron. Express 6(2009) 395 (DOI: 10.1587/elex.6.395). [4] A. Lopez-Martin, et al.:“Low-voltage super class AB CMOS OTA cells with very high slew rate and power efficiency,”IEEE J. Solid-State Circuits 40 (2005) 1068 (DOI: 10.1109/JSSC.2005.845977). [5] C. Garcia-Alberdi, et al.:“Tunable class AB CMOS gm-C filter based on quasi-floating gate techniques,”IEEE Trans. Circuits Syst. I, Reg. Papers 60 (2013) 1300 (DOI: 10.1109/TCSI.2012.2220504). [6] J. A. Galan, et al.:“Super class-AB OTAs with adaptive biasing and dynamic output current scaling,”IEEE Trans. Circuits Syst. I, Reg. Papers 54 (2007) 449 (DOI: 10.1109/TCSI.2006.887639). [7] S. Sutula, et al.:“Variable-mirror amplifier: A new family of process- ©IEICE 2017 DOI: 10.1587/elex.14.20170719 Received July 13, 2017 Accepted July 21, 2017 Publicized August 28, 2017 Copyedited September 10, 2017 1 LETTER IEICE Electronics Express, Vol.14, No.17, 1–5 independent class-AB single-stage OTAs for low-power SC circuit,”IEEE Trans. Circuits Syst. I, Reg. Papers 63 (2016) 1101 (DOI: 10.1109/TCSI.2016. 2577838). [8] M. R. Valero, et al.:“Slew rate enhancement based on use of squaring circuits,” Electron. Lett. 51 (2015) 219 (DOI: 10.1049/el.2014.3975). [9] Y. Kim and S. Lee: “Low power high-gain class-AB OTA with dynamic output current scaling,”IEICE Electron. Express 10 (2013) 20130042 (DOI: 10.1587/ elex.10.20130042). [10] S. Pourashraf, et al.:“Super class AB OTA without open-loop gain degradation based on dynamic cascode biasing,”Int. J. Circuit Theory Appl. 45 (2017) (DOI: 10.1002/cta.2367). [11] A. Torralba, et al.:“Class AB output stage for low voltage CMOS op-amps with accurate quiescent current control,”Electron. Lett. 36 (2000) 1753 (DOI: 10.1049/el:20001247). [12] V. Peluso, et al.:“900 mV differential class AB OTA for switched opamp applications,”Electron. Lett. 33 (1997) 1455 (DOI: 10.1049/el:19970964). [13] J. Ramirez-Angulo, et al.:inAnalog/RF and Mixed-Signal Circuit Systematic Design (Springer, Berlin Heidelberg, 2013) 269–287. 1 Introduction Fig. 1 shows the scheme of conventional current mirror class-A OTA. It has an open loop gain AOL Ai2=2, where Aiis the transistor’s intrinsic gain. Its maximum positive and negative output currents (IoutMAX ) are limited by the total quiescent current (IQ) to a value IoutMAX ¼0:5IQ. Class-AB OTAs [1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11] overcome this limitation and generate IoutMAX >I Q. Super class-AB schemes [4] and [6] have remarkably large output Current Enhancement (CE two decades or higher) factors IoutMAX ¼CE IQ, while suffering from low open loop gain (AOL Ai=2) which is of special concern in deep sub-micron technologies characterized by low Aivalues (Ai<20 V/V). On the other hand, class-AB OTAs with high open loop gain have only modest output current enhancement factors, i.e. Fig. 1. Conventional current mirror class-A OTA. ©IEICE 2017 DOI: 10.1587/elex.14.20170719 Received July 13, 2017 Accepted July 21, 2017 Publicized August 28, 2017 Copyedited September 10, 2017 2 IEICE Electronics Express, Vol.14, No.17, 1–5 in [7] and [8] IoutMAX ¼2:24IQ, and IoutMAX ¼5:55IQrespectively. In this letter, we discuss the implementation and experimental verification of a class-AB OTA that has simultaneously very high current enhancement factor and even higher open loop gain and bandwidth than the conventional class-A OTA of Fig. 1. 2 Proposed scheme The proposed class-AB OTA is shown in Fig. 2. It has a class-AB input stage [12] implemented with Cascoded Flipped Voltage Followers (CFVFs shown in blue color) [13] with an adaptive biased load (Mp, Mcp) [6] and an adaptive biased tail transistor (Mnt’, Mcnt). The class-AB differential pair generates transient currents i1,i2with peak values much higher than Ibias. The utilization of adaptive biasing in the load (Vcpr) and tail transistors (Vcnr) causes magnified replicas i10,i20of i1,i2to appear in the output branch. This leads to an output current that can be much larger than Ibias. In [4] and [6] cascode transistors in the output branches could not be used to achieve high open loop gain because the increasing gate-source voltage (VGS) with very large currents causes output branch mirroring transistors to enter triode mode which limits the output current. In order to mitigate this problem, in the proposed circuit, cascode voltages Vcp0, and Vcn0adapt dynamically to the output current. This is achieved using large time constant RC networks formed by Cbat (∼pFs) and a large resistance RLarge (∼100 kΩ). Under quiescent conditions the PMOS and NMOS cascode voltages have values Vcp0¼Vcp, and Vcn0¼Vcn. For large dynamic currents, variations VX, and VYin nodes X, and Yare transferred to Vcn0and Vcp0 respectively. This provides more headroom for the drain-source voltage Mno, and Mpo and allows simultaneously large output currents and high open loop gain. Fig. 2. Proposed dynamically biased class-AB OTA. ©IEICE 2017 DOI: 10.1587/elex.14.20170719 Received July 13, 2017 Accepted July 21, 2017 Publicized August 28, 2017 Copyedited September 10, 2017 3 IEICE Electronics Express, Vol.14, No.17, 1–5 3 Measurement results A test chip with the proposed circuit and a conventional current mirror class-A OTA were fabricated in 0.18 µm CMOS technology (Fig. 3). The proposed circuits occupied 0.15 m 0.046 m (0.007 mm2) of silicon. The sizes (in µm) of unit NMOS and PMOS transistors were ðW=LÞN¼ð4=0:7Þand ðW=LÞP¼ð16=0:7Þ respectively. Values RLarge ¼100 kΩ,Cbat ¼1pF, CL¼25 pF, VDD ¼0:9V, VSS ¼0:9V, and a bias current Ibias ¼5µA were used for testing purposes. The experimental output waveforms of the proposed and the conventional class-A OTA connected in unity gain configuration are shown in Fig. 4. The input is a 1 MHz square wave with amplitude of 0.8 Vpp. The proposed scheme has an experimental SR ¼43:1V/µs, GB ¼2:65 MHz, and AOL ¼77 dB while the conventional class-A scheme has SR ¼0:44 V/µs, GB ¼1MHz, and AOL ¼71 dB. It can be seen that: a) the SR is improved by a factor 100 and b) the open loop gain and bandwidth of the proposed circuit have values approximately twice as large as the conventional class-A OTA with equal Ibias. The GB,AOL enhancement is expected from the utilization of the class-AB input stage [4] and [6]. The performance of class-AB circuits can be compared using the current enhancement figure of merit FOMCE ¼SR CL=PQwhere PQis the total quiescent power dissipation. It can be seen that the proposed circuit has a higher FOMCE than all OTAs with high open loop gain and high phase margin (∼90°) reported in literature. The performance comparison between experimental results of the proposed OTA and some other references is summarized in Table I. Fig. 3. Micrograph of a test chip including the proposed circuit fabricated in 0.18 µm CMOS technology occupying 0.007 mm2 of silicon. ©IEICE 2017 DOI: 10.1587/elex.14.20170719 Received July 13, 2017 Accepted July 21, 2017 Publicized August 28, 2017 Copyedited September 10, 2017 4 IEICE Electronics Express, Vol.14, No.17, 1–5 4 Conclusion An implementation of a class-AB OTA using a class-AB input stage with CFVFs, and dynamically biased cascode transistors is presented. Compared to the conventional OTA, the proposed scheme shows a very large enhancement factor of 100 in both SR and IoutMAX without degradation in the open loop gain AOL ¼77 dB. Both AOL and GB are approximately a factor two higher than for a conventional current mirror OTA. A fabricated chip in 0.18 µm CMOS technology is used to verify experimentally theoretical predictions. Fig. 4. Experimental results: (a) 1 MHz 0.8 Vpp square wave input signal. (b) Proposed Class-AB OTA output waveform. (c) Conventional class-A OTA output waveform. Table I. The performance comparison between experimental results of the proposed OTA and some other references. Parameters Class-A OTA Fig. 1 [4] 2005 [9] 2013 [7] 2016 [8] 2015 This work Fig. 2 CMOS Technology (µm) 0.18 0.5 0.18 0.18 0.5 0.18 ResultsEx Ex Sim Ex Ex Ex Supply (V) 1.8 2 3 1.8 5 1.8 Ibias (µA) 5 10 - - 25 5 Power (µW) 36 120 750 11900 612.5 72 SR (V/µs) 0.44 89 7.43 74.1 23.2 43.1 FOMCE [(V/µs)·(pF/µW)] 0.3 59.33 0.3 1.25 0.76 15 AOLDC (dB) 71 43 64.1 72 71.8 77 CL(pF) 25 80 30 200 20 25 GB (MHz) 1 0.725 7.64 86.5 6.3 2.65 PM (°) 89 89.5 83 50 82 86 Die Area (mm2) 0.001 0.024 - 0.07 - 0.007 Ex: Experimental results, Sim: Simulation results ©IEICE 2017 DOI: 10.1587/elex.14.20170719 Received July 13, 2017 Accepted July 21, 2017 Publicized August 28, 2017 Copyedited September 10, 2017 5 IEICE Electronics Express, Vol.14, No.17, 1–5