Caracterización de componentes y mitigación de efectos parásitos para filtros EMI compactos

Proyecto Fin de Carrera Ingeniería de Telecomunicación Formato de Publicación de la Escuela Técnica Superior de Ingeniería Autor: F. Javier Payán Somet Tutor: Juan José Murillo Fuentes Dep. Teoría de la Señal y Comunicaciones Escuela Técnica Superior de Ingeniería Universidad de Sevilla Sevilla, 2013 Tesis Doctoral Ingeniería Industrial Caracterización de componentes y mitigación de efectos parásitos para filtros EMI compactos Autor: Pablo González Vizuete Director: Joaquín Bernal Méndez Departamento de Ingeniería Electrónica Escuela Técnica Superior de Ingeniería Universidad de Sevilla Sevilla, Tesis Doctoral Ingeniería Industrial Caracterización de componentes y mitigación de efectos parásitos para filtros EMI compactos Autor: Pablo González Vizuete Director: Joaquín Bernal Méndez Profesor Titular Departamento de Ingeniería Electrónica Escuela Técnica Superior de Ingeniería Universidad de Sevilla Tesis Doctoral: Caracterización de componentes y mitigación de efectos parásitos para filtros EMI compactos Autor: Pablo González Vizuete Director: Joaquín Bernal Méndez El tribunal nombrado para juzgar la Tesis arriba indicada, compuesto por los siguientes doctores: Presidente: Vocales: Secretario: acuerdan otorgarle la calificación de: El Secretario del Tribunal Fecha: A mi gente Acknowledgment Qu iero mostrar mi agradecimiento sincero a Joaquín y a MªÁngeles. En primer lugar, por la oportunidad que me dieron de trabajar en el grupo de investigación, en el que tanto he aprendido profesionalmente y personalmente, y en el que he tenido la ocasión de meterme de lleno en el apasionante mundo de la electrónica. Joaquín con su permanente buen humor le alegra el día a cualquiera, y con su teoría de la relatividad de los problemas humanos te hace recordar que por que algo no salga como uno quiere la gente no te va a señalar con el dedo por la calle. Sin su conocimiento de EMC, y su carácter práctico de abordar los problemas no habría sido posible terminar la tesis, y estaría yo dándole vueltas todavía a cómo se usan las leyes de Maxwell para calcular la corriente que circula por una resistencia. Sin el esfuerzo constante de MªÁngeles por llevar el grupo adelante, el grupo posiblemente no existiría. También quiero agradecerla la confianza y el cariño que me ha mostrado durante todo este tiempo. Con su ejemplo he aprendido también a pulir un poco las aristas de mi carácter crudo y ’realista’. Estas habilidades, sin duda me serán de gran ayuda en mi vida profesional, y a lo mejor hasta algún día las aplico (con moderación) a mi vida personal. Por otro lado, quiero agradecerles a mis compañeros y amigos de trabajo por haber estado conmigo, y haber hecho que en trabajo estuviera como en mi casa. A Carlos, que ha estado cuatro años conmigo, en lo bueno y en lo malo, en el amor y en la enfermedad, en el bar y en el VNA. A Víctor, en la pizarra comiendo Vienas y Bollos y en Arahal comiendo tapitas en general. Al Signore Francesco, que no sale bien parado en la cámara térmica, por mucho baiseps que diga tener. A Álvaro con su cante jondo de Chipiona, con su miedo a la regla verde y sus intentos frustrados de orden, gracias por la paciencia amigo. A Javi cordobés, que aunque su estancia en el grupo haya sido breve, me tiene rallado con dónde vamos a comer los viernes, y con si le habrán robado el coche. También a Jose, tan bueno como persona como con los micros. A Sebas, que sus tres clases magistrales sobre convertidores han sido las mejor aprovechadas de mi vida. Por último, a mi familia y a mis amigos, que son lo más importante del mundo. Pablo González Vizuete Sevilla, 2021 III Notation EMI Electromagnetic Interference EMC Electromagnetic Compatibility LISN Line Impedance Stabilization Network PCB Printed Circuit Board VNA Vector network analyzer AC Alternate current DC Direct current CM Common mode DM Differential mode UDM Unbalanced differential mode OC Open circuit TL Transmission line HF High frequency (in this context, frequencies greater than units of MHz) S21 Transmission coefficient CMC Common mode choke CxLine to line EMI filter capacitor CyLine to ground EMI filter capacitor ESR Equivalent series resistance ESL Equivalent series inductance DCDC DC to DC (referred to power conversion input and output voltage) LC Referred to filter topology with a series inductor and a shunt capacitor XI 1 Introduction and Objectives This manuscript is a compilation of four papers published in scientific international journals [1 – 4] which are hereby presented as Ph.D.Thesis by the author. This document is organized as follows: chapter 1 provides a general introduction to put the whole work in context. Then, chapter 2 presents a summary of the objectives, main results and conclusions obtained in these four papers, which are included in chapters 3 to 6. Detailed explanations about some particular aspects treated in these chapters have been relegated to the appendices A and B. 1.1 Context 1.1.1 Switched mode power converters Power converters are used to adapt an electrical power source to a certain electrical load or network with different input requirements than those of the source. In particular, power conversion based on semiconductors switching operation is present nowadays in many fields of application, and such kind of power converters range from mW to up to hundreds of kW [5]. Switched mode operation of semiconductors is based on driving them in such a manner that their voltage drop in the ’on’ state is very low, e.g. when they feature low power losses when a current flows through them. This operation mode is opposed to linear mode of semiconductors operation, in which there are simultaneously large voltages and currents. In swithed mode power converters, semiconductor switches are either in a low losses ’on’ conduction state, or in an ’off’ state. They only enter the high losses linear mode during the fast transition between ’on’ and ’off’ states (also known as switching). Power converter applications based in linear operation of semiconductors have a very low ratio of output to input power, i.e. they feature very low efficiencies compared to switched mode converters [5]. Many of those power converters are based in the conversion of a DC or low frequency voltages/currents into high frequency switched waveforms, thanks to semiconductor switches that turn on and off at frequencies ranging from tens of kHz to units of MHz. Such high frequency switched waveforms are filtered again by inductive and capacitive 1 2Chapter 1. Introduction and Objectives passives to get a DC or low frequency voltage/current at the output of the converter. The main advange of converting low frequency power to high frequency is that stored energy in passives is small, which allows to use small passives. There are applications in which passives and switches operate at the AC network frequency (e.g. 50 Hz in Europe). However, typically much higher power densities are achieved in converters based in high frequency operation [5]. One of the main drawbacks of switched mode power conversion is the emission of both conducted and radiated electromagnetic noise at high frequencies. The frequency range of those emissions typically goes form a few hundreds of kHz to several hundreds of MHz. However, since those emissions can easily cause electromagnetic compatibility (EMC) issues with surrounding devices, they are in practice limited by mandatory EMC normative [6,7], which may be particularly stringent, for example in aeronautics or space applications [8, 9]. Achieving compliance with EMC normative in these applications is a challenging task not only because EMC normative is strict but also because power density requirements make it difficult to implement mitigation techniques such as shielding, increasing space between components or adding stages to the electromagnetic interference (EMI) filters [7]. The core contribution of this thesis is on advanced techniques to mitigate conducted and radiated emissions in power converters, especially in the range of units and tens of MHz, with low impact on power density of the converter. 1.1.2 Conducted emissions The limitation of conducted emissions in switched mode power conversion has been a subject of interest since their appearence [6]. There are standards that provide limits and measurement methods to facilitate the electromagnetic compatibility with close devices in the same network [8, 10]. In Figure 1.2 we can observe a typical setup to measure the conducted emissions of a certain electrical device. In such tests, a Line Impedance Stabilization Network (LISN) interfaces the power source, and the product under test. On one hand, the LISN filters all the noise coming from the power source, so that the measured conducted emissions come only from the product under test. This has been illustrated in Figure 1.2, where conducted emissions from phase ( IP ) and neutral ( IN ) are the only currents that flow through the LISN 50 Ω termination resistors. The other purpose of LISN is to create a repeatable impedance for conducted emissions. Note that the power network impedance is variable, and this might lead to different measurements on the product under test conducted emissions. The natural trend of semiconductor technology is to develop faster switches, which is inherently related to less switching losses and less time between switches ’on’ and ’off’ states. Such fast swtiching allows to use higher switching frequencies when this is translated into the use of smaller passives. Highest effiencies and power densities feature fast switches technologies, such as Silicum Carbide or Galium Nitride [11 – 13]. However, one of the main drawbacks of fast switches and high switching frequencies is the increase of radio frequency emissions at high frequencies >10MHz [14,15]. In Figure 1.1 we can see an example of how faster turn on and turn off transient associated to fast switches generate higher levels of conducted emissions at high frequencies. 1.2 EMI filters 3 Figure 1.1 Measured common mode conducted emissions in an AC to AC converter implementing Si (blue) and SiC (green) switches. Source [15]. Figure 1.2 Line Impedance Stabilization Network (LISN) for measurement of conducted emissions in neutral ( IN ) and phase ( IP ) due to the product under test operation. Source [7]. 1.2 EMI filters A differential mode (DM) current IDM and a common mode (CM) current ICM can be defined from phase and neutral currents, IPand INin Figure 1.2: ICM =IP+IN 2 IDM =IP−IN 2 (1.1) 4Chapter 1. Introduction and Objectives (a) Schematic of an EMI filter. (b) EMI filter implementation. (c) High frequency model of an EMI filter with paralleled Cxand Cycapacitors. Figure 1.3 Single stage EMI filters. EMI filters are usually required to limit electromagnetic emissions (both conducted and radiated emissions), and they must limit both differential and common mode emissions. They are typically placed close to the device power inlet, and their purpose is to make most of the noise circulate within the device instead of reaching power leads (and thus the LISN). A basic EMI filter has at least the elements shown in Figure 1.3(a). Capacitors Cx 1.3 Objectives of this Thesis 5 offer a low impedance between power lines, so their purpose is to shunt DM currents emissions and thus mitigate the amount that reaches power lines (reduce IDM). Similarly, Cy capacitors offers a low impedance between power lines and ground (reduce ICM ). On the other hand, the purpose of an EMI filter is to offer a high impedance in series with power lines to conducted emissions, which also contributes to contain high frequency currents within the converter. The common mode choke (CMC) inductance offers a high impedance to a current that flows with the same phase through both of its windings (thus reducing ICM ). A current that flows with opposite phase ( IDM ) through the CMC windings also sees a certain impedance due to its leakage inductance, so it also contributes to mitigate the DM currents that reach output power leads [6]. For frequencies greater than units of MHz, the impedance of EMI filter components are determined by parasitic elements which undermine their performance at reducing noise emissions. For example, capacitors become inductive at high frequencies, and the CMC impedance is determined by parasitic capacitances. Also, inductive couplings between components become important in filter response. The high frequency model of an EMI filter with paralleled Cxand Cycapacitors has been represented in Figure 1.3(c). 1.3 Objectives of this Thesis The core idea of this thesis is that electromagnetic emissions of power converters at high frequencies (i.e., above several hundreds of kHz or a few MHz) can only be effectively reduced, without unacceptable penalties in terms of weight and volume of the converter, provided that the impact of high-frequency parasitic effects is modeled and understood. Based in this idea, we present and demonstrate advanced design strategies based upon effective characterization and placement of components. In [1] we focus on capacitors inductive parasitics, and we investigate the use of mutual couplings between capacitors to decrease the negative effect of this parasitic effect. In [2] we propose a simple characterization method for the DM response of CMCs, including the frequency range in which it behaves in a capacitive fashion. This simple characterization technique is aimed to help in component selection to enhance the actual performance of the EMI filter at high frequencies. In [3] we focus on the effect of inductive couplings between the CMC and the capacitors of an EMI filter. We investigate the scope of different filtering strategies aimed to improve the attenuation provided by the EMI filter while preserving its compactness. Finally, in [4] we propose simple variants in the output LC filter of an isolated DCDC topology, which are effective to limit conducted emissions at the converter output, especially at high frequencies. All these contributions are aimed to providing useful techniques to mitigate radio frequency emissions of power converters at frequencies, which is a hot topic due to the trend of using fast devices and high switching frequencies in power converters. 2 Summary of results In this chapter we will summarize the core contributions of this thesis, which will be presented in detail in chapters 3 to 6, which correspond to four papers published in international JCR scientific journals with the PhD student as first author. For each article, in chronological order of publication, we will first provide a detailed reference and quality indicators extracted from PRISMA [16] .Then, we identify the fields of study in which papers fall into and provide a brief description of the methodology that have been followed and the main results and conclusions that have been obtained. Also, the main practical contributions of each work from an engineering point of view are summarized. 2.1 First journal Article: Calculation of Parasitic Self and Mutual Inductances of Thi n Film Capacitors for Power Line Filters Reference and quality indicators of the paper [1]: P. Gonzalez-Vizuete, F. Fico, A. Fernandez-Prieto, M. J. Freire, and J. Bernal Mendez, “Calculation of Parasitic Self and Mutual Inductances of Thin Film Capacitors for Power Line Filters,” IEEE Trans. Power Electron., vol. 34, no. 1, pp. 236–246, 2019. Impact factor (SCIE): 6.373 JCR Rank (ENGINEERING, ELECTRICAL & ELECTRONIC): 22/266 (Q1,T1,D1) Cites: 14 (Google Scholar), 8 (Scopus), 8 (wos). Involved fields of study: •EMI filter design →Thin-film capacitors optimal layout •EMI filter lumped element modelling →Paralelled Thin-film capacitors •Finite element EMI filter simulation • Power converter design → High switching frequency EMI mitigation techniques → EMI filter parasitics mitigation. This paper presents a simple and accurate method for the calculation of both the selfinductance and the mutual inductance between thin-film capacitors, placed in close proximity in EMI filters. 7 14 Chapter 3. Calculation of Parasitic Self and Mutual Inductances of Thin Film Capacitors for Power Line Filters otherwise cause EMI issues or make the equipment non-compliant with the applicable electromagnetic compatibility (EMC) regulation [7]. The performance of thin film capacitors at high frequencies is typically undermined by parasitic effects such as self-inductance and mutual coupling with other components of the filter [17 – 19]. The current trends toward the use of higher switching frequencies in power converters and the existence in most industrial areas of EMC regulations in a wide range of frequencies make it increasingly necessary to develop enhanced models of those EMI filters that account for these parasitic effects, thus allowing virtual prototyping. The underlying idea is to avoid time consuming trial and error processes and to prevent overdesign, which is specially undesirable in applications with stringent requirements in terms of weight and size [20]. The self-inductance of capacitors is, along with the equivalent parallel capacitance of common mode chokes, the most important parasitic effect that determine the actual attenuation of an EMI filter at high frequencies [21 – 25]. For this reason, a great effort has been done in the past to develop techniques for characterizing and reducing the self-inductance of capacitors [18,26 – 29]. In these techniques, parasitic parameters are extracted from measurements of S, Y or Z network parameters of the filter, for which a high frequency lumped element circuit model has been previously proposed. More recently, a new numerical technique oriented towards virtual prototyping of the filter has been presented in [19,30]. This approach makes use of a combination of the partial element equivalent circuit method (PEEC) [31] and the boundary integral method (BIM) to develop a software tool able to predict self and mutual parasitic effects from a 3-D model of the filter, thus accounting for effects as printed circuit board layout and component placement. In this technique, impedance measurements are required for fitting the properties of the PEEC cell used to model the filter capacitors. In this work, we present a simple and accurate technique to analytically calculate the self-inductance of a thin-film capacitor and the mutual inductance between thin-film capacitors placed in close proximity from geometrical parameters. This technique takes in consideration skin and proximity effects to approximate the currents flowing inside the capacitors at high frequencies by strip currents. This hypothesis, which is validated through electromagnetic simulations and measurements, makes it possible to use simple closedform expressions for calculating self and mutual inductances of thin-film capacitors. Since this technique does not require to perform impedance or other electrical measurements, it is suitable for virtual prototyping. This technique also permits to analyze the impact of design strategies that make use of the mutual coupling between capacitors to improve the performance of the filter at high frequencies such as that reported by some of the authors in [32] for shunt-capacitor (SC) filters fabricated with surface mount capacitors. In the present paper we demonstrate the applicability of the technique developed in [32] to thin-film capacitors intended for power line filters and the suitability of the method of calculation of parasitic inductive components of thin-film capacitors presented here to predict the performance of the filter. To do that, we have constructed and measured several test boards mounting thin-film capacitors of different capacitances and sizes and from different manufacturers. The comparison of measured results with results predicted by our method allows us to verify the accuracy of the method and to provide quantitative information about typical improvements that can be provided by smart layout and placement 3.3 Analysis 15 Figure 3.1 Photograph of a thin-film capacitor opened to show the internal foil winding. Figure 3.2 Top, front and side views of a thin-film capacitor. Grey surfaces indicate the foil winding inside the capacitor. The area where currents are expected to flow at high frequencies is highlighted in red. of the capacitors in the filter. 3.3 Analysis 3.3.1 Calculation of self-inductance of capacitors Capacitors using a plastic film are widely employed in power electronic applications because they do not require a given polarization and behave well under high current and voltage conditions. This type of capacitors also presents high reliability and small 16 Chapter 3. Calculation of Parasitic Self and Mutual Inductances of Thin Film Capacitors for Power Line Filters capacitance change with applied voltage. Characteristics as breakdown voltage, maximal operating temperature, relative permittivity and dielectric losses depend on the plastic material used in the film. However, all thin film capacitors share a common internal structure. In fact, they are constructed by coating the plastic films with zinc or aluminum and wrapping these metalized films on a cylindrical insulated base [33,34]. A picture of a real thin film capacitor which has been opened to show its internal structure is shown in Figure 3.1. In general, the problem of calculating the self-inductance of currents that follow a known closed loop can be tackled very efficiently by using the concept of partial inductances, which allows us to calculate the inductance of closed loops from the partial self and mutual inductances ascribed to portions of the loop [35,36]. For a thin-film capacitor, the partial inductance associated with the leads of the capacitor can be easily calculated by using the formula of the partial inductance of a thin wire (A.3) 1 . However, the inductance associated with the currents flowing inside the capacitor poses a problem because the current distribution inside the foil winding at any frequency is not easy to ascertain. Nevertheless at high frequencies, where the capacitor behaves inductively, currents inside the capacitor must be highly determined by skin and proximity effects [37]. Skin and proximity effects are caused by electromagnetic induction and in general their impact on current distribution can be anticipated by following the principle that currents return to their source along the path of lowest impedance, which at high frequency is equivalent to the path of lowest inductance [7]. As a consequence, at high frequencies the presence of the ground plane is expected to force current inside a thin-film capacitor to flow very close to the base of the capacitor because this path minimizes the loop area of the current. For this reason some authors have speculated with the possibility of approximating the current inside the thin-film capacitor with a wire placed at the base of the capacitor [34,38]. Taking into account the above mentioned principle of lowest inductance, a more realistic approximation of the current distribution inside the capacitor would be to consider that it will spread throughout a thin layer at the base of the capacitor. Therefore, a main hypothesis in this work is that at high frequency the self-inductance of the currents flowing inside a capacitor can be approximated by the self-inductance of a thin strip with the length and the width of the internal foil winding that makes up the capacitor (lenght t and width e in Figure 3.2) and placed at a certain height ( l+δ in Figure 3.2) above a ground plane. This simplifying hypothesis allows to calculate this inductance by using approximated formulas available in the literature such as the expressions (A.1) and (A.2) provided in the Appendix section. However, note that this requires to know the parameters e and δ , which refer to internal dimensions of the capacitor and therefore are not easy to measure. We can overcome this difficulty by considering that the width of the plastic walls enclosing the internal foil winding must be one order of magnitude smaller than the width of the foil winding itself. Thus, we can take e=0.8w and δ=0.1h , which allows us to calculate the self-inductance of the capacitor from the data of its external dimensions. Experimental results in section 5.4 demonstrate that these estimations provide a sufficiently accurate prediction of the attenuation provided by different arrangements of thin-film capacitor at frequencies where they behave inductively. 1The presence of the ground plane can be easily accounted for by using the image theory [36]. 3.3 Analysis 17 (a) Parallel arrangement. (b) Anti-parallel arrangement. Figure 3.3 Top view of two different possible arrangements of two thin-film capacitors acting as shunt-capacitor filters along with their corresponding lumped-element circuit model. Signal line in orange. Areas where current is expected to concentrate at the bottom of the capacitors are highlighted in red. Yellow lines indicate equivalent wires employed to calculate mutual inductances. 3.3.2 Calculation of mutual inductance between capacitors A common technique employed to increase the high-frequency attenuation of SC filters is to place two capacitors in parallel. In principle the equivalent inductance of two equal capacitors in parallel will be one half of that of a single capacitor, thus increasing the attenuation at high frequencies in 6dB compared with the case of a single capacitor. However, this simple calculation disregards the impact of mutual inductance between capacitors, which might undermine the expected improvement [32]. Figure 3.3 depicts a top view of two different possible arrangements of two thin-film capacitors that can be used to construct a SC filter with two capacitors electrically connected in parallel. Note that in one case currents in both capacitor flow in the same direction, whereas in the other case currents flow in opposite directions. For this reason, we will refer to these two arrangements as parallel arrangement and anti-parallel arrangement respectively. These two arrangements have different equivalent circuits at high frequency 18 Chapter 3. Calculation of Parasitic Self and Mutual Inductances of Thin Film Capacitors for Power Line Filters (a) Parallel arrangement. (b) Anti-parallel arrangement. Figure 3.4 Surface current density calculated with ANSYS ® HFSS ™ at 50MHz in two solid pieces of aluminum which simulate the internal structure of capacitor C2 in Table 3.1 for the two arrangements of two thin-film capacitors described in Figure 3.3. as shown in Figure 3.3 [32]. A key difference between these two schematics comes from the mutual inductances between capacitors MC , which create opposite effects in both cases. Also, another important difference between these two arrangements is that the trace between the two capacitors will be typically larger in the anti-parallel case, yielding a higher parasitic inductance, Ld . This parasitic inductance can be easily estimated by using for example (A.1) and (A.2). Note that in spite of the small value of Ld , it may have a significant impact in the performance of the filter at high frequencies because it is placed between the two capacitors [32]. To understand the different impact that the two arrangements in Figure 3.3 have on the parasitic inductance of the SC filter it is convenient to analyze the distribution of the currents inside the capacitors in both cases. Proximity effect suggests that currents inside the capacitors in Figure 3.3(a), will tend to separate, whereas currents will approximate to each other in the anti-parallel case in Figure 3.3(b) [39]. To confirm this, we have used the 3.3 Analysis 19 ANSYS ® HFSS ™ 3D finite element electromagnetic solver to calculate the distribution of currents inside two solid blocks of aluminum that resemble the internal structure of the capacitors. The blocks have approximately the same dimensions as the internal foil windings of capacitor C2 in table 3.1 and they are arranged as per the two connections in Figure 3.3 and at a close distance ( s=0.5 mm). Results for the surface current density calculated at 50MHz are shown in Figure 3.4. This figure shows that, due to the effect of the return plane, currents flow at the bottom of the capacitors, as expected from the previous discussion for a single capacitor. Also Figure 3.4 shows that currents in both capacitors tend to separate for the parallel arrangement whereas they have an even stronger tendency to approximate to each other in the anti-parallel case, as expected from proximity effect. To ensure that current distributions in Figure 3.4 are representative of the actual distributions of currents in these capacitors, we have compared the transmission coefficients |S21| calculated with HFSS for those two arrangements with the transmission coefficients measured at high frequencies (above resonance) for capacitor C2 in table 3.1. We have found that the difference is lower than 3dB throughout that high frequency range, which indicates that the parasitic inductances of the parallel and the anti-parallel arrangements are reasonably well approximated with the distribution of currents shown in Figure 3.4. Results in Figure 3.4 reveal that although proximity effect modifies the distribution of the currents inside the capacitors, this do not result in currents completely concentrated at the near or far edges of the base of the internal structure of the capacitors, as it happens for example when analyzing currents in infinitely long parallel conducting strips [39]. To understand this we have to realize that in these structures current enters and exits the capacitor through the connecting points of the leads, which are centered at each end of the internal foil windings. Consequently, although mutual inductance between the capacitors favors high-frequency currents in both capacitors flowing very far or very near of each other (for the parallel and anti-parallel cases respectively) to decrease total inductance, a current path that deviates to much from the shortest (straight) path connecting the enter and exit points would significantly increase the self-inductance of the current loop. The resulting current path is therefore a trade-off between these two driving forces. A model that approximately accounts for the actual current distribution inside the capacitors is suggested in Figure 3.3. In this model, the self-inductance of the current loops are calculated by assuming that currents flow uniformly on a thin strip placed at the bottom of the capacitor whose width is one half of the width e of the internal foil winding. Note that this assumption implies an increase in the self-inductance of each capacitor that will have a detrimental effect in the attenuation provided by the SC filter. For the parallel arrangement in Figure 3.3(a), this effect acts in the same sense as the mutual inductance between capacitors, MC . In fact, the redistribution of the currents is due to this mutual inductance effect. We will see in section 5.4 that because for thin film capacitors the effect of mutual inductance is weak, taking 0.5e as the width of the current strip inside the capacitors and disregarding a further mutual coupling effect between these already modified self-inductances ( MC=0 ) is a sufficiently accurate approximation to account for the effect of mutual coupling between capacitors in a parallel arrangement. The situation is however different for the anti-parallel arrangement in Figure 3.3(b). In this case the mutual coupling tends to decrease the total inductance of the arrangement and 20 Chapter 3. Calculation of Parasitic Self and Mutual Inductances of Thin Film Capacitors for Power Line Filters Table 3.1 Thin-Film capacitors measured and characterized in this work. Code Manufacturer / Part number w×h×t×p(mm) l(mm) Cn(nF) C(nF) R(mΩ)Lc(nH) C1 VISHAY/ BFC233860224 13 ×23 ×31 ×27.53.6 220 190 36 17.3 C2 VISHAY/ BFC233860104 10 ×19.5×26 ×22.53.8 100 88 54 15.5 C3 KEMET/ PHE850ED6100MD18R06L2 10.5×19 ×26 ×22.54.3 100 100 66 16.9 C4 EPCOS/ B32023A3104M 8.5×16.5×26.5×22.53.6 100 90 64 16.2 C5 VISHAY/ BFC233860223 7×13.5×17.5×15 3.4 22 20 80 11.9 C6 VISHAY/ BFC233860222 4×9×10 ×7.52.3 2.2 2.2 170 8.5 therefore MC counteracts the effect of the change of the self-inductance of the capacitors. To account for this effect this parameter must be calculated. For the sake of simplicity, in this work the mutual inductances between capacitors are calculated by using the equivalent mutual inductance between two thin wires, indicated as white straight lines separated by a distance m in Figure 3.3(b), rather than by using flat strips. This approximation is reasonable in general for calculating mutual inductances because the difference between the magnetic fields created by a wire of arbitrary cross section and a thin wire becomes increasingly small as we move away from these current distributions. Note that in the anti-parallel arrangement currents in the two capacitors get very close (see Figure 3.4(b)) and, in fact, a significant amount of current concentrates in the vertical walls between the capacitors. As a consequence we have found that taking m=s+0.1w as the distance between the equivalent thin wires yields in general very accurate results, as we will see in the next section. Also, note that in the anti-parallel arrangement in Figure 3.3(b), currents inside the capacitors are not perpendicular to the current on the trace connecting both capacitors. Consequently there may be some effect associated with mutual inductance between the capacitors and the signal trace ( MT in Figure 3.3(b)). We have checked that for thin-film capacitors this is usually a second-order effect. Nevertheless, this mutual coupling can be approximately estimated by modeling the trace between capacitors with a straight thin wire on the surface of the substrate which is parallel and placed at the same distance of the two capacitors. 3.4 Results To demonstrate the accuracy of the method of calculation of parasitic inductive parameters presented in the previous section and to assess the improvement provided by the anti-parallel arrangement of capacitors proposed also in the previous section we have constructed several test boards for SC filters and EMI Filters with different arrangements of thin-film capacitors of different values, sizes and manufacturers. A list of the capacitors used to fabricated these test boards is provided in Table 3.1. In this table we provide for each capacitor nominal capacitance ( Cn ) and measured capacitance ( C ), as well as measured equivalent series resistance R and the self-inductance Lc calculated following the method explained in section 5.3. Capacitors have been mounted on 1.5mm-thick FR-4 substrate by using the minimum possible length of the leads ( l ) which have been measured in all the cases and listed in Table 3.1. We have measured the transmission coefficients S21 (or gain loss) of these filters by using a Rohde&Schwarz ZND vector network analyzer. 3.4 Results 21 3.4.1 Self-inductance of thin-film capacitors It is well known that the attenuation provided by a SC filter decreases at high frequencies due to the effect of the parasitic inductance of the capacitors [17,25]. This can be clearly observed in Figure 3.5, that shows the transmission coefficients measured for four SC filters constructed with four different capacitors among those listed in Table 3.1. We have used our method to calculate the parasitic inductance of all those capacitors, which are given in Table 3.1. By using these parameters and the series RLC circuit model of the capacitors we have calculated the |S21| curves depicted in Figure 3.5. The excellent agreement found in all the cases between calculated and measured curves at frequencies above resonance confirms the accuracy of the calculated parasitic inductances for thin-film capacitors within a wide range of values and sizes of the capacitors. The SC filters analyzed in this section have been constructed keeping the leads of the capacitors as short as possible to minimize parasitic self-inductance of the capacitors. To facilitate welding, in our designs the active lead of each capacitor is connected to the trace through a VIA, which slightly increases the self-inductance of the capacitor. We have taken this into account in our calculations by adding the length of this connection to the length of the lead of the capacitor. In our case this increases the self-inductance of each capacitor in ∼ 1.4nH. This correction can be ignored for most thin-film capacitors. However, it is worth mentioning that for small capacitors, such as capacitor C6 in Table 3.1, considering the inductance of the connection can contribute to increase the accuracy of the results. As a final remark regarding this experiment it is also interesting to point out that to obtain the calculated |S21| curves in Figure 3.5 we have previously measured the actual capacitance of the capacitors by using a LCR meter 2 ) . We have also calculated the equivalent series resistance (R in Table 3.1) of the capacitors from the minimum of the measured |S21| . However, note that the response of the SC filters at frequencies above resonance is determined solely by the parasitic inductance, which we have calculated by using the method proposed here. 3.4.2 Mutual inductance between two thin-film capacitors To investigate the impact of mutual coupling in the high-frequency performance of two thin-film capacitors, we have constructed SC filters by using both the parallel and the anti-parallel arrangements shown in Figure 3.3 for all the capacitors listed in Table 3.1. We have compared the transmission coefficients of these filters with those of the corresponding SC filter with only one capacitor (single case). As an example, Figure 3.6 depicts the |S21| curves measured for the single case and for the parallel and the anti-parallel arrangements for the capacitor C4 in Table 3.1. These curves show that the anti-parallel arrangement outperforms the single case at high frequencies by 12 dB whereas the parallel arrangement only provides an extra 5dB of attenuation with respect to the single case. To summarize the results obtained for all the capacitors, in Table 3.2 we provide for each type of capacitor the difference between the transmission coefficient measured at a high frequency in the single case ( |SS 21| ) and the corresponding transmission coefficient in the 2We have used an Atlas LCR40 model from Peak Electronic Design Ltd 22 Chapter 3. Calculation of Parasitic Self and Mutual Inductances of Thin Film Capacitors for Power Line Filters Figure 3.5 Measured and calculated transmission coefficients of four different SC filters mounting a single thin-film capacitor from those listed in Table 3.1. Table 3.2 Increase of the attenuation measured (decibels) at the indicated frequency of a SC filter when comparing a filter with one capacitor (Table 3.1) with filters mounting two capacitors of the same type in the two arrangements in Figure 3.3. f(MHz) |SP 21 −SS 21| |SA 21 −SS 21| C1 10 5.4 12.2 C2 20 5.4 11.6 C3 20 5.2 10.7 C4 20 5.1 12.1 C5 40 4.9 10.6 C6 70 4.6 12.0 parallel ( |SP 21| ) and the anti-parallel ( |SA 21| ) arrangements measured at the same frequency 3 . Data in that table reveals that the increase of attenuation attained by placing two capacitors 3 This frequency is indicated in the table for each SC filter and it is above the frequency of resonance of the corresponding filter. Note that since the difference between the transmission coefficients remains constant throughout the range of frequencies above resonance the particular value of the frequency chosen is not actually relevant. 3.4 Results 23 Figure 3.6 Measured and calculated transmission coefficients of a SC filter mounting one capacitor (C4 in Table 3.1) compared with the use of two capacitors of the same type in the two arrangements of Figure 3.3. Photographs of the three filters are inserted in the figure. Table 3.3 Calculated parasitic self and mutual inductances of a pair of capacitors of the same type (Table 3.1) when mounted as SC filters both in the parallel and in the anti-parallel arrangements shown in Figure 3.3. Parallel Anti-parallel Code Lc(nH) Ld(nH) Mc(nH) Ld(nH) Mt(nH) C1 20.8 3.35 8.41 7.83 2.41 C2 18.9 2.70 7.15 6.40 1.76 C3 19.9 2.83 7.34 6.45 1.81 C4 18.7 2.32 7.35 6.23 2.11 C5 13.9 1.88 4.59 4.29 1.60 C6 9.06 1.11 2.11 2.58 1.15 in a parallel arrangement is in all the cases slightly lower than the 6dB expected for two ideally uncoupled capacitors in parallel. On the contrary, Table 3.2 also shows that the antiparallel arrangement systematically provides a much better improvement in attenuation at high frequencies (between 10.6 and 12.2 dB), i.e., approximately 6dB above the expected 30 Chapter 3. Calculation of Parasitic Self and Mutual Inductances of Thin Film Capacitors for Power Line Filters (a) Layout of filter in Figure 3.10(a): parallel capacitors. (b) Layout of filter in Figure 3.10(b): anti-parallel capacitors. Figure 3.11 Layout of the EMI filters with capacitors in the parallel and anti-parallel arrangements shown in Figure 3.10. Traces on the top plane are highlighted in red. Capacitors Cy in both filters correspond to capacitor C5 in Table 3.1. Capacitors Cx in both filters are 220nF VISHAY/BFC2-339-20224. These capacitors have the same dimensions as Cy capacitors and therefore inductive parameters will be the same. The common mode choke (CMC) mounted in both filters is a 2.2mH-WÜRTH ELEKTRONIK 744824622. The high frequency circuit model of this common mode choke has been obtained following the approach in [24] and incorporated to the circuit model of the filter, which is shown in Figure 3.12. We have used the approach described in section 5.3 to calculate the self-inductance of the capacitors and also the mutual couplings between capacitors and between the capacitors and the signal traces for the anti-parallel case. The complete set of parameters of the circuit model are given in Table 3.6. Figure 3.13(a) compares the attenuation coefficient for the CM of both EMI filters. It also compares measured with calculated results. Note that filter with anti-parallel coupling outperforms the filter with parallel coupling by approximately 10dB at high frequencies. It must be highlighted that this improvement is obtained with no increase of the cost, weight or the space required by the filter. Also, note that measured and calculated curves exhibit an excellent agreement, which demonstrates that the effect of the mutual coupling between the Y-capacitors accounts for the better performance of the filter with anti-parallel 3.4 Results 31 Figure 3.12 Lumped-element circuit model of the EMI filters in Figure 3.10. coupling (X-capacitors are ineffective for CM signals). Also, this confirms the accuracy of the mutual and self-inductances calculated with our method. Figure 3.13(b) compares the attenuation coefficients of both EMI filters but for a DM signal. Measured results depicted in that figure reveal that also in this case the antiparallel arrangement of the capacitors provides an advantage in terms of attenuation at high frequencies (improvements between a few dB and 15dB above 7MHz). However, |SDD21]| curves calculated with the circuit model of Figure 3.12 and the parameters in Table 3.6 do not agree well with measured results at high frequencies. This makes a stark contrast with the CM case in Figure 3.13(a), where concordance between measured and calculated results is much better. The difference observed in the DM case is due to the effect of mutual coupling between the CMC and the capacitors, which is a much more important effect for a DM signal than for a CM signal [24, 25]. To improve calculated results for the attenuation of DM signals in the EMI filter the effect of mutual coupling between the CMC and the capacitors should be modeled and included in the circuit model in Figure 3.12. However, this is out of the scope of this work. An interesting conclusion that can be drawn from the previous analysis is that the improvement offered by the anti-parallel arrangement of the capacitors in the DM case cannot be attributed to the effect of the mutual coupling between the capacitors but to the fact that the effect of mutual coupling of the CMC with the capacitors partially cancels out in each pair of coupled capacitors due to their anti-parallel orientation. This effect, which demonstrates an additional advantage of the anti-parallel arrangement of capacitors (namely, higher immunity to external coupling) is similar to a certain extent to the effect that explains the immunity provided by a twisted cable against magnetic coupling. 32 Chapter 3. Calculation of Parasitic Self and Mutual Inductances of Thin Film Capacitors for Power Line Filters 3.5 Conclusion This work presents two main contributions. First, we hace introduced a technique for estimating parasitic self-inductance of thin film capacitors and mutual inductance between thin film capacitors placed in close proximity. From a careful consideration of the impact of proximity effect, which is fully developed at the frequencies where these capacitors behave inductively, we have constructed a model of the currents flowing inside the capacitors that makes it possible to readily calculate these parameters from formulas available in the literature. The second main contribution of this work comes also from the analysis of the impact of the proximity effect. We have shown that due to proximity effect the mutual magnetic coupling between thin-film capacitors in an anti-parallel arrangement, i.e. with currents flowing in opposite direction, is typically much higher than mutual coupling for the equivalent parallel arrangement. We have demonstrated that consequently a smart arrangement of two or more thin-film capacitors makes it possible to significantly decrease their equivalent parasitic inductance, thus increasing the attenuation of a filter at high frequencies. It is very important to note that this can be achieved with no increase of the cost, weight or space required by the filter. We have constructed several test boards with different arrangements of capacitors to demonstrate that the attenuation provided by these filters at high frequencies, which is determined by parasitic inductive effects, can be predicted with the simple technique presented in this work. The technique presented here to calculate the parasitic parameters of thin-film capacitors can be very useful for virtual prototyping and computer aided design. Also, the anti-parallel arrangements of capacitors proposed here can help to improve performance of EMI filters at high frequencies. This can be of great interest specially in those applications with tight constraints in terms of space, volume and weight of the filters. We have developed a computer code that makes use of the method proposed in this work to calculate the parasitic self and mutual inductances of SC filters constructed with one, two or three thin-film capacitor placed in close proximity. This code is available at [40]. 3.5 Conclusion 33 (a) Common mode. (b) Differential mode. Figure 3.13 Transmission coefficients measured for the filters in Figure 3.10 for both common mode and differential mode excitations. 4 Simple Setup for Measuring the Response to Differential Mode Noise of Common Mode Chokes Abstract This work presents a technique to measure the attenuation of differential mode noise provided by common mode chokes. The proposed setup is a simpler alternative to the balanced setup commonly employed to that end, and its main advantage is that it avoids the use of auxiliary circuits (baluns). We make use of a modal analysis of a high-frequency circuit model of the common mode choke to identify the natural modes actually excited both in the standard balanced setup and in the simpler alternative setup proposed here. This analysis demonstrates that both setups are equivalent at low frequencies and makes it possible to identify the key differences between them at high frequencies. To analyze the scope and interest of the proposed measurement technique we have measured several commercial common mode chokes and we have thoroughly studied the sensitivity of the measurements taken with the proposed setup to electric and magnetic couplings. We have found that the proposed setup can be useful for quick assessment of the attenuation provided by a common mode choke for differential mode noise in a frequency range that encompasses the frequencies where most electromagnetic compatibility regulations impose limits to the conducted emissions of electronic equipment. 4.1 Introduction The control of conducted emissions of electronic devices is an increasingly critical topic due to the trends toward the use of higher switching frequencies in power converters [30]. To mitigate conducted emissions, power line electromagnetic interference (EMI) filters are commonly used. However, at frequencies ranging from several hundred kilohertz to a 35 36 Chapter 4. Simple Setup for Measuring the Response to Differential Mode Noise of Common Mode Chokes few tens of megahertz the performance of EMI filters is typically undermined by parasitic effects such as parasitic parallel capacitances between windings in inductors and parasitic series inductances of capacitors [7,17,25,41]. Therefore, characterizing the response of these components at those high frequencies is becoming increasingly important to reduce design time, cost and size of the filter. Common mode chokes (CMCs), made up of a pair of tightly coupled inductors, are key components of EMI filters primarily intended to limit common mode (CM) noise [7,41]. However, CMCs typically exhibit an inductive response to differential mode (DM) noise (leakage inductance) which has a significant impact on the attenuation that the EMI filter provides to differential mode (DM) noise [7]. The reason is that the leakage inductance provides a 40dB/dec roll-off above its frequency of resonance with capacitors that typically are placed between power lines in the EMI filter to attenuate DM noise (Cx capacitors). This resonance typically occurs at tens or a few hundreds of kilohertz. At even higher frequencies (up to tens or a few hundreds of megahertz) leakage inductance no longer determines the DM attenuation of the CMC, which is instead governed by parasitic capacitive effects [42]. In this context, a method to directly measure and evaluate the actual frequency-dependent insertion loss provided by a CMC for DM noise would be very useful to estimate its suitability for a particular EMI filter. A first option available to analyze the DM response of a CMC is to perform a full characterization of the device in a broad frequency range, obtaining an equivalent circuit which would make it possible to estimate the response of the CMC to a DM excitation by simulation as an additional task to perform after the characterization process is complete. Within this category of full characterization methods, several methods have been reported to obtain equivalent circuits for transformers and coupled coils [43 – 47]. Some of these methods have been particularized or directly conceived to be applied to CMCs [22,42,48]. The main drawback of these methods is that they often involve impedance measurements for different connections of the CMC and that they require a post-processing of the obtained data. Moreover, compensation is often required to perform these impedance measurements. Therefore, these methods are not the most appropriate option when a quick assessment of the DM response of a CMC is required. A more straightforward alternative for evaluating the attenuation of DM signals provided by a CMC is to directly measure it. Techniques to measure the response of a four-port components such as CMCs to CM and DM excitations are adequately described in different standards, mostly based upon CISPR recommendations [49]. However, while measuring the CM attenuation of a CMC is fairly simple, the measurement of the insertion loss for a DM excitation requires the use of either a four-port vector network analyzer (VNA) or a balanced circuit that includes 180 ◦ splitters (baluns) [50]. Four-port VNAs are expensive and consequently may well not to be available. Baluns are much more affordable and common devices. However, its effect should be carefully assessed and taken into account because they may introduce some losses and, more importantly, they have a limited bandwidth [50]. Consequently, the use of these ancillary circuits complicates the setup and the measurement process. In this context, the availability of a simpler measurement technique that allows evaluation of the DM attenuation provided by a CMC would greatly facilitate the processes of design and test of EMI filters. In response to that need, in this work we present a simple unbalanced measurement 4.2 Analysis 37 setup that can be used to quickly evaluate the attenuation that a CMC provides against DM noise. We perform a thorough analysis of this unbalanced setup which shows that possible sensibility of the unbalanced setup to external couplings might be a source of measurement errors. To determine whether this represent a problem in practice we systematically compare measurements performed with the unbalanced setup with those provided by the alternative balanced setup with the aim of clearly determining the validity, scope and limitations of the proposed setup. This paper is organized as follows: in Section 5.3 we present a general analysis of the problem. In Section 4.2.1 we make use of a modal analysis of a high-frequency circuit model of a CMC considered to be a four-port network to obtain closed-form expressions for the transmission coefficients (and their corresponding frequencies of resonance) corresponding to both the standard balanced setup and the proposed unbalanced setup that can be used to assess the DM response of a CMC. The aim is to analyze the differences between both setups, and to identify the approximations under which both measurement methods provide similar results. Sections 4.2.2 and 4.2.3 present analysis of the effect of electric and magnetic couplings on the measurements performed with the balanced and unbalanced setups, with a focus on situations where these effects may arise in practice. In Section 5.4 we present results for several commercial CMCs to validate the analysis presented in Section 5.3. Also, in that section the actual sensitivity of both balanced and unbalanced setups to the effects of electric and magnetic couplings are experimentally studied. Finally, conclusions and a discussion about the scope of the method are provided in Section 5.5. 4.2 Analysis Figure 4.1 shows a simplified representation of a CMC along with a lumped-element circuit model of the CMC. As shown in Figure 4.1a, a CMC is made up of two equal magnetically coupled windings. In [51] it has been demonstrated that a CMC can be conveniently modeled in a sufficiently broad frequency range by using a lumped-elements circuit with two blocks, each one containing two perfectly coupled inductances as shown in Figure 4.1b. The first block in that figure (CM block) only affects the CM noise, while the second block (DM block) contains inductors with opposite (perfect) coupling and therefore it only affects DM signals. In that circuit model parasitic intra-winding capacitances ( Ct ) and inter-winding capacitances ( Cw ) have been added to account for the response of the CMC throughout a sufficiently broad frequency range [51,52]. Also, losses within the magnetic material are accounted for in that model by resistors RCM and RDM placed in parallel with the coupled inductors. Finally, capacitances to ground, Cg , have been included in the circuit model to consider possible electric coupling to nearby metallic surfaces, e.g., the ground plane on a printed circuit board (PCB). 38 Chapter 4. Simple Setup for Measuring the Response to Differential Mode Noise of Common Mode Chokes 2 4 3 1 (a) Common mode choke. 1 2 CM Block DM Block (L+M)/2 Ct RCM (L+M)/2 Ct RCM k=1 R 3 4 (L-M)/2 Ct DM (L-M)/2 Ct RDM k=-1 CwCw CgCg Cg Cg (b) Equivalent circuit of the CMC with CM and DM blocks. Figure 4.1 Representation and circuit model of a common mode choke made up of two equal coupled windings with self-inductance Land mutual inductance M. 4.2.1 Modal Analysis of the CMC The circuit in Figure 4.1b can be considered to be a four-port network and it can be characterized by a 4 × 4 admittance matrix [Y] . A modal analysis can be carried out by calculating the voltage eigenvectors (modes) that diagonalize [Y] , as explained in [51]. In that work, it has been shown that this analysis yields four independent (uncoupled) modes, which are referred to as C, V, H and D modes. In general, for a given excitation of the CMC, its response is always made up of a superposition of the responses of one or more of those natural modes. The equivalent circuits of these four modes are represented in Figure 4.2. In that figure we also represent the normalized excitation at the four ports of the CMC that corresponds to each mode. Please note that CM and DM excitation of the CMC appear as H and D natural modes of the equivalent circuit of the CMC (Figure 4.2c,d). As for the other two modes, mode C in Figure 4.2a corresponds to applying a common voltage to the four ports of the CMC, while mode V in Figure 4.2b is obtained by applying a difference of voltage between the two windings of the CMC. 4.2 Analysis 39 IC + - V C 1 IC + - V C 3 IC + - V C Cg 2 IC + - V C 4 +1 +1 +1 +1 Cg Cg Cg (a) Mode C IV + - V V 1 IV + - V V 3 IV + - V V 2 IV + - V V 4 +1 -1 +1 -1 2C +Cg w2C +Cg w 2C +Cg w 2C +Cg w (b) Mode V LCM/2 IH + - V H RCM/2 1 IH + - V D 3 IH + - V H 2 IH + - V H 4 +1 -1 -1 +1 LCM/2 LCM/2 LCM/2 RCM/2 RCM/2 RCM/2 2Ct+Cg2Ct+Cg 2Ct+Cg2Ct+Cg (c) Mode H ID + - V D 1 ID + - V D 3 ID + - V D 2 ID + - V D 4 +1 +1 -1 -1 /2 LDM/2 RDM 2(Ct+Cw)+Cg /2 LDM/2 RDM 2(Ct+Cw)+Cg /2 LDM/2 RDM 2(Ct+Cw)+Cg 2(Ct+Cw)+Cg /2 LDM/2 RDM (d) Mode D Figure 4.2 Equivalent circuits of the modes obtained for the high-frequency circuit of the CMC in Figure 4.1b. Normalized voltages at the four terminals of the CMC are indicated for each mode. In Figure 4.2 it can be seen that the admittances of the four modes of the CMC are either a capacitive admittance (modes C and V) or the admittance of a resistor, an inductor and a capacitor connected in parallel (parallel RLC circuit), where the inductive component is proportional to LCM =L+M for the CM (H mode) and to LDM =L−M (the leakage inductance) for the DM (D mode). The admittances of the four modes of the CMC can be written as follows: YC=jωCg.(4.1) YV=jω(2Cw+Cg).(4.2) YH=jω(2Ct+Cg)+ 2 jωLCM +2 RCM .(4.3) YD=jω(2Ct+2Cw+Cg) + 2 jωLDM +2 RDM .(4.4) The modal analysis outlined above allows performance of a very efficient analysis of the measurement setups that can be used to characterize the DM response of CMCs. The idea is to express the transmission coefficients corresponding to these measurement setups in terms of the admittances of the natural modes of the CMC to determine to what extent those setups actually excite a pure DM (as intended) and also to assess the impact on measurements of the parasitic effects incorporated to the equivalent circuit of the CMC. The measurement setup usually required to characterize the DM response of a CMC is 46 Chapter 4. Simple Setup for Measuring the Response to Differential Mode Noise of Common Mode Chokes used an alternative setup, referred to as Open-Circuit (OC) setup, which is shown in Figure 4.7. This setup was proposed in [51] to characterize CMCs. The main difference between OC setup and UDM is that since the OC setup is actually used for obtaining a complete circuit model of the CMC and it is not conceived as a measurement method to characterize its DM response, in the OC setup both the CM (H) and DM (D) modes of the CMC are simultaneously excited. An expression for the transmission coefficient of the CMC in the OC setup, SOC 21 in terms of YH and YD is given in Table 4.1 [51]. From this expression, it can be easily demonstrated that SOC 21 always presents two frequencies of resonance: one related to LCM and another one at a higher frequency associated with LDM which is given in Table 4.1 as fOC . As a consequence of this double resonance, the OC setup does not allow quick measurement of the response of a CMC to a purely DM signal throughout the entire range of frequencies of interest. However, since the expression and physical meaning of fOC has been previously studied in [51], we will use it here to validate our analysis of the UDM setup as explained below. Table 4.2 Parameters extracted for the equivalent circuit of Figure 4.1b for several commercial common mode chokes. Manufacturer and Part Number L L L(mH) L L LCM (mH) L L LDM (uH) C C Cw w w(pF) C C Ct t t(pF) R R RCM(kΩ Ω Ω)R R RDM(kΩ Ω Ω) WÜRTH ELEKT. 744824622 2.2 4.94 4.7 4.2 6.8 17.2 6.5 WÜRTH ELEKT. 744824310 10 26.7 33.6 4.7 18.3 118 16.6 WÜRTH ELEKT. 744824220 20 54.1 57.6 10.7 20.2 203 22.2 WÜRTH ELEKT. 7448011008 8.0 6.90 6.5 0.86 2.7 22.1 8.1 MURATA PLA10AN2230R4D2B 22 71.3 173 1.8 2.9 73.9 33.0 KEMET SC-02-30G 3.0 7.40 5.8 1.4 2.8 34.3 16.7 KEMET SCF20-05-1100 11 13.4 5.1 8.6 7.2 15.4 7.9 By comparing the frequencies of resonance in Table 4.1 it is apparent that for a given CMC we must have fUDM <fOC <fDM . We will use here this fact to verify the accuracy of our circuit model and to check the expressions for the transmission coefficients of the DM and UDM setups , SDM 21 and SUDM 21 , presented in Table 4.1. Figure 4.8 shows |SDM 21 | , |SUDM 21 | and |SOC 21 | measured for the CMC listed as WÜRTH ELEKTRONIK 744824622 (2.2 mH) in Table 4.2. It can be observed that each one of these curves present a resonance dip related to differential excitation of the CMC, as expected. Also, note that these frequencies of resonance are different for the three setups. In fact, resonance occurs first for the UDM setup, then for the OC setup (second resonance) and finally, for the DM, i.e., fUDM <fOC <fDM . These results are consistent with our previous analysis. Similar results are obtained for all the CMCs in Table 4.2. An additional example is represented in Figure 4.9 for another CMC, identified in the caption of the figure and listed in Table 4.2. 4.3 Results 47 L L TG SA R V TG R 1 2 3 4 Figure 4.7 Open-circuit (OC) setup proposed in [51] for characterizing CMCs. 4.2, using the setups in Figures 4.3 and 4.7 Figure 4.8 Magnitude |S21| for the CMC listed as Würth Elecktronik 744824622 (2.2 mH) in Table. To further ensure consistency of the measured curves with our theoretical analysis, we have used an advanced search algorithm based upon genetic algorithms (GA) [58] to find a set of values for the components of the circuit in Figure 4.1b that allow us to simultaneously fit the measured SOC 21 and SDM 21 curves. Parameters obtained for all the CMCs analyzed here are given in Table 4.2. Then, we have used these circuit parameters to calculate |SUDM 21 | using the expression given in Table 4.1. These curves are represented in Figures 4.8 and 4.9 as dashed lines, and labelled as calculated results. A good agreement between measured and calculated results can be observed in these graphs. Similar results are obtained for all the CMCs in Table 4.2. This permits us to ensure that the high-frequency circuit model in Figure 4.1b is reasonably accurate within the range of frequencies where most EMC regulations impose limits to conducted emissions [10,59,60]. 48 Chapter 4. Simple Setup for Measuring the Response to Differential Mode Noise of Common Mode Chokes Figure 4.9 Magnitude |S21| for the CMC listed as KEMET SC-02-30G (3 mH) in Table 4.2, using the setups in Figures 4.3 and 4.7. It is worth pointing out that in the measurements performed in this section external magnetic or electric couplings have been carefully avoided by keeping the CMC under test far from metallic surfaces (a distance greater than the size of the CMC is typically enough). This is important because the expression for SOC 21 in Table 4.1, such as that of SUDM 21 Equation (4.6), assumes that parasitic capacitances to ground can be disregarded, i.e., YCYV,YH,YD . The effect on measurements of electric coupling with nearby metallic surfaces will be analyzed in the next subsection. 4.3.2 Effect of Capacitive Couplings in a PCB The analysis presented in Section 4.2.2 shows that when a CMC is mounted on a PCB (a situation that may easily arise in practice), the parasitic capacitances introduced by the traces connected to the terminals of the CMC might alter the measurements of SUDM 21 , thus rendering misleading results if the aim is to characterize the CMC as a standalone component. In this section, we will analyze the actual impact of this effect by comparing measured SUDM 21 for an isolated CMC with results obtained when the CMC is mounted on a PCB representative of those usually employed to fabricate EMI filters. Figure 4.10 shows a CMC mounted on a PCB fabricated with a 1.5 mm-thick FR4 substrate. Signal traces (not visible in Figure 4.10 because the CMC is mounted on the side of the return plane) are 4mm-width × 60mm-long strips connecting the CMC pins to the BNC connectors. These signal traces, along with the BNC connectors, add an extra parasitic capacitance between the four ports of the CMC and the return plane (RP). We have measured this parasitic capacitance, obtaining a value of Cr=17.5pF. As a first step, we have checked that the fact that the CMC is mounted on a PCB has a negligible effect on the measurements of |SDM 21 | , as expected from the analysis in Section 5.3. This robustness of SDM 21 measurements against external electric couplings comes from the balanced nature of this setup, and represents an advantage of this measurement 4.3 Results 49 technique. On the contrary, and according to the analysis in Section 4.2.2, the measure of |SUDM 21 | could be affected by the parasitic capacitances appearing at the terminals of the CMC when it is mounted on a PCB with a RP. To study the actual impact of this effect in a practical case, Figure 4.11 shows |SUDM 21 | measured for the CMC listed as WÜRTH ELEKTRONIK 744824220 (20mH) in Table 4.2 in three different situations: when CMC is isolated (no magnetic or electric coupling with nearby conducting surfaces), when CMC is mounted in the PCB but the RP is not grounded (schematic in Figure 4.4) and finally, when the CMC is mounted in the PCB and the RP is grounded (schematic in Figure 4.5). Curves in Figure 4.11 show that the response of the CMC at low frequencies (well below resonance) is the same for these three situations. However, Figure 4.11 also reveals that at high frequencies there exists a shift in the frequency of resonance of SUDM 21 . Compared to the isolated case, the frequency of resonance is slightly lower when the RP is not grounded and slightly higher when the RP is grounded. These results are consistent with the analysis presented in Section 4.2.2. We have obtained similar results for all the CMCs in Table 4.2. Figure 4.10 A 2.2mH CMC, listed in Table 4.2 as WÜRTH ELEKTRONIK 744824622, mounted on a PCB fabricated to check the impact on |SUDM 21 | of the capacitive coupling of the signal traces to the return plane. 50 Chapter 4. Simple Setup for Measuring the Response to Differential Mode Noise of Common Mode Chokes Figure 4.11 Measured and calculated |SUDM 21 | curves for the CMC listed as WÜRTH ELEKTRONIK 744824220 (20mH) in Table 4.2. We compare curves for three cases: standalone CMC, CMC mounted on a PCB with a floating return plane and CMC mounted on a PCB whose return plane is grounded (G label). To analyze this effect in more detail, and also to check the explanation provided inSsection 4.2.2, we have measured the frequencies of resonance of three different CMCs (among those in Table 4.2) when measured in the three different situations described above. In Table 4.3 we compare the frequency of resonance measured with the CMC isolated with that obtained when the CMC is placed on a PCB with an ungrounded RP. Those results show that the effect of the presence of the isolated RP is to decrease the frequency of resonance of SUDM 21 by an amount that goes from 10% to 20%. Table 4.3 also includes for each CMC the frequency of resonance calculated by using the expression of fUDM given in Table 4.1, where Ct and Cw have been modified to C0 t=Ct+Cr/2 and C0 w=Cw+Cr/4 in accordance with the results of the analysis presented in Section 4.2.2. The rest of the parameters of the model of each CMC have been taken from Table 4.2. Results in Table 4.3 show that the calculated frequency of resonance agrees reasonably well with the measured one, with typical discrepancies around 5%. This allows us to conclude that the decrease of the frequency of resonance of SUDM 21 observed when the CMC is mounted on a PCB with an isolated RP is mainly caused by the parasitic capacitances between the traces and the isolated return plane of the PCB. 4.3 Results 51 Table 4.3 Measured frequencies of resonance of SUDM 21 for three CMCs when isolated and when mounted on a PCB with an ungrounded return plane. Also, calculated fUDM for the latter case. f f fUDM (MHz) CMC Isolated CMC on Ungrounded PCB CMC Part Number Measured Measured Calculated WE 744824622 16.9 13.6 12.8 WE 744824310 4.77 4.30 4.07 WE 744824220 3.02 2.65 2.74 Table 4.4 compares the frequency of resonance of SUDM 21 measured when the CMC is isolated with that measured when the CMC is mounted on a grounded PCB for the same three CMCs listed in Table 4.3. Results show that the grounded RP causes the frequency of resonance to increase in all the cases, as expected. This increase is up to 35 % for the WE 2.2mH CMC. Frequencies of resonance f0 UDM calculated by using (4.8) are also included in Table 4.4. The good agreement found in general between calculated and measured results confirms that the shift of the frequency of resonance of SUDM 21 is caused by the presence of the grounded RP and that this shift can be approximately predicted by using Equation (4.8). Table 4.4 Measured frequencies of resonance of SUDM 21 for three CMCs when isolated and when mounted on a PCB with a grounded return plane. Also, calculated fUDM for the latter case. f f fUDM (MHz) CMC Isolated CMC on Grounded PCB CMC Part Number Measured Measured Calculated WE 744824622 16.9 21.7 22.8 WE 744824310 4.77 5.63 5.64 WE 744824220 3.02 3.40 3.72 Summing up, results in this section show that when measured in the UDM setup, the capacitance between the signal traces and the RP of the PCB can modify the response of the CMC at high frequencies. Therefore, when accurate results are required, measuring a CMC mounted on a PCB with the UDM setup should be avoided unless the effect of the parasitic capacitances of the signal traces to the RP is accounted for. Another interesting conclusion that can be obtained from these results refers to the impact of magnetic coupling. Figure 4.11 shows that at low frequencies the response of the standalone CMC coincides with those measured when the CMC is mounted on a PCB. Therefore, we can conclude that at low frequencies (i.e., well below resonance), the RP has no significant effect on LDM . This is because the RP is not sufficiently close to the windings of the CMC. Situations where magnetic coupling with external metallic surfaces may have an impact on the measurements of SUDM 21 (and SDM 21 ) will be analyzed in the next 52 Chapter 4. Simple Setup for Measuring the Response to Differential Mode Noise of Common Mode Chokes subsection. 4.3.3 Effect of Magnetic Coupling to Nearby Conducting Surfaces The aim of this section is to study the sensitivity of the measurements of SDM 21 and SUDM 21 to the effect of magnetic coupling to nearby conducting surfaces (CS). We have verified for all the CMCs in Table 4.2 that the measurements of SDM 21 and SUDM 21 are altered by the presence of an isolated (i.e., not necessarily grounded) copper plate placed very close to the top of the CMC. This situation is representative of that that may arise in practice when the CMC of an EMI filter is placed very close to the metallic enclosure of the filter. We have verified that this effect is noticeable only if the CS is very close to the windings (in general, less than 1mm apart). In fact, we have checked that the effect of magnetic coupling is very weak when the CS is placed beneath (instead of on top) of the CMC, because in this case the leads and the plastic structure that typically supports the CMC keep the CS sufficiently far from the windings of the CMC to prevent a significant magnetic coupling. This is consistent with results for CMCs mounted on a PCB presented in the previous section, where we have seen that the effect of the return plane of the PCB on the leakage inductance of the CMC, LDM, is negligible. As an example to show the effect of magnetic coupling on the DM response of CMCs, we represent in Figure 4.12 the measured |SUDM 21 | and |SDM 21 | with and without the presence of a CS for the 10 mH CMC listed as WÜRTH ELEKTRONIK 744824310 in Table 4.2. The CS employed to induce magnetic coupling in this experiment is a 10cm-side square copper plate which has been placed on top of the CMC, only separated by a paper film whose thickness is approximately 0.1mm. Figure 4.12 shows that the effect of the CS is to slightly increase both |SDM 21 | and |SUDM 21 | at low frequencies and also to increase their respective frequencies of resonance. These effects can be explained by a decrease of LDM . To demonstrate this, we have included in Figure 4.12 the |SDM 21 | and |SUDM 21 | curves calculated by using the equivalent circuit of Figure 4.1b with the parameters extracted in the previous sections (Table 4.2) and also the same curves obtained after conveniently decreasing LDM . Those calculated results agree very well with measurements. In general, the effect of the magnetic coupling created by CS placed very close to a CMC is to decrease the leakage inductance of the CMC by an amount between a 20% and a 30%. Detailed quantitative results are provided in Table 4.5 for the CMC in Figure 4.12 and two additional CMCs among those listed in Table 4.2. Table 4.5 compares for each CMC the inductance LDM calculated without the presence of a CS with the reduced inductance (referred to as LCS DM ) that should be used to match the SDM 21 and SUDM 21 curves in the presence of a CS. It is interesting to highlight that the same reduced inductance LCS DM can be used to account for the effect of the magnetic coupling for both the DM and UDM measurements, as should be expected. The main conclusion that can be drawn from the experiment described in this section is that a closely placed CS can alter the DM response of a CMC by decreasing its leakage inductance. Moreover, this effect can equally affect measurements in both the DM and the UDM setups. This implies that independently of the setup, magnetic coupling should be avoided (by keeping the CMC sufficiently far apart from metallic surfaces) to prevent an inaccurate characterization of the DM response of a CMC as a standalone component. 4.3 Results 53 Alternatively, in case the actual metallic enclosure where the CMC is going to be placed is available, it would be possible to determine its effect on the leakage inductance of a CMC by measuring it in the UDM setup with the CMC placed in the same relative position with respect to the metallic enclosure that it is intended to occupy in practice. Table 4.5 LDM for different CMCs with and without the effect of a nearby conducting surface. CMC part number L L LDM (µ µ µH) L L LCS DM (µ µ µH) WE 744824622 4.73 3.38 WE 744824310 33.6 27.0 WE 744824220 58.2 44.2 54 Chapter 4. Simple Setup for Measuring the Response to Differential Mode Noise of Common Mode Chokes (a) (b) Figure 4.12 Measured and calculated |SDM 21 | (a) and |SUDM 21 | (b) for the CMC listed as WÜRTH ELEKTRONIK 744824310 (10mH) in Table 4.2, whose picture is inserted in the figures. The CS acronym used in the legends indicates results corresponding to the case where a conducting surface is placed near the CMC. From results in Figure 4.12, it is also interesting to note that below approximately 3MHz, |SDM 21 | curves coincide very well with |SUDM 21 | ones. This is consistent with the discussion presented in Section 4.2.1, where we demonstrate that at low frequencies the response of a CMC is mainly determined by LDM and that is expected that SDM 21 ≈SUDM 21 . This confirms that in the range of frequencies where the CMC behaves inductively, the UDM setup can be effectively used to predict the DM insertion loss of a CMC. It is also worth pointing out that the curves for |SDM 21 | in Figure 4.12a show a slight 4.4 Discussion and Conclusions 55 attenuation at very low frequencies (between 100kHz and 200kHz) when compared with |SUDM 21 | curves in Figure 4.12b. This effect can also be observed in measured |SDM 21 | represented in Figures 4.8 and 4.9. We have verified that this is caused by a decrease in the performance of the baluns that we have employed in these measurements, due to its limited bandwidth (We have used baluns constructed with commercial wide-band 1:1 transformers Coilcraft WB2010-1 [61].). Although this problem could be solved by using baluns with a wider bandwidth or by performing a careful calibration, we point it out here to highlight an inherent shortcoming of the DM setup, namely its dependence on ancillary circuitry whose effect on the measurements has to be carefully taken into account. 4.4 Discussion and Conclusions This work presented a thorough analysis of a measurement setup, referred to as UDM setup, which can be used to readily measure the response of a CMC to DM signals throughout the frequency range where most EMC regulations impose limits to conducted emissions. The UDM setup is conceived as a simpler and faster alternative to balanced setups, which require ancillary circuits (baluns), and to the use of sophisticated equipment such as four-port VNAs. We have presented a detailed analysis of the UDM setup based on a modal analysis of a high-frequency circuit model of the CMC. This modal analysis has allowed us to obtain analytical expressions for the transmission coefficients of the CMC in terms of the admittances of the natural modes of the CMC, both for the DM and UDM setups. From these expressions it has been possible to determine the modes actually excited in the CMC in each setup which has permitted us to analyze the effect of parasitic effects on each setup and to identify the conditions that ensure similar responses of the CMC for the DM and UDM measurement setups. The analysis and experimental results presented in this work provide a deep understanding on the differences and similarities between both techniques of measurement. This has allowed us to demonstrate that the DM setups is inherently immune to (symmetric) external electric coupling while the UDM is sensitive to this effect. By contrast, we have verified that both DM and UDM setups are equally sensitive to magnetic coupling of the CMC to nearby conducting surfaces because this effect modifies the leakage inductance of the CMC. We have quantified the impact of these effects in some practical cases and we have found that provided that the presence of nearby conducting surfaces is avoided or carefully accounted for, the proposed UDM setup can be used to assess the response of a CMC to DM noise within a range of frequencies of practical interest. Summing up, the main contribution of the present work is to provide a deep understanding on the actual scope and limitations of a simple technique that can be used to measure the attenuation provided by a common mode choke to differential mode signals. This is important because the simplicity of the proposed measurement technique makes it very appropriate for quick assessment of the suitability of a common mode choke for a particular application. In fact, the quick assessing of the impedance and DM attenuation of a CMC provided by the proposed measurement approach facilitates the tasks of ensuring 62 Chapter 5. Improving Performance of Compact EMI Filters by using Metallic and Ferrite Sheets Figure 5.3 Insertion Loss measured and simulated (with CST Studio Suite ® ) at 10MHz obtained by using three 60 × 60mm shielding sheets made combining two materials (copper, ferrite and both at the same time) interposed between the two loops separated 2cm and shown from above in the inset picture. Results are represented for different numbered positions (indicated in the picture) of the top edge of the shielding sheet relative to the two loops. passive loop with no shielding sheet and with shielding sheet, which can be calculated from the ratio of the corresponding transmission coefficients. In this experiment we compare the performance of square 60 × 60mm shielding sheets made with two materials: 35- µ m-thick copper tape and 0.6-mm-width 374 material ferrite sheets [71]. According to the curve of permeability versus frequency provided by the manufacturer in [71], this material presents a relative permeability (real part) very close to 300 up to 1MHz which falls off to 100 at 50MHz. With these materials we have analyzed the performance of three types of shielding sheets: only copper, only ferrite, and copper + ferrite, i.e., a copper sheet placed along with and on the top of the ferrite sheet. We will refer henceforth to this joint use of both materials as a Cu+Fer shield. Results for the IL achieved by these shielding sheets at different positions are shown in Figure 5.3. Results in Figure 5.3 are taken at 10MHz, although there are very little variations of the IL at other frequencies in the entire range of frequencies where (5.1) holds. Results in Figure 5.3 show that whereas copper offers the best shielding performance when completely blocking the line of sign between the coupled loops (position 1), its shielding effect deteriorates very quickly under partial shielding conditions. In fact, for positions different than 1, the copper shield is outperformed by the Cu+Fer shield. Also, note that even a simple ferrite sheet offers higher IL than the copper sheet when placed at positions 3 to 6. Moreover, when the shielding sheets are below position 4 (the middle of the area of the circular loops), the shielding effect of copper is almost negligible, whereas sheets with ferrite (alone or with copper) are still able to provide an IL of a few dBs. Regarding the results for the ferrite shieldings in Figure 5.3, it is worth nothing that 5.3 Analysis 63 (a) Copper. Centered with the loops. (b) Copper. Partial shielding. (c) Cu+Fer. Centered with the loops. (d) Cu+Fer. Partial shielding. Figure 5.4 Surface current density in a shielding sheet placed between two current loops. The shielding sheet is made up of a single 60 × 60mm sheet of 35- µ m-thick copper or this same sheet of copper placed on top of a 0.6-mm-width 374 material ferrite sheet with the same dimensions. Currents are compared when the shielding sheet is placed centered with the loops or shifted down in such a way that the edge of the sheet coincides with the axis of symmetry of the loops (position 4 in Figure 5.3). we have selected the 374 material with the higher available thickness because for this particular application it offers slightly better results than other materials or thinner sheets also available from the manufacturer [71]. The main conclusion that can be drawn from the results in Figure 5.3 is that copper is preferable whenever the shielding sheet can be totally interposed between the coupled components. However, when only partial shielding is possible (which is often the case in practical EMI filters) it might be advantageous to use a ferrite or Cu+Fer shield. 64 Chapter 5. Improving Performance of Compact EMI Filters by using Metallic and Ferrite Sheets 5.3.2 Comparison of measurements with results of simulation To better understand how a ferrite sheet can contribute to improve the shielding effect of a copper shield in cases of partial shielding, we have performed a full-wave simulation of the experimental setup described above by using a commercial electromagnetic simulator (CST Studio Suite ® ). As a first step to check the accuracy of our simulated results, we have calculated and represented in Figure 5.3 the IL corresponding to all the types and positions of the shielding sheets measured and represented in that figure. A very good agreement between measured resuts and those obtained from the simulation can be observed in Figure 5.3. Then, we have calculated and represented in Figure 5.4 the surface currents excited in the copper sheet placed between the two current loops both when the shielding sheet is made only with copper and when a ferrite sheet (0.6-mm-thick 374 material) is close to the cooper (Cu+Fer case). For each one of these two cases we compare the complete and the partial shielding cases, which correspond respectively to shielding sheets placed at positions 1 and 4 as defined in Figure 5.3. Figure 5.4(a) clearly shows the shielding mechanism of a high-conductivity (copper) shield: when the copper sheet is conveniently placed centered with the current loops eddy currents are induced in the copper which are an image of the currents in the excited loop (but with opposite direction at a given time). Those currents will therefore generate an opposing magnetic flux which almost cancels out the net magnetic field at the side of the shielding sheet where the receiving loop is placed. However, if the copper sheet is shifted down to position 4, currents induced in the metallic sheet are not able to close the loop to create and image of the active loop. Instead, currents are forced to close its path by crowding at the top rim of the sheet, as shown in Figure 5.4(b). Those high currents will therefore be unable to cancel out the impinging magnetic field. On the contrary, these currents will give rise to a considerable coupling with the receiving loop, which explain the drastic decrease of the IL that can be observed for the copper sheet when it cannot completely block the line of sight between the loops. However, when a ferrite sheet is attached to the copper sheet the situation significantly changes. Figure 5.4(c) corresponds to the case where this Cu+Fer sheet is placed centered with the loops. By comparing with Figure 5.4(a), it can be seen that the effect of the ferrite sheet is to spread the current distribution, decreasing their peak values in front of the current loops (note that color scales are different in Figure 5.4(a) and Figure 5.4(c)). This effect is accounted for by the increase of the self-inductance seen by the eddy currents caused by the presence of the magnetic material. Because eddy currents are weaker, the shielding performance of this sheet is lower than that of the sheet made only with copper, as shown in the results in Figure 5.3. However, the situation is different for the partial shielding case shown in Figure 5.4(d). In that case, the presence of the magnetic material greatly reduces the current at the upper rim of the shielding sheet. This effect, combined with the ability of the magnetic material to divert the magnetic field lines gives rise to a better shielding performance for this partial shielding case when comparing with the sheet made only of copper. 5.4 Results 5.4 Results 65 (a) Schematic of an EMI filter. (b) Filter 1. (c) Filter 2. Figure 5.5 Schematic of a typical EMI filter along with pictures of two physical implementations whose components are listed in Table 5.1 and Table 5.2 respectively. Table 5.1 Components of the EMI filter in Figure 5.5(b). Component Manufacturer Part number N. value CMC WE 744824622 2.2mH CxVISHAY BFC2 339 20474 470nF CyVISHAY BCF2 338 60473 47nF Table 5.2 Components of the EMI filter in Figure 5.5(c). Component Manufacturer Part number N. value CMC WE 744823601 1mH CxWIMA MKS4F032203F00KI00 220nF CyKEMET PHE850EB5220MB06R17 22nF 5.4.1 Experimental setup and circuit models Figure 5.5 shows the schematic of a typical single-stage EMI filter [7]. This filter includes a Cx capacitor, two Cy capacitors and a CMC which is made up of two equal inductances L which are strongly coupled through a mutual inductance M . The pictures in Figure 5.5(b) and Figure 5.5(c) correspond to two physical implementations of this EMI filter which we will refer here to as filter 1 and filter 2. Those filters are both mounted on a 1.6mm-thick FR-4 substrate with a ground plane on the opposite side of the components. 66 Chapter 5. Improving Performance of Compact EMI Filters by using Metallic and Ferrite Sheets (a) CM setup to measure SCM 21 . (b) DM setup to measure SDM 21 . Figure 5.6 Equivalent circuits of the setups used to measure the transmission coefficients of an EMI filter in (a) common mode and (b) differential mode. The components of filter 1 are listed in Table 5.1 and the components of filter 2 are given in 5.2. In the PCB of the EMI filters shown in Figure 5.5 we have mounted four BNC connectors that allow measuring the transmission coefficient (or insertion loss) of the EMI filter both in common mode (CM) ( SCM 21 henceforth) and in DM ( SDM 21 henceforth). To that end we have used a Rhode&Schwarz ZND Vector Network Analizer (VNA) which has been connected to the EMI filter by using CM and DM measurement setups described in detail in [42,77]. Those setups make use of 0o and 180o splitters (baluns) to achieve CM and DM excitations of the EMI filter. An equivalent circuit of the EMI filter in both setups is represented in Figure 5.6. In those squematics, LCM =L+M is the inductance presented by the CMC to CM currents whereas LDM =L−M is the lekage inductance or inductance presented by the CMC to DM currents [7]. Also, R0=50Ω stands for the impedance of the input and output ports of the VNA. 5.4 Results 67 In Figure 5.6 the circuit models of the EMI filter in CM and DM include, highlighted in red, the more important parasitic effects that determine the response at high frequencies of the EMI filter [25]. In particular, the model of the filter excited in CM in Figure 5.6(a) includes the EPC of windings of the CMC ( Ct ) and the ESL of the Cy capacitors ( Ly ). Also the equivalent parallel resistance (EPR) of the CMC ( RCM ) and and equivalent series resistance (ESR) of the Cy capacitors ( Ry ) are included to account for losses. Compared with this circuit model, the model of the filter excited in DM, shown in Figure 5.6(b), is far more complex. This is due not only to the fact that for a DM excitation both Cx and Cy capacitors must be included in the model, but also, and more importantly, to the fact that magnetic coupling between the components of the filter cannot be disregarded in the DM case [25, 67, 77]. For this reason, in the circuit model in Figure 5.6(b) we have included three coupling coefficients to account for magnetic coupling between the CMC and the capacitors ( kxd and kyd for the Cy and Cy capacitors respectively) and also a coupling coefficient kxy that accounts for coupling between Cx and Cy capacitors. The corresponding mutual inductances will be denoted here as Mxd , Myd and Mxy , where in general Mi j =ki jpLiLj,∀i∈{x,y};j∈{d,y}with i6=j. The main aim of this work is to study and compare the effect of shielding materials such as copper and ferrite on the attenuation of an EMI filter for both for CM and DM (i.e., on SCM 21 and SDM 21 ). To create a magnetic shield between components we are going to use the same materials described in section 5.3, namely: 35- µ m-thick copper tape and 0.6-mm-width 374 material ferrite sheets [71]. As reported in [57], the effect of a copper sheet placed close to components of an EMI filter is twofold: first, eddy currents induced in the copper shield have the effect of reducing the effective ESL of capacitors and secondly, those eddy currents also decrease magnetic coupling between the capacitor and other components of the filter. Moreover, those beneficial effects can be enhanced if the copper tape is placed surrounding or wrapping the capacitors in the filter, as shown in the picture in Figure 5.7 [57]. As an alternative to the use of copper, it is expected from our analysis in section 5.3 that a ferrite sheet also provides some degree of magnetic shielding between components in an EMI filter. However, the use of a ferrite material might increase (instead of decrease) the ESL of capacitors, which may degrade the performance of the filter at high frequencies. Also, if the ferrite sheet is placed not between coupled components but a the opposite side of one of them, it may increase coupling between components (this is well known and used as an advantage in other applications [73,74]). For these reasons, the use of ferrite sheets is more beneficial when used as a plane shield interposed between magnetically coupled components. For example, the picture in Figure 5.7 shows two plane 30 × 60 × 0.6-mm ferrite sheets placed between the CMC and the capacitors in the EMI filter in Figure 5.5(b) (filter 1). In this section we will compare, for the two filters in Figure 5.5 the effect of the two shielding materials when each one is used in its more beneficial configuration. Therefore we will compare wrapping capacitors with copper tape versus using plane ferrite sheets placed between components and with simultaneously using both shielding techniques. We will make use of the conclusions drawn in section 5.3 to interpret the results. 68 Chapter 5. Improving Performance of Compact EMI Filters by using Metallic and Ferrite Sheets Figure 5.7 Measured SCM 21 transmission coefficients for the filter in Figure 5.5(b). Results for a non-shielded filter are compared with those obtained by using either copper bands or ferrite sheets placed as shown in the picture. 5.4.2 Effect of shielding on the CM response of the EMI filters Shielding techniques have in general a low impact on the CM response of EMI filters. As an example, Figure 5.7 shows the measured SCM 21 for filter 1 in Figure 5.5. We compare results obtained with no shields against those obtained with copper or with ferrite shields. Since for CM currents the magnetic field created by the CMC is mostly contained inside its core [6], an also because no current flows through the Cx capacitor in CM, coupling between components is typically not determinant for SCM 21 [25,42,77], which explains the low impact of the shielding techniques observed in Figure 5.7. In fact, the small differences between SCM 21 curves observed in Figure 5.7 are due to the fact that the presence of the shielding material close to the Cy capacitors modifies their ESL, which is reduced by the presence of copper [57] and slightly increased by the presence of the magnetic material. We have verified that, a 25-30% decrease in the Ly inductances explains the increase of attenuation at high frequencies caused by the presence of the copper shields, whereas an increase of almost a 20% in those ESL accounts for the effect of the ferrite shield. It is also interesting to point out that when both copper and ferrite sheets are used at the same time, the effect of the copper (which is closer to the capacitors) is dominant and hence the SCM 21 curve for this case (not shown in Figure 5.7) coincides with that measured when only copper is used as shield. 5.4.3 Effect of shielding on the DM response of the EMI filters Figure 5.8 represents the measured SDM 21 curves for both filters in Figure 5.5. Results for a non-shielded filter are compared with those obtained by using three shielding techniques: copper bands on the capacitors, ferrite sheets between the capacitors and the CMC and 5.4 Results 69 (a) Filter 1. (b) Filter 2. Figure 5.8 Measured and approximated SDM 21 transmission coefficients for the filters 1 and 2 in Figure 5.5. Results for a non-shielded filter are compared with those obtained by using two different shielding materials (copper and ferrite) and both shielding techniques at the same time (Cu+Fer label). Approximated SDM 21 curves have been obtained with the circuit model in Figure 5.6(b) and the parameters given in Tables 5.3 and 5.4. both techniques applied at the same time (Cu+Fer case). It can be seen in Figure 5.8 that above 2MHz the attenuation provided by the filters increases when shielding is used. For filter 1 Figure 5.8(a) shows that the copper shield is able to reduce transmission at high frequencies by approximately 10dB, whereas the ferrite shield provides even a better result. Moreover, when both ferrite and copper are used at the same time the increase in attenuation is well above 20dB and reaching even 30dB at some frequencies. Results for the filter 2, in Figure 5.8(b), reveal a similar pattern (Cu+Fer yielding the better results and 70 Chapter 5. Improving Performance of Compact EMI Filters by using Metallic and Ferrite Sheets Table 5.3 Parameters of the circuit model shown in Figure 5.6(b) for the EMI filter in Figure 5.5(b). Case LDM(µH) Ct(nF) RDM(kΩ)Ly(nH) Ry(mΩ)Lx(nH) Rx(mΩ)Myd (nH) Mxd (nH) Mxy(nH) No shield 5.6 3.5 4.5 13.1 40 9.9 27 19.0 14.5 0.109 Copper 5.0 3.5 4.5 11.3 31 8.2 21 11.4 7.7 0.039 Ferrite 6.1 3.5 4.5 14.4 52 11.5 31 5.7 3.4 0.031 Cu+Fer 5.9 3.5 4.5 11.5 33 8.4 22 4.3 2.2 0.012 copper being the less favorable case) but with smaller increases in the attenuation of the filter. We have also verified that results with shieldings including ferrite sheets deteriorates by 5-10 dBs by using instead other magnetic materials such as Mu-metal (we have used 0.5mm-thick Mu-metal plates), as expected. Results in Figure 5.8 can be interpreted in the light of the analysis performed in section 5.3 (summarized by the results in Figure 5.3). That analysis shows that under partial shielding condition, ferrite alone or used along with copper can provide better shielding than copper. As mentioned in section 5.3, partial shielding in EMI filters is caused by the fact that some magnetic field lines link components through the substrate. In this sense, it is very important to realize that at high frequencies, where the capacitors of the filter behave inductively, currents inside the capacitors flow typically very close to their bottom [?]. Therefore, the capacitors along with their leads conform current loops that are much more concentrated near the substrate than its external appearance might induce to think. As a consequence, the magnetic fields created by these currents are highly concentrated near and inside the substrate, where a very effective magnetic coupling may occur. This discussion allows us to conclude that in general, when estimating the effect of a shielding structure in an EMI filter, it is more realistic to assume that the actual situation is given by that represented by points between 2 and 4 in Figure 5.3 (i.e., partial shielding), whereas point 1 (shielding surface that completely blocks the line of sight between current loops) can be hardly reached in practice. Coming back to results in Figure 5.5, the effect of partial shielding would also explain the differences encountered between filter 1 and filter 2 on the performances of each shielding strategy. Note that components of filter 2 are smaller than those of filter 1 (especially the Cx capacitor, but also the CMC), while both filters are mounted on similar 1.6mm-thick substrates. Therefore, the relative impact on the total coupling of the area inside the substrate must be higher in filter 2. As a consequence, when shielding is used, the situation in filter 2 corresponds to positions more to the right in Figure 5.3 (positions 3 or 4) than for filter 1. This explains the fact that in filter 2 shielding is less effective in general than in filter 1. It also explains that in filter 2, unlike in filter 1, copper is clearly outperformed by ferrite. To verify the explanation given above and to quantify the impact of the different shielding techniques used here on the parasitic parameters of the circuit model of the EMI filters given in Figure 5.6(b), we have designed a method to estimate those parameters for the two filters measured in Figure 5.8. This method is based upon the use of an advanced search algorithm to find a set of parameters that makes the SDM 21 curve provided by the circuit model of the filter in Figure 5.6(b) to fit the measured curve. The coherence of the results is ensured by using a step-by-step approach to successively extract the parameters 5.4 Results 71 Table 5.4 Parameters of the circuit model shown in Figure 5.6(b) for the EMI filter in Figure 5.5(c). Case LDM(µH) Ct(nF) RDM(kΩ)Ly(nH) Ry(mΩ)Lx(nH) Rx(mΩ)Myd (nH) Mxd(nH) Mxy(nH) No shield 2.3 14 0.4 13.5 87 7.8 38 19.1 13.8 0.187 Copper 2.1 14 0.4 11.3 72 6.8 34 10.8 9.1 0.093 Ferrite 2.8 14 0.4 15.4 106 9.3 44 4.7 7.1 0.119 Cu+Fer 2.8 14 0.4 11.7 74 7.3 35 3.4 6.0 0.072 (a) Filter 1. (b) Filter 2. Figure 5.9 Reductions of the mutual inductances that model magnetic coupling between components in the equivalent circuit of the EMI filter excited in DM (Figure 5.6(b)) that have been obtained with three different shielding techniques for filter 1 (a) and filter 2 (b) in Figure 5.5. of the circuit model. The details of this method are provided in appendix B. By using this 78 Chapter 5. Improving Performance of Compact EMI Filters by using Metallic and Ferrite Sheets presenting at the same time the additional advantage of not requiring a redesign or a re-reouting of the PCB of the EMI filter. Finally, it is convenient to point out that the impact of the presence of copper or ferrite shielding surfaces on losses associated to the AC power signal is expected to be in general very low both because frequency is low and because coupling is weak. For example losses associated with eddy currents in the copper shields can be estimated to be in the order of the units of µW for 50Hz AC currents in the order of hundreds of amperes. In any case, we consider an experimental validation to determine whether this could be an issue in very high-power applications as an interesting subject for a future work. 6 Reducing Conducted Emissions at the Output of Full-Bridge DCDC Converters with High Voltage Steps 6.1 Abstract In this work we analyze the impact of output filter design techniques aimed to reduce conducted emissions at the output of a DCDC power converter. A thorough analysis, based on high-frequency circuit models of the converter, is performed to assess expected improvements offered by different design strategies. This analysis is then confronted with measurements of conducted emissions at the output of a 300 W 48 V to 12 V Phase Shift Full Bridge PSPB prototype. Those experimental results demonstrate that a symmetric arrangement of the output LC filter and a direct bonding of the return output terminal of the converter to chassis are effective to reduce common mode conducted emissions at the output. Those results also demonstrate that the symmetry of the output LC filter can reduce conducted emissions in differential mode at high frequencies, where common mode to differential mode conversion is the predominant contribution to differential mode noise. However, direct bonding to chassis of the return output terminal may be ineffective at high frequencies due to the parasitic inductance associated with this connection. Main conclusions drawn for this analysis are applicable in general for isolated converters with a high voltage step between high and low voltage sides. Since the techniques of reduction of conducted emissions studied here do not increase the number of filter components, they are especially suitable for applications where high power density is an important requirement, e.g. aerospace or automotive applications. 79 80 Chapter 6. Reducing Conducted Emissions at the Output of Full-Bridge DCDC Converters with High Voltage Steps 6.2 Introduction High efficiency and high power density are key requirements in power converters in several fields, as automotive [78], aeronautics [79,80] and telecommunications [81]. In this context, current trends are towards the use of higher switching frequencies and fast switches (e.g. wide bandgap semiconductor switches) to reduce volume and weight of passives without increasing converter switching losses [82]. However, rapid voltage and current changes associated with high switching frequencies increase electromagnetic compatibility (EMC) issues such as conducted and radiated emissions [83]. This makes makes it necessary to optimize the design of the converters to ensure compliance with mandatory EMC regulations while avoiding weight penalties associated with filtering requirements. In general, techniques to reduce electromagnetic emissions of power converters fall either into strategies that inherently generate low noise [84,85], or techniques aimed to recirculate noise within the converter, thus keeping it away from the power leads [86]. A simple and effective design technique such as enforcing symmetry of the electromagnetic interference (EMI) filter at the input leads of the converter can be included within the latter category [87].Also, other passives such as transformers and inductors can be designed or arranged in a favourable manner in order to contain noise within the converter. For example, placement of equal inductors in both positive and return buses (symmetrical inductances), has already been implemented in an isolated boost converter [88] and a forward converter v as a strategy to reduce input filtering requirements.This same idea of splitting the inductance in two buses will be implemented at the output filter of an isolated converter in this work. Although we study a different topology and different measurement points for conducted emissions, [88] and [89] define a background for the filtering concepts that will be developed in this work. Similarly, effects of reduction of the equivalent noise sources at the input power leads of converters have been achieved by using current balancing techniques [88,90–92]. Valuable insights in common mode (CM) currents paths in isolated PSFB and resonant converters are provided in [93] and [90]. In those works, the transformer interwinding capacitances between high voltage (HV) primary side and the grounded low voltage (LV) secondary side are identified as a main cause for common mode currents at the converter input leads. Nevertheless, no attention is paid to output conducted emissions. In [89], a reduction of the voltage difference in output terminals due to inductors symmetrization is reported in a forward converter, although the underlying mechanism of this phenomena is not thoroughly examined. In general, the effect of techniques aimed to reduce conducted emissions of converters are analyzed solely at the input leads of the converter [87 – 91,93]. This is related to the fact that in practice most EMC regulations impose explicit limits to conducted emissions at the power leads (input) of the device under test (DUT). However, a power converter is a specific kind of DUT presenting output power leads which can also become a source of conducted and radiated emissions that are able to cause EMI issues in nearby susceptible devices. This issue is also dealt with by EMC regulations [8,94]. For example, in the annex I of CISPR 25 [94], applicable to automotive equipment, measurement setups and limits of conducted and radiated emissions are defined for automotive devices with both high voltage (HV) and low voltage (LV) sources or loads, which is the case of DCDC converters. 6.2 Introduction 81 In that standard, conducted emissions at the LV power leads are limited. On the other hand, the aeronautical standard RTCA-DO-160 [8] establishes limits to conducted emissions on interconnecting bundles, which makes it necessary to control and limit conducted emissions at the output of DCDC converters. Moreover, this limitation in converter output conducted emissions is consistent with the susceptibility limits (RTCA-DO-160 section 22) of a load device that is connected to the LVDC network generated by a DCDC converter. Finally, it is also worth pointing out that CM currents at the output power leads are the main source of radiated emissions [95]. Therefore, reducing CM conducted emissions at the output of the converter is a key technique to ensure compliance with limits imposed to radiated emission by the applicable EMC regulation. This work analyzes the impact of several alternative configurations of the output LC filter on output CM and differential mode (DM) conducted emissions of an isolated PSFB converter. In particular, the effect of both symmetrization of the output filter inductors and direct connection to chassis of the return output terminal of the converter are thoroughly studied and measured. We demonstrate that the configuration of the output filter of this converter can be optimized to reduce CM emissions with no significant penalty in terms of weight or volume of the converter. Also, we show that DM emissions can be reduced by proper mitigation of CM to DM conversion. The output filter design techniques discussed here are specially interesting in applications with high voltage step between the isolated HV input and LV output, where relatively high CM currents flow from the HVDC side to the LV side through the transformer parasitic capacitances [96]. This manuscript is organized as follows. In section 6.3 the noise sources of the PSFB converter are presented, as well as a generic equivalent Thèvenin model of the converter at the output LC filter. The qualitative impact of the proposed LC filter configurations on output CM and DM conducted emissions will also be discussed. Section 6.4 describes the setup and measurement method used to obtain the measured conducted emissions presented in section 6.5. Measurements have been performed for the different filter configurations in an isolated 48 V to 12 V PSFB prototype. Main conclusions of this work are summarized in section 6.6. Finally, details about the characterization of the components of the measured converter with most impact in output conducted emissions are given in Appendix 6.7. Figure 6.1 PSFB topology schematic. Paths that account for CM emissions are also represented. ∗CY2 accounts either for a direct bonding connection or for a capacitive coupling to the converter grounded chassis . 82 Chapter 6. Reducing Conducted Emissions at the Output of Full-Bridge DCDC Converters with High Voltage Steps Figure 6.2 Equivalent model of the converter at the output. In ’S’ configurations: L1= L/2,L2=L/2 . In ’AS’ configurations: L1=L,L2=0 . In ’CC’ configurations: CY1=CY and CY2=CY . In ’C0VG’ configurations: CY1=CY and CY2 is a short circuit. Asterisks in L2 and CY2 indicate that these components might not be present depending on the filter configuration . 6.3 Analysis 6.3.1 Topology of the DCDC power converter and noise sources The PSFB is a suitable topology for isolated and unidirectional power transfer in mid power applications, in the range of units of kilowatts [97 – 99]. This topology, shown in Figure 6.1, features a controlled full bridge in the HV side, which generates an AC voltage at its output at the switching frequency. The high frequency transformer is used to reduce the AC voltage between HV and LV sides and to provide galvanic isolation. A center-tapped transformer enables the use of only two switches to rectify the AC output of the transformer. The DC component of the rectifier output is filtered by an output LC filter. The Line Impedance Stabilization Networks (LISN) in Figure 6.1 is intended for measuring conducted emissions of the converter at its input leads [8, 9]. A LISN offers a controlled impedance to the noise sources of the converter, thus ensuring repeatable measurements. Depending on the particular standard, a LISN might also be required at the output leads [94], or the load impedance should be similar to that found in the real device operation [8]. In the measurement setup in Figure 6.1, AC coupled resistors to ground ( RCM and Cy ) have been included to ensure repeatable measurement of noise at the output terminals of the converter. In that schematic RDM and LDM account for the resistive and inductive parts of the impedance of the load. The goal of this work is to study and compare the impact of different output LC filter configurations on noise currents flowing to the load. In particular, we are interested in limiting CM noise currents because they can easily compromise compliance of the converter with EMC regulations [95,100]. In PSFB and similar isolated topologies, CM noise in the LV side is greatly determined by HV switching operation, switches parasitic capacitances to ground, transformer parasitic interwinding capacitances, and output terminals filtering to ground/chassis [90,93,101]. In Figure 6.1 parasitic capacitances that offer paths for CM currents have been encircled by dashed lines. 6.3 Analysis 83 Under the presence of such CM perturbations in the LV side, the output LC filter must be optimized to reduce output CM emissions and also to mitigate CM to DM conversion that could lead to undesirable DM conducted emissions. In order to reduce CM currents flowing to the load, it is usual to connect capacitors between the output terminals and the chassis ( Cy1 and Cy2 in Figure 6.1) or to make a direct chassis ground connection of the return terminal (if allowed by specifications). In this work we study and compare the impact on noise emissions of both configurations. For the sake of conciseness, the configuration with a high frequency (HF) capacitor between each bus and the chassis will be referred to as ’CC’, whereas the configuration in which the return output terminal is directly connected to chassis will be referred to as ’C0VG’. Also, we will study the effect on noise emissions of increasing symmetry of the output LC filter. With this aim, we will compare an asymmetric case (denoted as ’AS’), where the whole inductance of the LC output filter is in the positive bus ( L1=L , L2=0 in Figure 6.1), with a symmetric case (referred to as ’S’) where the same inductance is split into two equal inductances in the ’12V’ and the ’0V’ buses (L1=L2=L/2in Figure 6.1). 6.3.2 HF model of the converter at the output In order to facilitate the analysis of the effect of the output filter on noise flowing to the load, in Figure 6.2 the converter is replaced by its equivalent model. This model includes two frequency-dependent voltage sources ( VCM and VDM ), and also three frequency-dependent source impedances ( Zth1 , Zth2 and Zth3 ) [102]. The CM source, VCM , is related to switched voltages, (especially HV side MOSFETs), and Zth3 is closely related to the impedances seen by CM currents when flowing between the HV side and LV side, thus transformer interwinding capacitance greatly determines this impedance [96]. In general, obtaining the exact frequency-dependent parameters of the model in Figure 6.2 is not easy [103, 104]. Nevertheless, this model simplifies the analysis of the impact of the different filter configurations in the conducted emissions at the output terminals of the converter. The circuit model in Figure 6.2 includes all the output filter and load impedances, including some parasitic inductances that were not represented in Figure 6.1, but that play an important role in conducted emissions at high frequencies. In particular, Lp1 and Lp2 model the parasitic inductance of leads connecting power printed circuit board (PCB) and the converter output connectors. LpCY1 and LpCY2 model the parasitic equivalent series inductance (ESL) of Cy1 and Cy2 respectively, including the inductance associated with the bonding to the grounded chassis. In ’C0VG’ configuration, LSC models the parasitic inductance of the bonding of the output terminal to the chassis. The Lc inductances account for the parasitic inductances of the output power leads connecting the output of the converter to the load. 84 Chapter 6. Reducing Conducted Emissions at the Output of Full-Bridge DCDC Converters with High Voltage Steps Figure 6.3 Simplified model of CM path, depicted from model in Figure 6.2 . 6.3.3 CM conducted emissions In order to qualitatively understand the filter impact on CM output currents, the circuit model in Figure 6.2 can be further simplified as shown in Figure 6.3. This simplified circuit model is valid for all filter configurations with a caveat for the ’C0VG’ configuration at high frequencies which will be addressed later. It is important to point out that the simplified circuit model in Figure 6.3 has the purpose of making the undelaying CM filtering mechanisms more evident that the complete model in Figure 6.2. Two key assumptions have been made to get to the simplified model in Figure 6.3 from that in Figure 6.2: 1. The impedance of the array of capacitors that conform Co is typically much lower than that of Cy at low frequencies, and those of the parasitic inductances Lp1 , Lp2 , LpCY1 , LpCY2 and LSC at high frequencies. Therefore, this array of capacitors can be regarded as a short circuit. 2. The impedance of Zth,3 in series with both Z(L1)+Zth,1 and Z(L2)+ Zth,2 is much larger than the rest of impedances of the filter. This assumption, together with the fact that voltage drops in Lp1 and Lp2 are expected to be roughly the same in ’CC’, allows to neglect the effect of Lp1 and Lp2 . Note that at low frequencies at which Lp1 and Lp2 can be ignored, the model in Figure 6.3 is also valid for both ’CC’ and ’C0VG’ cases. The impedances in this simplified model are grouped in Figure 6.3 into four key impedances: one is Zth3 , another one is given by ZLCM , which accounts for the contribution of Zth1 , Zth2 , Z(L1) and Z(L2) . A third impedance, denoted as ZCM,CY in Figure 6.3, is the contribution of the impedances associated with the capacitances or the direct connection between the power leads and the grounded chassis. Also, ZCM,LOAD in Figure 6.3 stands for the impedance to ground seen at the load of the converter by the CM currents. Note that, since the CY capacitors are expected to divert most of the CM current back to the chassis, the current ICM,LOAD flowing towards the load impedance should be much lower than the net CM current ICM. 6.3 Analysis 85 The circuit model in Figure 6.3 shows that, in general, CM conducted emissions at the output of the converter can be reduced by increasing ZLCM . Therefore, it is interesting to estimate ZLCM for the different filter configurations. For the ’AS’ case ZLCM can be obtained as: ZLCM,AS =(Zth1+j2πf L)Zth2 Zth1+j2πf L +Zth2 ≡{2πf L >> Zth1,Zth2}≡Zth2 (6.1) In the ’S’ case, ZLCM can be calculated as: ZLCM,S=(Zth1+j2πf L/2)(Zth2+j2πf L/2) (Zth1+j2πf L/2)+(Zth2+j2πf L/2) ≡{2πf L >> Zth1,Zth2}≡ j2πf L/4 (6.2) Where in (6.1) and (6.2) it is assumed that |Z(L)|=|2πf L||Zth1|,|Zth2| . Considering that at the frequencies of interest Z(L) is quite large, this must be true for typical values of Zth1 and Zth2 . From (6.1) and (6.2) it can be inferred that |ZLCM,AS||ZLCM,S| . Consequently, the ’AS’ case should give rise to higher CM conducted emissions ( ICM,LOAD ) at the output of the converter, regardless of the grounding configuration of the output terminals. To analyze the effect on CM noise emissions of the converter of the two strategies considered for connection of the output terminal to chassis (’CC’ and ’C0VG’), it is also useful to examine the circuit model in Figure 6.3. In this circuit model it can be seen that the main difference between ’CC’ and ’C0VG’ configurations is that they lead to different values of ZCM,CY . In fact, ZCM,CY in ’C0VG’ is determined by the parasitic LSC and therefore it is expected to be lower than ZCM,CY in ’CC’, which is given instead by the parallel impedance of both Cy capacitors. Therefore, assuming that the total CM current ICM is approximately the same for the ’C0VG’ and the ’CC’ configurations 1 , and that this current is split into ICM,LOAD and the current diverted to the chassis through ZCM,CY , it can be readily concluded that a lower ZCM,CY will reduce ICM,LOAD . This makes the ’C0VG’ configuration preferable to the ’CC’ connection for reduction of CM conducted emissions. However, a caveat should be added with respect to the validity of the circuit model in Figure 6.3. As earlier pointed out, this simplified model is not strictly correct for the ’C0VG’ case at high frequencies, because neglecting the parasitic Lp1 and Lp2 inductances in Figure 6.2 does not seem justified in that case. Nevertheless, and despite the fact that a rigorous analysis is more cumbersome in that particular case, it can be demonstrated that a lower ZCM,CY should also reduce CM emissions in that case. Summing up, CM conducted emissions are expected to be reduced by a parallel arrangement of the inductances of the output filter (’S’ configuration) because this configuration increases the impedance seen by the CM currents. Also, a direct bonding to chassis of the ’0V’ power lead (’C0VG’ configuration) is also expected to reduce CM conducted emissions of the converter by allowing internal recirculation of CM currents. 1 Note that ICM is mostly determined by Zth3 and ZLCM because Zth3 is a high impedance. Therefore Zth3+ZLCM will be typically much greater than the rest of the impedances in Figure 6.3. In other words, VCM along with Zth3+ZLCM behaves as a current source feeding the parallel connection of ZCM,CY and ZCM,LOAD. 86 Chapter 6. Reducing Conducted Emissions at the Output of Full-Bridge DCDC Converters with High Voltage Steps Finally, it is interesting to note that the difference between the performances at filtering CM noise emissions of ’C0VG’ and ’CC’ configurations should be higher at low frequencies, where the impedance of Cy is capacitive and much greater than that of LSC . In this frequency region, this difference should increase with decreasing frequency and for smaller Cy. Figure 6.4 Model to predict CM to DM conversion in the proposed filter configurations, derived from the circuit model in Figure 6.2 . 6.3.4 DM conducted emissions Conducted emissions in DM are determined both by DM noise sources and also by CM to DM conversion [87]. This mode conversion is expected to be especially relevant in DCDC converters with a high voltage step (hence a significant CM noise source at the primary) and transformers with large interwinding capacitances (e.g. planar transformers [105]). Since the grounding configuration has little effect on DM noise currents flowing at the output of the converter, any measurable effect caused on DM conducted emissions by changes on output filter and/or grounding configurations should be accounted for by the effect of the filter and/or grounding on CM/DM conversion. To analyze the mechanism of CM/DM conversion and its impact on the different filter configurations studied here, Figure 6.4 represents the general circuit model at the output filter under a CM excitation. In that figure, the CM current entering the output filter, ICM is split into currents IL1 and IL2 , flowing through L1 and L2 respectively. Also, in Figure 6.4 ICY1 and ICY2 represent currents that flow to ground through CY1 and ∗CY2 (or the short circuit in ’C0VG’) respectively. Current IC0 flows through C0 , due to an impedance unbalance in the filter. Also, a current IDM,LOAD can flow to the DM load ( ZDM,LOAD ) due to CM to DM mode conversion, as we will discuss. Note that since ZDM,LOAD is typically much larger than the output impedance of the converter at the frequencies of interest, conducted emissions are expected to be mostly contained within the converter. 6.3 Analysis 87 Table 6.1 Comparison for the different filter configurations studied here of the magnitudes of the expected currents flowing at the output filter, an represented in the circuit model in Figure 6.4. This comparison assumes that frequency is sufficiently low as to make negligible the effect of parasitic inductances.. Low frequencies ICM IL1/ICM IL2/ICM ICO/ICM ICY1/ICM ICY2/ICM IDM,LOAD S,CC - - 0.5 0.5 10.5 0.5 - - S,C0VG - - 0.5 0.5 0.5 11 - AS,CC + + 11 0.5 0.5 0.5 + AS,C0VG + + 11111 - We will first study CM/DM conversion for each filter and grounding configuration at low frequencies (i.e. typically from a hundred kHz to units of MHz), where parasitic inductances can be neglected in the circuit model in Figure 6.4. First, we will focus on the ’S’ cases. As discussed in section 6.3.3, in ’S’ cases ICM is expected to be smaller than in ’AS’ cases. Moreover, in ’S’ cases ICM is expected to be equally split into the L1 and L2 branches in Figure 6.4, i.e. IL1≃IL2 . In the particular case of the ’S,CC’ configuration, those equal currents see the same impedance to ground. Therefore a very low CM/DM conversion is expected. On the other hand, in ’S,C0VG’, IL2 flows to ground through the ground bonding ( LSC ) whereas most of IL1 ( ≃ICM/2 ) will flow to ground through the low impedance offered by C0 . Therefore a certain CM/DM conversion should be expected. For the ’AS’ cases ICM will mostly flow through the ’0V’ bus, i.e. IL2≃ICM ≃ICY2 . In ’AS,C0VG’ ICY2 finds a very low impedance path to ground whereas IL1≃IC0ICM . Therefore, a low CM to DM conversion is expected for the ’AS,C0VG’ configuration at low frequencies. By contrast, for the ’AS,CC’ case, the presence of the CY2 capacitors causes that the relatively large CM current IL2≃ICM is not so efficiently diverted to ground at low frequencies. Instead, IL2 finds a current divider with similar impedances through CY2 and the series impedance of CY1 and C0 . Therefore CM/DM conversion is expected to be more significant in this case compared with the ’AS,C0VG’ case. Table 6.1 summarizes the main conclusions obtained in this discussion. Since the effect of parasitic inductances has not been considered in the above discussion, those conclusions are expected to remain valid as long as frequencies are sufficiently low as to make negligible the effect of parasitic inductances. It is interesting to analyze whether the above conclusions must be modified at high frequencies. At high frequencies (i.e. tens of MHz), parasitic impedances at the output play an essential role in CM to DM conversion, which is expected to modify the qualitative analysis performed for low frequencies. In fact, in this scenario, DM current IDM,LOAD is given by the expression: IDM,LOAD =IC0ZC0+2πf jLp(ICY2−ICY1) ZDM,LOAD (6.3) Where ZC0 stands for the impedance of C0 . Also, in (6.3) a symmetrical layout is assumed. Therefore, the parasitic inductances of the traces of the PCB connecting the 94 Chapter 6. Reducing Conducted Emissions at the Output of Full-Bridge DCDC Converters with High Voltage Steps (a) Cy=10 nF, ’S’ case. (b) Cy=10 nF, ’AS’ case. (c) Cy=50 nF, ’S’ case. (d) Cy=50 nF, ’AS’ case. Figure 6.9 Measured DM output currents for ’C0VG’ and ’CC’. 6.5.2 DM conducted emissions at the output of the converter Regarding DM conducted emissions, the analysis presented in section 6.3.4 and summarized in table 6.1 indicates that symmetry of the inductors of the LC output filter should reduce in general CM to DM conversion, although the ’AS,C0VG’ case could be advantageous at low frequencies. In order to verify these theoretical conclusions, in the plots in Figure 6.8 we have compared the measured output DM currents for the ’S’ and ’AS’ cases. This has been done for the ’C0VG’ and the ’CC’ configurations respectively in Figure 6.8(a) and Figure 6.8(b) for Cy=10 nF. In Figure 6.8(c) and Figure 6.8(d) the same comparisons are presented for Cy=50nF. Results in Figure 6.8 reveal that ’S’ filters outperform ’AS’ filters, especially in the high frequency range of 15 MHz to 30 MHz. In fact, at 30MHz the difference reaches 10 dB regardless of the grounding configuration or Cy value. By contrast, at mid frequencies, from 1MHz to 15MHz, the differences are almost negligible. Results for Cy =50 nF (see Figure 6.8(c) and Figure 6.8(d)) show slight improvements of up to 4 dB provided by the ’S’ case with respect to the ’AS’ case. In order to analyze the effect of the Cy configuration in the DM output currents, in Figure 6.9 we have rearranged the measurements presented in Figure 6.8, so that ’CC’ 6.6 Discussion 95 and ’C0VG’ cases are represented in the same plot for the sake of comparison. In all the comparative measurements shown in Figure 6.9 we can observe that DM noise current emissions are very similar for the ’CC’ and ’C0VG’ cases. In fact, only the resonance around 6MHz changes to a higher frequency for ’CC’ with respect to the ’C0VG’ case. Also, ’CC’ case offers a slight improvement ( ≃ 4 dB) with respect to the ’C0VG’ case for frequencies above 15 MHz. Summing up, results in this section confirm that a reduction of DM emissions thorough adequate output filter arrangement can only be achieved at frequencies where CM/DM conversion is the predominant source of DM emissions. In this case, this occurs at high frequencies. For this reason, a symmetric arrangement of the output filter inductances (’S’ case) offers some advantages above 15MHZ. By contrast, a ’C0VG’ scheme has a slight negative impact in DM emissions at high frequencies. As discussed in section 6.3.4, the effect of parasitic inductances, which are highly dependant on the particular layout, accounts for this decline of the performance of the ’C0VG’ configuration at high frequencies. 6.6 Discussion This work analyzes and quantifies reduction on conducted CM and DM emissions at the output power leads of a power converter achieved by design techniques based upon symmetric/asymmetric placement of components of the output filter of the converter. These design techniques have been applied to an isolated PSFB 300 W DCDC power converter with a high voltage step between the HV side and the LV side, for which highfrequency circuit models has been proposed to analyze key factors affecting CM and DM conducted emissions. By measuring CM and DM noise currents at the output of the converter in a frequency range between 100kHz and 30MHz we have demonstrated that high-frequency CM noise currents flowing to the load can be reduced by using a symmetrical placement of the inductors of the LC output filter of the converter. In particular, above 10MHz an average improvement of ≃8dB has been measured for the converter analyzed here. We have also studied the effect of placing HF thin film capacitors between output nodes of the converter and the chassis, and we have compared the effect of directly grounding the ’0VDC’ output terminal (’C0VG’) with a symmetric case where equal capacitors are placed at both terminals (’CC’). Experimental results show a reduction of CM conducted emissions at the output of the converter for the ’C0VG’ configuration. Regarding DM conducted emissions, it has been shown that those emissions can be reduced at high frequencies by using a symmetric configuration of the inductances of the output LC filter of the converter. We have demonstrated that this effect is caused by a reduction of CM/DM conversion, which is the dominant mechanism causing DM noise emissions at high frequencies. The good agreement found between experimental results and the conclusions obtained from the analysis of the high-frequency circuit models of the power converter has allowed us to confirm the key role played by parasitic inductances associated with the physical setup of the converter for the prediction of conducted emissions at high frequencies. 96 Chapter 6. Reducing Conducted Emissions at the Output of Full-Bridge DCDC Converters with High Voltage Steps The conclusions drawn in this work can be generalized to topologies of DCDC power converters providing a high voltage step, where the HV side is typically a significant source of CM noise that propagates to the LV side through the transformer interwinding capacitance. 6.7 Extraction of parameters of the circuit model This section describes the characterization of the components of the LC filter and of the load impedance of the converter, which has been performed in the whole frequency range of interest. We have used a network analyzer to extract circuit model parameters, and also datasheet information and estimations from analytical expressions [1,106]. Circuit parameters obtained are listed in table 6.3. In section 6.3.3, load impedance to ground ( ZCM,LOAD in Figure 6.3) was assumed to be much higher than the impedances of the connections to the chassis. In order to validate this assumption, we have measured the passive values that determine ZCM,LOAD . Figure 6.10 shows the transmission coefficient measured for the shunted load (with cables), along with the transmission coefficient given by the circuit model in the inset of that figure with the circuit model parameters Lc , RCM shown in table 6.3. Results reveal that the 33 Ω resistors in series with the load CY capacitors are the component that determine impedance to ground from frequencies below 100kHz and up to 5MHz. Note that the impedance of the capacitors CY =470nF is much lower than that of the 33 Ω resistors in the studied frequency range. The inductance of the output power leads becomes the dominant effect above 5MHz. In fact a good concordance between the measured and simulated curve is observed in Figure 6.10 by modelling each cable as an inductance Lc≃300nH. We have also checked the assumption than load DM impedance ( ZDM,LOAD in Figure 6.4) is in general much higher that filter DM impedance. In fact the extracted load inductance LDM ≃2uH determines ZDM up to 6MHz, and then up to 30MHz, ZDM ≃2RCM =66Ω. 6.7 Extraction of parameters of the circuit model 97 Figure 6.10 Measured and simulated transmission coefficient S21 of the shunted CM load with the cables. Figure 6.11 Transmission coefficient ( S21 ) of the inductors L1 and L2 employed in ’S’ and ’AS’ configurations of the output LC filter of the converter. 98 Chapter 6. Reducing Conducted Emissions at the Output of Full-Bridge DCDC Converters with High Voltage Steps The impedance capacitor array C0 in Figure 6.2 is dominated by the four 22u F ceramic capacitors which, according to the datasheet, exhibit parasitic inductances of 3nH. Since traces connecting these capacitors in the array are 2cm wide, the inductance of the traces between capacitors is expected to be very low ( ≃1 nH). These parameters reveal that, in accordance with assumptions made in the analysis presented in section 6.3, the impedance of C0 is much lower than other filter impedances (i.e. Cy ) in the whole frequency range of interest. We have also characterized the inductors of the LC output filter. For the symmetric (’S’) case we have used two inductors, L1=L2 with an inductance of 4.7u H (part id:’SRP1770TA-4R7M’ ), and for the asymmetric (’AS’) configuration we have used a single inductor L1 with an inductance of 10 u H (part id:’SER2918H-103KL’). Figure 6.11 shows the transmission coefficients of these inductors as measured by using the setup shown in the inset in that figure [106]. It can be observed in Figure 6.11 that up to 8MHz the series impedance of L1+L2 in ’S’ case is almost the same as that of L1 in ’AS’ case. Therefore, the output filters should exhibit equal responses under a purely differential excitation (i.e. VCM =0 in Figure 6.2). At higher frequencies, above ≃15 MHz, the impedance of the inductors is determined by their parasitic capacitances Cp . For L1 in ’AS’ we have obtained Cp=7.4 pF. For the ’S’ case, the measured capacitance of both L1 and L2 is Cp=30 pF. As a consequence, the equivalent capacitance in a DM setup as in Figure 6.11 is Cp/2=30/2 pF =15 pF, i.e. higher than for the ’AS’ case. Therefore, under a DM excitation caused by converter operation the symmetric (’S’) filter is expected to provide less attenuation than the asymmetric (’AS’) filter at frequencies above 15MHz. This eliminates a difference on the LC output filter as a possible cause of the fact that ’S’ outperforms ’AS’ at reducing DM conducted emissions. Therefore, this fact can only be accounted for by the effect of the symmetric or asymmetric configuration of the LC filter on CM/DM conversion. Other important parasitic elements in the circuit model of the converter in Figure 6.2 are the inductances of the cables connecting the PCB of the converter to the output connector. Those inductances are approximately Lp1=Lp2≃10nH . Finally, as for Cy capacitors, we have used thin film capacitors with values of 10nF and 50nF. The parasitic ESL of those capacitors given in table 6.3 have been measured by following the approach described in [106]. Appendix A Inductance analytical expressions This section [1] compiles the analytical equations used in this work to calculate the self and mutual partial inductances of the current distributions employed to model the currents in thin-film capacitors. The partial inductance of a long flat conductor of width w at a height h above a ground plane can be calculated by using the following equation [107]: L=lµ0 η0 Z0(A.1) where η0=120πΩis the impedance of free space and: Z0=(60ln(8h w+w 4h)Ωif w/h≤1 120π w h+2.42−0.44 h w+(1−h w)6Ωif w/h>1(A.2) The mutual inductance between two parallel wires of radii r , of the same length l and placed at a distance d, with drcan be calculated as [36]: M=µ0 2πl lnhk+pk2+1i−r1+1 k2+1 k!(A.3) where µ0 is the permeability of free space and k=l/(d+r) . The partial self-inductance of a wire of radius r and length l can also be obtained from (A.3) by simply replacing d by zero. 99 Appendix B Extraction of parameters of the circuit model This section [2] describes the method employed in this work to determine a set of parameters of the circuit model in Figure 5.6(b) that accounts for the actual response of the filters whose SDM 21 curves have been measured here. To find the parameters that correspond to a measured SDM 21 curve we have used a particle swarm optimization (PSO) algorithm [108]. In that algorithm the cost function has been defined as the sum of the squared differences between the measured SDM 21 (f) curve and the curve obtained from an analysis of the lumpedelements circuit in Figure 5.6(b). To ensure consistency of the results, avoiding local minimums of the cost function,we have devised an approach to gradually fix parameters through successive measurements in different arrangements of components made on the PCB of the filters: 1. A PCB where only the Cx capacitor is mounted allows to readily determine Cx , Lx and Rx . Note that the Cx value might differ from the nominal value due to tolerances. Since the ESL Lx (and also Rx ) are typically altered by the presence of the shielding structures, this must be done without the shielding sheets and also with them placed at the same position where they are intended to be placed in the filter. 2. An arrangement where only the two Cy capacitors are mounted on the PCB is used to determine the Cy , Ly and Ry parameters of the Cy capacitors for all the cases. This setup along with the previous one has allowed us to identify a series inductance, accounting for the effect of the traces of the filter, whose value is approximately 0.2µ H for the filters measured here, and that must be added to the circuit model to increase accuracy above several tens of megahertzs. 3. An arrangement where the CMC and the Cx are mounted, but no Cy capacitors are present. From the SDM 21 curve of this arrangement, and for each case (with and without shielding), it is possible to extract the parameters of the CMC: LDM , Ct and RDM and also the coupling coefficients kxd (and therefore the corresponding Mxd ). Note that 101 102 Appendix B. Extraction of parameters of the circuit model the DM parameters of the CMC may easily differ between CMCs with the same part number. Also, the presence of the shielding structures typically modifies LDM [6,56]. 4. An arrangement consisting on the two Cy capacitors along with the CMC. This allows us to determine the couplings kyd (and then Myd) for each case. 5. Finally, from the SDM 21 of the complete filter we determine the coupling coefficients kxy (and then Mxy). In the list above the arrangements are ordered by increasing complexity, not implying that measurements must be done in that particular order. List of Figures 1.1 Measured common mode conducted emissions in an AC to AC converter implementing Si (blue) and SiC (green) switches. Source [15] 3 1.2 Line Impedance Stabilization Network (LISN) for measurement of conducted emissions in neutral ( IN ) and phase ( IP ) due to the product under test operation. Source [7] 3 1.3 Single stage EMI filters 4 3.1 Photograph of a thin-film capacitor opened to show the internal foil winding 15 3.2 Top, front and side views of a thin-film capacitor. Grey surfaces indicate the foil winding inside the capacitor. The area where currents are expected to flow at high frequencies is highlighted in red 15 3.3 Top view of two different possible arrangements of two thin-film capacitors acting as shunt-capacitor filters along with their corresponding lumped-element circuit model. Signal line in orange. Areas where current is expected to concentrate at the bottom of the capacitors are highlighted in red. Yellow lines indicate equivalent wires employed to calculate mutual inductances 17 3.4 Surface current density calculated with ANSYS ® HFSS ™ at 50MHz in two solid pieces of aluminum which simulate the internal structure of capacitor C2 in Table 3.1 for the two arrangements of two thin-film capacitors described in Figure 3.3 18 3.5 Measured and calculated transmission coefficients of four different SC filters mounting a single thin-film capacitor from those listed in Table 3.1 22 3.6 Measured and calculated transmission coefficients of a SC filter mounting one capacitor (C4 in Table 3.1) compared with the use of two capacitors of the same type in the two arrangements of Figure 3.3. Photographs of the three filters are inserted in the figure 23 3.7 Layout and photograph of two SC filters fabricated with three capacitors (type C2 in Table 3.1) in parallel and anti-parallel arrangements. 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