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Multirate cascaded discrete-time low-pass ΔΣ modulator for GSM/Bluetooth/UMTS

Bos, Lynn; Vandersteen, Gerd; Rombouts, Pieter; Geis, Arnd; Morgado García de la Polavieja, Alonso

Abstract

This paper shows that multirate processing in a cascaded discrete-time ΔΣ modulator allows to reduce the power consumption by up to 35%. Multirate processing is possible in a discrete-time ΔΣ modulator by its adaptibility with the sampling frequency. The power reduction can be achieved by relaxing the sampling speed of the first stage and increasing it appropriately in the second stage. Furthermore, a cascaded ΔΣ modulator enables the power efficient implementation of multiple communication standards.@The advantages of multirate cascaded ΔΣ modulators are demonstrated by comparing the performance of single-rate and multirate implementations using behavioral-level and circuit-level simulations. This analysis has been further validated with the design of a multirate cascaded triple-mode discrete-time ΔΣ modulator. A 2-1 multirate low-pass cascade, with a sampling frequency of 80 MHz in the first stage and 320 MHz in the second stage, meets the requirements for UMTS. The first stage alone is suitable for digitizing Bluetooth and GSM with a sampling frequency of 90 and 50 MHz respectively. This multimode ΔΣ modulator is implemented in a 1.2 V 90 nm CMOS technology with a core area of 0.076 mm2. Measurement results show a dynamic range of 66/77/85 dB for UMTS/ Bluetooth/GSM with a power consumption of 6.8/3.7/3.4 mW. This results in an energy per conversion step of 1.2/0.74/2.86 pJ.

Full text

1198 IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 45, NO. 6, JUNE 2010 Mul i a e Cascaded Disc e e-Time Low-Pass 16 Modula o o GSM/Blue oo h/UMTS Lynn Bos, S uden Membe , IEEE, Ge d Vande s een, Senio Membe , IEEE, Pie e Rombou s, Membe , IEEE, A nd Geis, S uden Membe , IEEE, Alonso Mo gado, Y es Rolain, Fellow, IEEE, Gee Van de Plas, Membe , IEEE, and Julien Ryckae , Membe , IEEE Abs ac —This pape shows ha mul i a e p ocessing in a cas- caded disc e e- ime 16 modula o allows o educe he powe consump ion by up o 35%. Mul i a e p ocessing is possible in a disc e e- ime 16 modula o by i s adap ibili y wi h he sampling equency. The powe educ ion can be achie ed by elaxing he sampling speed o he i s s age and inc easing i app op ia ely in he second s age. Fu he mo e, a cascaded 16 modula o en- ables he powe e icien implemen a ion o mul iple communica- ion s anda ds. The ad an ages o mul i a e cascaded 16 modula o s a e demons a ed by compa ing he pe o mance o single- a e and mul i a e implemen a ions using beha io al-le el and ci cui -le el simula ions. This analysis has been u he alida ed wi h he design o a mul- i a e cascaded iple-mode disc e e- ime 16 modula o . A 2-1 mul i a e low-pass cascade, wi h a sampling equency o 80 MHz in he i s s age and 320 MHz in he second s age, mee s he e- qui emen s o UMTS. The i s s age alone is sui able o digi izing Blue oo h and GSM wi h a sampling equency o 90 and 50 MHz espec i ely. This mul imode 16 modula o is implemen ed in a 1.2 V 90 nm CMOS echnology wi h a co e a ea o 0.076 mm 2 . Mea- su emen esul s show a dynamic ange o 66/77/85 dB o UMTS/ Blue oo h/GSM wi h a powe consump ion o 6.8/3.7/3.4 mW. This esul s in an ene gy pe con e sion s ep o 1.2/0.74/2.86 pJ. Index Te ms—Cascade, CMOS, del a sigma modula ion, mul i- mode, mul i a e, sigma del a modula ion. I. INTRODUCTION BY exploi ing o e sampling, a modula o can digi ize a na ow equency band wi h a high esolu ion. Mo e- o e , such a modula o is less sensi i e o he non-ideali ies o i s in insic building blocks compa ed o o he analog o dig- i al con e e s. This is pa ly due o he sp ead in equency o he non-ideal e ec s by he o e sampling and pa ly by he shaping ob ained by he eedback ac ion. This ad an age will be inc easingly impo an as he indus y is d i en by echnology Manusc ip ecei ed Sep embe 15, 2009; e ised Feb ua y 05, 2010; ac- cep ed Feb ua y 21, 2010. Cu en e sion published June 09, 2010. This pape was app o ed by Associa e Edi o Michael Flynn. This wo k was suppo ed by he Ins i u e o he P omo ion o Inno a ion h ough Science and Technology in Flande s (IWT-Vlaande en), he Fund o Scien i ic Resea ch (FWO-Vlaan- de en), he Flemish Go e nmen (Me husalem 1), and he Belgian Fede al Go - e nmen (IUAP VI/4). L. Bos and A. Geis a e wi h IMEC, B-3001 Leu en, Belgium, and also wi h he V ije Uni e si ei B ussel, B ussels, Belgium (e-mail: L[email p o ec ed]). G. Vande s een and Y. Rolain a e wi h he V ije Uni e si ei B ussel, B us- sels, Belgium. P. Rombou s is wi h Ghen Uni e si y, Gen , Belgium. A. Mo gado is wi h he Ins i u e o Mic oelec onics o Se ille (IMSE), CNM-CSIC, Se ille, Spain. G. Van de Plas and J. Ryckae a e wi h IMEC, B-3001 Leu en, Belgium. Digi al Objec Iden i ie 10.1109/JSSC.2010.2046240 scaling, ha con inuously challenges he design o analog ci - cui s wi h he e e inc easing p ocess a ia ions and educed supply ol ages. Al hough con inuous- ime (CT) modula o s a e some- imes a o ed o e disc e e- ime (DT) modula o s o hei low-powe consump ion and wide-bandwid h pe o mance, in case a high esolu ion is equi ed, DT modula o s a e p e e ed o hei easie implemen a ion as cascaded s uc- u es. Indeed, highe esolu ion can be achie ed by inc easing he o de o noise shaping. Howe e , high-o de single-loop modula o s equi e ca e ul design o p e en ins abili y [1] and his can be a oided by cascading se e al inhe en ly s able i s - and second-o de s ages (known as Mul i-s Age noise SHaping, MASH [2]–[4]). The cancella ion o he quan iza ion noise o he i s s age in cascaded a chi ec u es is based on he pe ec ma ch be ween he ans e unc ions in he modula o and he digi al il e ing in he digi al cancella ion il e s. This pe ec ma ch is mo e di icul o ealize in CT modula o s [5]. Mo eo e , CT modula o s a e highly sensi i e o ji e and p ocess a ia ions [5]–[7], while DT modula o s a e app ecia ed o hei obus ness as hei ans e unc ions ely on capaci o a ios. This ad an age will become e en mo e p onounced as echnology will scale u he . Finally, DT modula o s o e a s aigh o wa d econ igu abili y o he sys em by adjus ing he sampling equency. Ne e he- less, since ope a ional ampli ie s (opamps) a e equi ed, he applica ion o hese modula o s emains limi ed, so a , o sampling equencies up o 300 MHz [8]–[11] and signal bandwid hs up o 10 MHz [8], [9]. In his wo k, we exploi he dis ibu ion o he sampling e- quency h oughou DT modula o s as an ex a deg ee o eedom by adding a mul i a e dimension o he sys em [12]. This allows o each a be e powe op imum o he o e all sys em. The bene i s o a mul i a e app oach in a DT de- sign can easily be seen when conside ing he i s in eg a o in he modula o : he i s in eg a o is usually he la ges con ib- u o in he o e all powe consump ion. E o s in he i s s age a e no il e ed by he loop and hus ha e he s onges impac on he ’s esolu ion [13]. Hence, he i s in eg a o mus be designed acco ding o he o e all dynamic ange o he modu- la o . This esul s in highe speci ica ions on i s building blocks and consequen ly, la ge powe consump ion. By educing he sampling speed in he inpu s age, he powe o he i s in e- g a o can be educed while he esul ing loss in esolu ion can be eco e ed by inc easing he clock speed in he la e s ages o he sys em. This inc eased clock speed in he la e s ages o he modula o will ha dly in luence he equi ed speci ica ions 0018-9200/$26.00 © 2010 IEEE BOS e al.: MULTIRATE CASCADED DISCRETE-TIME LOW-PASS MODULATOR FOR GSM/BLUETOOTH/UMTS 1199 Fig. 1. A chi ec u e o he iple-mode mul i a e 2-1 cascaded 16 modula o wi h digi al cancella ion il e s o UMTS, GSM and Blue oo h. o i s building blocks since hei non-ideali ies (noise and dis- o ion) a e a enua ed by he i s s age. In his way, mul i a e p ocessing can be exploi ed o ade pe o mance o powe and lexibili y. Mul i a e p ocessing inside a single-loop modula o e- qui es a decima o in he eedback pa h [12]. This decima ion is c i ical since all i s non-ideali ies a e no supp essed by he loop. This complexi y can be a oided when implemen ing a cascaded a chi ec u e in which he sampling equency is modi ied be- ween he cascaded s ages, since he e is no eedback om he second o he i s s age. A cascaded a chi ec u e also o e s ano he ad an age: a powe e icien implemen a ion in a mul imode con ex by swi ching o he app op ia e las s ages when needed [9]. Each communica ion s anda d (in his wo k GSM, Blue oo h and UMTS) equi es a ce ain esolu ion speci ica ion and hence a di e en o de o he noise shaping [14], [15]. In a cascaded a chi ec u e, he modula o o de is no ixed by he mos demanding communica ion s anda d. Ins ead, he modula o can wo k o example as a second-o de single-loop o as a 2-1 cascade depending on he s anda d speci ica ions. The mul i a e p ocessing echnique was al eady p oposed in [12] in which beha io al-le el simula ions we e used o show ha he esolu ion o a cascaded wi h he i s loop ope - a ing a a sampling equency and he second loop a is equi alen o he esolu ion o a cascade wi h bo h loops ope a ing a . Tha pape [12] concluded ha he e idence o he powe educ ion o he i s s uc u e could only be quan- i ied by ansis o -le el simula ions. No in eg a ed mul i a e cascaded disc e e- ime modula o has been epo ed o he au ho ’s knowledge. To da e, wo mul i a e modula o de- signs can be ound in he li e a u e: a single-loop disc e e- ime [16] and a mul i a e cascaded con inuous- ime [17] mod- ula o . Howe e , bo h hese designs epo simula ion esul s only. Fi s , his wo k p o es wi h beha io al-le el and ci cui -le el simula ions ha mul i a e p ocessing in DT cascaded modula o s enables o educe he powe consump ion. Second, his wo k p esen s he i s implemen ed iple-mode DT mul i a e cascade modula o . The design was ealized in 90 nm CMOS echnology and achie es s a e-o - he-a pe o mance [11]. The measu emen esul s show a dynamic ange o 66/77/85 dB o UMTS/Blue oo h/GSM wi h a powe consump ion o 6.8/3.7/3.4 mW. This esul s in an ene gy pe con e sion s ep o 1.2/0.74/2.86 pJ. The pape is s uc u ed as ollows. Sec ion II desc ibes he sys em-le el a chi ec u e o he iple-mode mul i a e cascaded modula o . Sec ion III p esen s a pe o mance analysis, suppo ed by ci cui simula ions, in which bo h single- a e and mul i a e app oaches a e compa ed in e ms o esolu ion and powe consump ion. This analysis p o ides he speci ica ions o he building blocks o he elec ical design o he modula o . In Sec ion IV, he sys em a chi ec u e and he ci cui opologies o i s a ious building blocks (opamps, swi ched-capaci o in eg a o s, quan ize s) a e speci ied. Also he limi a ions and non-ideal e ec s on he design a e discussed and ad ice o u u e implemen a ions is gi en. Sec ion V epo s he measu emen esul s and emphasizes he imp o emen s ha a e ob ained o e a single- a e app oach. Finally, Sec ion VI concludes he wo k. II. SYSTEM-LEVEL ARCHITECTURE The sys em-le el a chi ec u e o he mul i a e cascaded modula o is shown in Fig. 1 oge he wi h he digi al cancel- la ion il e s. The cascaded s uc u e consis s o a second-o de i s s age ope a ing a a sampling equency o , an upsam- ple wi h an in ege upsampling ac o N and a i s -o de second s age ope a ing a a sampling equency o . The digi al ou pu s eams o bo h s ages a e ecombined wi hin he digi al cancella ion logic ha , ideally, elimina es he quan iza- ion noise o he i s s age. This ecombina ion can be done a wo di e en a es: ei he he ou pu o he i s s age is upsam- pled o he ou pu o he second s age is downsampled, he la e being shown in he schema ic o Fig. 1. The i s second-o de s age alone achie es a su icien pe o mance o he Blue oo h and GSM s anda ds while he ull 2-1 cascade is necessa y o mee he UMTS speci ica ion. A de ailed block diag am o he modula o , wi hou digi al cancella ion il e s, is shown in Fig. 2. The i s s age uses a eed- back opology wi h an ex a eed o wa d b anch om he inpu o he second in eg a o inpu o educe he ou pu swing o he i s in eg a o . In bo h s ages, 1.5-bi quan ize s a e employed o u he educe he ou pu swing o he in eg a o s and imp o e he dynamic ange o he modula o . This can be done easily be- cause a 1.5-bi ( h ee-le el) digi al analog con e e (DAC) can eadily be implemen ed using a ully di e en ial swi ched-ca- paci o ci cui [18]. To calcula e he ans e unc ion o a modula o , he quan ize is eplaced by a linea model ( wi h 1200 IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 45, NO. 6, JUNE 2010 Fig. 2. Ci cui implemen a ion o he mul i a e 2-1 cascaded 16 modula o . he quan ize gain and he quan iza ion noise). The dig- i al ou pu s eams o he i s and second s ages and op- e a ing wi h a sampling equency o and espec i ely can be exp essed as (1) (2) wi h (3) and he upsampling il e (4) while , a e espec i ely he quan ize gain o he i s and second s age, , and , s and o he inpu signal and quan iza ion noise o he i s and second s age, espec i ely. The ela ionship be ween he loop coe icien s and he quan ize gain a e de i ed by ensu ing a second-o de noise shaping in he i s s age: (5) (6) and a i s -o de shaping in he second s age [13]: (7) A e upsampling he digi al ou pu o he i s s age and p o- cessing he wo digi al s eams in he cancella ion il e , he ou pu o he ull cascade becomes (8) In o de o cancel he quan iza ion noise o he i s s age , he digi al cancella ion il e s mus be chosen equal o (9) (10) wi h (11) (12) The ou pu o he cascade gi es a e pe ec cancella ion o (13) III. PERFORMANCE ANALYSIS This sec ion ex ac s he pe o mance in e ms o esolu ion and powe consump ion o he 2-1 cascaded modula o (shown in Fig. 2) o di e en se ings o he upsampling ac o and he sampling equency used in he i s s age. Fi s , he esolu ion is es ima ed using beha io al-le el simula ions wi h an ideal model. Nex , o compa e he powe consump ion o each con igu a ion, simula ions o ansis o -le el opamps a e pe o med. Since he global powe consump ion is domina ed by he opamps, he equi ed speci ica ions on hese ampli ie s, BOS e al.: MULTIRATE CASCADED DISCRETE-TIME LOW-PASS MODULATOR FOR GSM/BLUETOOTH/UMTS 1201 TABLE I RESOLUTION OF THE DIFFERENT CONFIGURATIONS OF 2-1 CASCADE 16 MODULATOR OBTAINED BY BEHAVIORAL-LEVEL SIMULATIONS GBW and SR, a e de e mined o es ima e he global powe con- sump ion. A. Ex ac ion o he Resolu ion In his sec ion he esolu ion is de e mined o an ideal cas- caded modula o o di e en upsampling ac o s and sam- pling equencies. The 2-1 cascade modula o desc ibed in Sec ion II has been modeled by using unc ional blocks in Simulink [19]. The i e di e en es cases in he beha io al-le el simula- ions a e shown in Table I. Among hese es cases, h ee upsam- pling ac o s we e conside ed: o he single- a e case, and o he mul i a e case. The mul i a e se ing is chosen as a e e ence o compa ison. In his e e ence design, he o e sampling a io o he i s s age is chosen o achie e an o e all ENOB o he cascade highe han 10 bi s in a signal bandwid h o 1.92 MHz ( he speci ica ion o UMTS). This leads o a sampling equency in he i s s age o 80 MHz. In he single- a e as well as in he mul i a e case, sam- pling equencies o 80 MHz and 160 MHz ha e been consid- e ed o he i s s age o s udy he e ec o he sampling e- quency and he upsampling ac o on he esolu ion and powe consump ion. The ollowing se ings we e used in he beha io al-le el model: • All he loop coe icien s, shown in Fig. 2, a e equal o 1/2. Thei alue was maximized, in o de o minimize he ca- paci i e load, un il he ou pu swing o he in eg a o s hi s hal he supply ol age . In hese condi- ions, is equal o 3 [using (11)] and equal o 2 [using (12)]. • The e e ence ol age o he DAC is ixed o 0.8 V. In- c easing he e e ence ol age inc eases he dynamic ange o he modula o . Howe e , he ou pu s o he opamps e- qui e a ce ain head oom o unc ion p ope ly. This head- oom is de e mined by he sa u a ion equi emen o he ou pu s age o he opamp. • The inpu sine wa e ampli ude is se o . The esul ing ENOB a e gi en in Table I. We obse e ha he single- a e se ing wi h MHz (second ow in Table I), he mul i a e se ing wi h and MHz ( ou h ow in Table I) as well as he mul i a e se ing wi h and MHz ( i h ow in Table I) achie e he highes ENOBs. Hence, hey a e he p e e ed con igu a ions o p o- ide a su icien SNDR ma gin o he ansis o -le el design. As p edic ed by [12], he esolu ion o he single- a e cascade Fig. 3. Implemen a ion o he disc e e- ime swi ched-capaci o in eg a o wi h a h ee-le el DAC. a 160 MHz (second ow in Table I) and he mul i a e cascade, wi h he i s s age a 80 MHz and he second s age a 320 MHz ( i h ow in Table I), achie e simila pe o mance. B. Ex ac ion o he Powe Consump ion In his sec ion, he powe consump ion is analyzed o h ee ou o he i e es cases abo e [(1), (2), and (5)] om Table I. The o al powe consump ion o he sys em is mainly de e - mined by he GBW and SR me ics o he opamps and hese ampli ie s a e assumed o be he dominan con ibu o s in he global powe consump ion. This assump ion will be con i med by he ansis o -le el simula ions o he global sys em as de- sc ibed in Sec ion IV-E. The modula o in Fig. 2 has been im- plemen ed in Spec e wi h all he opamps blocks mapped o a ansis o -le el design in a 90 nm CMOS echnology. All he o he building blocks we e modeled using a Ve ilog-A model. The powe consump ion es ima ion was ealized by ex ac ing he equi ed cu en speci ica ions o he opamps in he di - e en con igu a ions. The ci cui -le el model was buil as ollows: • Each swi ched-capaci o in eg a o (SCI) was imple- men ed as shown in Fig. 3 (mo e explana ion can be ound in Sec ion IV-A). The capaci i e loading o each opamp was added in he ci cui -le el model. • The main design c i e ia o he opamp in he SCI a e su - icien DC gain and ou pu swing, la ge GBW and SR. A wo-s age opamp opology was chosen o p o ide DC gain up o 55 dB [20]. The ampli ie consis s o a olded-cascode inpu s age ollowed by a Mille compensa ed common- sou ce s age [Fig. 4(a)]. As can be seen, one cascode an- sis o in he i s s age was emo ed o ensu e he sa u a ion o he h ee s acked ansis o s ed wi h a supply ol age o 1.2 V. The second s age was added o inc ease he ou pu swing o he opamp. The speci ica ions on he GBW and 1202 IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 45, NO. 6, JUNE 2010 TABLE II SPECIFICATIONS ON THE OPAMPS AND RESOLUTION FOR DIFFERENT CONFIGURATIONS OF THE 2-1 CASCADE 16 MODULATOR OBTAINED BY OPAMP TRANSISTOR-LEVEL SIMULATIONS Fig. 4. Topology o (a) he opamp and (b) i s common-mode eedback ci cui . he in e nal SR (de e mined by he bias cu en o he inpu s age and he Mille capaci o ) de e mine . The ex e nal SR (de e mined by he ou pu s age cu en and he load capaci ance) o he ampli ie s can be adjus ed acco ding o he equi ed sampling equency by a ying . The Mille capaci o is chosen o be abou a ac o o 2 smalle han he load capaci o . To educe he powe consump ion, he ou pu cu en is educed as much as pos- sible (which dec eases he ex e nal SR). The e o e, in his case, he ex e nal SR is simila o he in e nal SR. The con inuous- ime common-mode eedback ci cui is gi en in Fig. 4(b). A small capaci o was added in pa allel wi h he common-mode sensing esis o s o p o ide su icien common-mode phase ma gin. • The inpu sampling capaci o s a e se o 450 F and 300 F o he i s and second SCI o he i s s age and 200 F in he SCI o he second s age. These capaci o alues esul om a comp omise be ween noise, ma ching sensi- i i y and capaci i e loading o he opamps. • The swi ches a e modeled in Ve ilog-A wi h an on/o - e- sis ance. • The quan ize s in Ve ilog-A ha e a delay, ise and all ime. • The upsample is modeled by an ideal sample and hold con olled by he clock o he i s s age. The samples held a e hen ans e ed o he second s age a a a e imes highe depending on he es case. The minimum equi emen s (shown in Table II) o he h ee opamps in he 2-1 cascade in he h ee con igu a ions ha e been ound by i e a i ely dec easing hei alue un il he modula o esolu ion s a s o deg ade. The ex e nal SR and he ela ed , beha e as expec ed; doubling he sampling equency in he i s s age equi es dou- bling he o he i s s age ampli ie s [ om case (1) o (2) o Opamp 1 and Opamp 2]. The ex e nal SR equi emen on he second s age ampli ie (Opamp 3) is ela i ely lowe han ha o he i s s age (Opamp 1 and 2) in he single- a e cases [(1) and (2)]. This can be explained by he ac ha he i s s age has he highes impac on he o e all esolu ion and hus he speci- ica ions on i s building blocks a e he mos demanding. Conside ing he GBW, he in e nal SR and he ela ed ,i can be seen ha he equi emen s in he second-s age ampli ie (Opamp 3) a e also ela i ely lowe han hose o he i s s age (Opamp 1 and 2) in he single- a e cases [(1) and (2)]. The equi emen s o he i s s age a e hal ed when compa ing he single- a e case a 160 MHz and he mul i a e case [case (2) o (5)]. The equi emen s o he single- a e case a 80 MHz and he one a 160 MHz canno be compa ed since he esolu ion o he i s es -case is lowe . These obse a ions lead o he conclusion ha , in o de o achie e low powe consump ion, he sampling equency o he i s in eg a o needs o be kep as low as possible. Mo eo e , inc easing he sampling equency in he second s age can be done wi hou subs an ially a ec ing he powe consump ion. To ob ain he o al cu en consump ion o each opamp o each con igu a ion, he cu en o he inpu s age, he ou pu s age, he cascode and he CMFB ci cui o each opamp a e summed. Consequen ly, he mul i a e se ing wi h a minimal and a maximal appea s o be he op imal in e ms o powe consump ion o a ixed esolu ion. The o al ou pu cu en consump ion o his se ing (5) is 35% lowe han ha o he single- a e case, sampling a 160 MHz (2). BOS e al.: MULTIRATE CASCADED DISCRETE-TIME LOW-PASS MODULATOR FOR GSM/BLUETOOTH/UMTS 1203 The esolu ion o he di e en ci cui -le el con igu a ions (Table II) is compa able wi h he esul s ound by beha - io al-le el simula ions in Simulink (Table I). IV. CIRCUIT IMPLEMENTATION To alida e he concep a he ansis o -le el and e i y he esul s ob ained in Sec ion III, he mul i a e 2-1 cascade modula o o Fig. 2 has been implemen ed in a 90 nm digi al CMOS p ocess. The ci cui was designed o ope a e a an up- sampling ac o o 4 and a sampling equency MHz. A single- a e se ing o 80 MHz was also implemen ed o com- pa ison pu poses. To demons a e he mul imode pe o mance o he cascaded modula o s, he i s s age alone was designed o digi ize GSM and Blue oo h a a sampling equency o 50 MHz and 90 MHz, espec i ely. The wo-s age cascade was a ge ed o he UMTS s anda d wi h a sampling equency o 80 MHz and 320 MHz in he i s and he second s age, espec i ely. This sec ion desc ibes he o e all chip implemen a ion and he opology o he building blocks in he modula o . The di e en building blocks used in he sys em a e he swi ched- capaci o in eg a o s, he quan ize s and he upsample . A. Swi ched-Capaci o In eg a o The opology o he SCI is shown in Fig. 3. This ci cui em- ploys bo om-pla e sampling o educe he sensi i i y o pa a- si ic capaci ances and cha ge injec ion. The swi ches a e imple- men ed as MOS ansmission ga es, which comp ise he pa - allel connec ion o an nMOS and a pMOS swi ch o educe he dependency o he on- esis ance wi h he d ain sou ce ol age. The bias cu en o he inpu s age o he opamp shown in Fig. 4, is de e mined by he speci ica ions on he GBW and he in e nal SR. I is se o app oxima ely 350 A. As his cu - en has a negligible con ibu ion o he o al powe consump- ion, i is ixed o he h ee ampli ie s. The wid h o he ou pu ansis o o he ampli ie o he hi d in eg a o was doubled wi h espec o he i s and second one, in o de o p o ide he necessa y double ou pu cu en in he mul i a e case wi h . The bias cu en and ou pu s age cu en can be adjus ed o achie e he equi ed GBW, he in e nal SR and he ex e nal SR o all opamps du ing measu emen s. The con inuous- ime common-mode eedback only consumes abou 300 A o cu en . MOM-capaci o s we e used o enable he ab ica ion in a digi al 90 nm CMOS p ocess. B. Quan ize The 1.5-bi quan ize needs o pe o m a h ee-le el quan iza- ion o he inpu . I consis s o wo iden ical blocks, comp ising a compa a o p eceded by a swi ched-capaci o (SC) ne wo k [Fig. 5(a)]. This SC ne wo k gene a es wo ol age h esholds a a le el o and by shi ing he posi i e o he nega i e inpu signal by depending on he h eshold. The used sampling capaci o is 200 F. The 1.5-bi ou pu da a, is ex ac ed by sub ac ing bo h ou pu s. The compa a o [Fig. 5(b), le ] is based on a egene a i e la ch d i ing a Se -Rese (SR) la ch [Fig. 5(b), igh ]. Fig. 5. Implemen a ion o (a) he 1.5-bi quan ize and (b) he compa a o . C. Upsample The upsample in e pola es he quan iza ion e o signal o he i s s age by a ac o o 4. The quan iza ion e o is equal o he sub ac ion o he ou pu o he loop il e and he digi al ou pu o he ADC. The upsampling ope a ion o he ou pu o he loop il e is implemen ed by eplacing he swi ched-capac- i o sampling ne wo k o SCI by he s uc u e in Fig. 6. Du ing , he ou pu o SCI is sampled on ou equal sampling ca- paci o s, each wi h a alue o 200 F. The samples a e hen suc- cessi ely p ocessed in ou clock phases by SCI , using he 4 imes as e clock o he second s age. Since he ou pu o he 1.5-bi quan ize is held cons an du ing he en i e sampling pe iod o he i s s age, i s ol age can be sampled di ec ly wi h he sampling clock o he second s age. In addi ion o his mul i a e mode, a single- a e mode o he cascade is o eseen by p ocessing only one o he ou upsam- pling capaci o s. D. Non-Ideali ies and Limi a ions o he Modula o This sec ion p o ides some conside a ions abou he non-ide- ali ies in his mul i a e cascade modula o . I also gi es some hin s o u u e implemen a ions. Finally, he limi a ions o he applica ion o his mul i a e cascade modula o a e discussed. • In he cu en implemen a ion, he upsample loads he second SCI by i s ou pa allel sampling capaci o s, which inc eases he capaci i e load o his SCI. Mo eo e , he sho sampling ime o he upsample equi es he second SCI o se le in a 4 imes sho e ime ame. This cons ain he e o e inc eases he equi ed GBW and SR speci ica ions and his esul s in simila equi emen s o he second opamp as o he i s one. This e ec was also 1204 IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 45, NO. 6, JUNE 2010 Fig. 6. Implemen a ion o he upsample . TABLE III PERFORMANCE FOR THE 2-1 CASCADE 16 MODULATOR OBTAINED BY TRANSISTOR-LEVEL SIMULATIONS obse ed in he ci cui -le el simula ions in Sec ion III-B. In addi ion, he quan ize o he i s s age needs o se le 2 o 4 imes as e , because i s decision is al eady needed in . Fo una ely, he powe consump ion o his as e quan ize is negligible wi h espec o he one o he am- pli ie s. The wo discussed issues could be alle ia ed by se e al echniques, e.g., he ime-in e lea ing o he sam- pling capaci o o he second s age and allowing a clock cycle delay in he a chi ec u e. • In a u u e design, ex a a en ion will be de o ed o isola ing he sampling o he ou pu o he second in eg a o by he upsample om he sampling by he quan ize o he i s s age. I bo h sampling e en s occu a he same ins an , he load o he second in eg a o is inc eased and sampling spikes a e p oduced. To coun e ac his, he quan ize o he i s s age was sligh ly skewed, bu in a u u e design a mo e elegan solu ion should be ound. An al e na i e solu ion is o use a eed o wa d s uc u e in he i s s age. Indeed, in a eed o wa d s uc u e, he inpu o he second s age is aken di ec ly a e he second in eg a o , so be o e he eed o wa d addi ion. This ensu es a p ope isola ion be ween he quan ize sampling and he upsample by he adde . Un o una ely, his a chi ec u e equi es an adde , which esul s in ex a powe consump ion. • As men ioned in he in oduc ion, cascaded modula- o s in gene al a e sensi i e o capaci o misma ches. To e i y his sensi i i y, he sampling capaci o s we e modi- ied by 1% and he pe o mance, esul ing om his an- sis o -le el simula ion, showed ha he e is no impac . This was con i med by he measu emen s, which p o ed ha an op imiza ion o he digi al coe icien s in he digi al can- cella ion il e s did no inc ease he pe o mance. A sim- ula ion o he ansis o -le el implemen a ion in he ou p ocess co ne s showed a maximum loss o 1 bi in he case o slow–slow. TABLE IV CURRENT BREAKDOWN FOR THE MULTIRATE 2-1 CASCADE 16 MODULATOR AS OBTAINED BY TRANSISTOR-LEVEL SIMULATIONS Fig. 7. Chip mic opho og aph. • The p oposed mul i a e cascade equi es a 4 imes highe sampling equency in he second s age. The a ainable bandwid h in he design o ope a ional ampli ie s limi s he maximum sampling equency o abou 320 MHz nowa- days. The simula ions o he implemen ed swi ched-ca- paci o in eg a o in he second s age show, howe e , ha he ou pu only has o se le o abou 70% o he heo- e ical p edic ed ou pu , wi hou de e io a ing he pe o - mance. Ne e heless, o communica ions s anda ds wi h signal bandwid hs la ge han 10 MHz, he applica ion o his mul i a e cascading can be limi ed by he achie able sampling equency o he opamps. In his case, i will be necessa y o limi he upsampling ac o o maximally 2. E. Simula ed T ansis o -Le el Pe o mance To ex ac he nominal esolu ion o he mul i a e cascade, ansis o -le el simula ions o he ull chip o each s anda d BOS e al.: MULTIRATE CASCADED DISCRETE-TIME LOW-PASS MODULATOR FOR GSM/BLUETOOTH/UMTS 1205 Fig. 8. (a) Measu ed spec a a peak SNDR o UMTS; (b) he compa ison o he mul i a e and single- a e cascade o UMTS zoomed in om 0.8 MHz un il 10 MHz, (c) Blue oo h and (d) GSM. ha e been pe o med. The esolu ion and powe consump ion a e summa ized in Table III. The UMTS s anda d was simu- la ed wi h a sine wa e inpu wi h an ampli ude o 0.8 V and a equency o 0.5 MHz. The cascade is also simula ed in a single- a e mode a 80 MHz. The cascade could no be simu- la ed wi h a sampling equency o 160 MHz since he i s s age is no designed o his highe sampling equency. A simula ed cu en consump ion b eakdown o he ull mul i a e cascade is also shown in Table IV. These powe igu es show ha , al hough he second s age wo ks a ou imes he sampling equency o he i s s age, i s consump ion emains compa able o he i s s age SCIs. This is achie ed by elaxing i s speci ica ions and he e o e demons a es he po en ial o a mul i a e app oach in cascaded modula o s. I also con i ms he assump ion ha he powe consump ion is de e mined by he ope a ional ampli ie s. The ansis o -le el simula ions o bo h he esolu ion and he powe consump ion a e in good ag eemen s wi h he mixed-le el simula ions o Sec ion III-B. The modula o has been ab ica ed in a digi al 90 nm CMOS p ocess [11], which means ha no analog op ions we e p o- ided. The chip mic opho og aph is shown in Fig. 7. The ac i e a ea o he modula o including swi ched-capaci o in eg a o s, quan ize s, clock gene a ion and DAC is only 0.076 mm . The p ocessing by he digi al cancella ion il e s is done in Ma lab. V. EXPERIMENTAL RESULTS This sec ion discusses he measu emen esul s: esolu ion, powe consump ion, dis o ion, compa ison o mul i a e and single- a e mode and he compa ison wi h o he mul imode disc e e- ime modula o s. A. Resolu ion and Powe Consump ion The measu emen o he UMTS mode spec um gene a ed by he mul i a e cascaded echnique is shown o he peak SNDR in Fig. 8(a), whe e he no ch a esul s om he upsampling in he digi al cancella ion logic. Wi h a o al powe consump ion o 6.83 mW d awn om 1.2 V supply, a peak SNDR o 65.5 dB is achie ed. This esul s in an ENOB o 10.5-bi and a igu e o me i o 1.2 pJ pe con e sion s ep o he mul i a e cascade. The ou pu spec um o he modula o in he GSM and Blue- oo h modes a e shown o peak SNDR in Fig. 8(c) and (d). Wi h a powe consump ion o 3.43 mW and 3.7 mW, a peak SNDR o 77 dB and 76 dB is achie ed o GSM and Blue oo h, espec- i ely. This esul s in a FoM o 2.86 pJ/con and 0.74 pJ/con . The esolu ion as well as he powe consump ion a e in good co ela ion wi h he ansis o -le el es ima ions. Fig. 9 shows he SNDR e sus he inpu ampli ude o he di - e en modes. A dynamic ange (DR) o 66/77/85 dB is achie ed o UMTS/Blue oo h/GSM, espec i ely. 1206 IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 45, NO. 6, JUNE 2010 TABLE V MEASURED PERFORMANCE OF THE 2-1 CASCADE 16 MODULATOR FOR 3S TANDARDS Fig. 9. Measu ed SNR e sus inpu ampli ude o he 16 modula o o h ee s anda ds: UMTS, Blue oo h and GSM. B. Dis o ion The spec um esul ing om a 2- one es wi h 175 and 200 kHz in he UMTS mode is shown in Fig. 10. The hi d-o de in e modula ion dis o ion (IM3) is 76 dB wi h each one a 10.9 dBFS ( he powe whe e he peak SNDR has been eached). Simila pe o mance is ob ained o he o he modes. A o al ha monic dis o ion (THD) o 75/81/80.5 dB and a spu ious- ee dynamic ange (SFDR) o 79/83/83 dB is eached a he peak SNDR o UMTS/Blue oo h/GSM. C. Compa ison o Single-Ra e and Mul i a e Pe o mance The mul i a e pe o mance was also compa ed o a single- a e pe o mance a a sampling equency o 80 MHz ( he slew- a e equi emen s o he ampli ie s a e educed acco dingly). The single- a e se ing p o ides a ma ginal educ ion o he powe consump ion (6.43 mW). Howe e , he SNDR d opped by 7 dB. The esul ing FOM is 2.38 pJ/con , which is he double o he mul i a e se ing. This clea ly shows ha mul i a e ope a ion o e s a pe o mance imp o emen . The op igh o Fig. 8(b) Fig. 10. Measu ed hi d o de in e modula ion dis o ion o he mul i a e 2-1 16 modula o o UMTS. shows he shaping imp o emen o he mul i a e app oach on he ou pu spec um. The single- a e se ing has a THD o 68.3 dB a a peak SNDR and a SFDR o 70.5 dB. D. Conclusion Table V summa izes he measu ed pe o mance o he design. Fig. 11 compa es he FoM (compu ed wi h DR) o di e en mul imode disc e e- ime modula o s [9], [21]–[25]. Re s. [21], [22], [24] use a single-loop a chi ec u e o ealize a mul- imode modula o , while [9], [23], [25] employ a cascaded a chi ec u e. The ou s a s on he igu e ep esen he achie ed pe o mance o GSM, Blue oo h, he non-op imized single- a e al e na i e o UMTS and he p oposed mul i a e solu ion o UMTS. I can be obse ed ha he p oposed chip demons a es s a e-o - he-a pe o mance. Re s. [21], [24] use 0.18- m ech- nology, he es 0.13- m echnology and hei a ea is a leas 2.5 imes as la ge as his wo k [11].