An Enhanced Gain-Bandwidth Class-AB Miller op-amp with 23,800 MHz·pF/mW FOM, 11-16 Current Efficiency and Wide Range of Resistive and Capacitive Loads Driving Capability

Received March 28, 2021, accepted April 18, 2021, date of publication May 4, 2021, date of current version May 17, 2021. Digital Object Identifier 10.1109/ACCESS.2021.3077532 An Enhanced Gain-Bandwidth Class-AB Miller Op-Amp With 23,800 MHz·pF/mW FOM, 11-16 Current Efficiency and Wide Range of Resistive and Capacitive Loads Driving Capability ANINDITA PAUL 1, (Member, IEEE), JAIME RAMÍREZ-ANGULO 2,3, (Life Fellow, IEEE), ALEJANDRO DÍAZ SÁNCHEZ3, (Member, IEEE), ANTONIO J. LÓPEZ-MARTÍN 4, (Senior Member, IEEE), RAMON GONZALEZ CARVAJAL 5, (Fellow, IEEE), AND FRANK X. LI1, (Member, IEEE) 1Rayen School of Engineering, Youngstown State University, Youngstown, OH 44555, USA 2Klipsch School of Electrical and Computer Engineering, New Mexico State University, Las Cruces, NM 80030, USA 3Department of Electronics, National Institute of Astrophysics, Optics and Electronics, Puebla 72000, Mexico 4Institute of Smart Cities, Public University of Navarra, 31006 Pamplona, Spain 5Department of Electronic Engineering, University of Seville, 41092 Sevilla, Spain Corresponding author: Anindita Paul ([email protected]) This work was supported in part by the Spanish Government Agencia Estatal Development Investigación (AEI) through the Fondo Europeo de Desarrollo Regional (FEDER) under Grant TEC2016-80396-C2, in part by the Consejería Development Economía y Conocimiento of Junta de Andalucía through the Fondo Europeo de Desarrollo Regional (FEDER) under Grant P18-FR-4317, and in part by the Consejo Nacional de Ciencia y Tecnologia (CONACyT) under Grant A1-S-43214. ABSTRACT A compact power-efficient class-AB Miller op-amp is introduced. It uses a simple auxiliary circuit that enhances the op-amp’s gain-bandwidth product and helps to drive a wide range of capacitive and resistive loads with high static and dynamic current efficiency. Simple Miller compensation is used to obtain stability over a wide range of loading conditions. The op-amp’s simulation and experimental results in strong inversion with 15µA bias current and in sub-threshold with 250nA bias current are shown. Its performance is measured in terms of dynamic and static current efficiency figures of merit FOMCEDyn and FOMCEStat. and using the conventional small-signal figure of merit FOMSS.Experimental results of op-amps fabricated in a 130nm CMOS technology are shown that validate the proposed approach. INDEX TERMS Analog integrated circuit, class-AB amplifier, Miller compensation, voltage follower, wide range load. I. INTRODUCTION The conventional class-A (Conv-A) Miller op-amp with the NMOS differential input stage is shown in Fig. 1. It can provide relatively large positive output currents and a maximum negative output current that is limited by the quiescent current of the output transistors IMOutQ determined by MON. This current also limits the slew-rate of the op-amp to a low value SR =IMOutQ/(Cc+CL) and the current efficiency CE=IoutMAX /ItotQ to a value CE=IMOutQ/(IMOutQ+2IB)<1 (CE<0.5 in most class-A op-amps) where IBand ItotQ The associate editor coordinating the review of this manuscript and approving it for publication was Teerachot Siriburanon . are the bias and total quiescent current of the op-amp. Some approaches [1], [2] have been published to implement power-efficient class-AB output stages that can provide transient maximum negative and positive output currents much larger than IMOutQ during a limited period of time τ. The value of τdepends on the RC time constant of a high pass network used in the op-amp. These approaches are appropriate for purely capacitive loads and/or for resistive loads at signal frequencies f1/(2πRC). This kind of op-amp is called here dynamic-class-AB op-amp. A simple implementation of such dynamic-class-AB Miller op-amp denoted ‘‘Free-Class-AB op-amp’’ (Free-AB) was reported in [1] and it is shown in Fig. 2. It requires just one additional large resistance device VOLUME 9, 2021 This work is licensed under a Creative Commons Attribution 4.0 License. For more information, see https://creativecommons.org/licenses/by/4.0/ 69783 A. Paul et al.: Enhanced Gain-Bandwidth Class-AB Miller Op-Amp FIGURE 1. Class-A miller op-amp with NMOS input stage. FIGURE 2. Free-Class-AB op-amp. RLarge ∼100ks and a moderate-sized capacitor CBAT ∼pFs. This scheme is very efficient since it does not increase quiescent power dissipation or supply requirements. It is a dynamic approach that uses the capacitor CBAT as a battery during a short period that passes fast transient voltage variations at node X to node Y with small attenuation. A limitation of the Free-Class-AB approach is that it can hold large peak negative output currents only during a period of time that is determined by the time constant τ=RLargeCBAT . Even though τcan be made relatively large (in the range of seconds) utilizing quasi-floating gate transistors [3] to implement values RLarge ∼10Gs. However, it has the following disadvantages: a) it still cannot hold a large negative current (or voltage) at the output for a very long period of time or indefinitely as it is required in some applications (i.e., in temperature control, some biomedical and some instrumentation applications, etc.) and b) it can lead to a relatively long turn-on time of the op-amp which is not convenient for power management applications. Other reported approaches can deliver large negative currents indefinitely. These are called here ‘‘static-class-AB amplifiers’’ and can be used for high resistive loads (low valued resistance) that might require a large negative load current for an extended period of time or even indefinitely. Most static-class-AB approaches [4]–[6] require relatively complex additional control circuitry. This can increase the supply requirements and static power dissipation. It leads to a degradation of the op-amp current efficiency CE, defined by CE=IoutMAX /ItotQ where IoutMAX =Min{IoutMAX +,| IoutMAX −|}is the minimum of the peak static positive and FIGURE 3. (a) Class-AB output stage of an op-amp with floating battery (b) Buffer with level shift acting as a floating battery. negative output peak currents. For this reason, they cannot be used in modern CMOS technology that operates from reduced supply voltages with the requirement for high current efficiency (i.e., in IoT edge node applications). The circuits of [7] and [8] are popular static-class-AB output stages. However, they have very low CE with reduced supply voltage. The basic implementation of a static-class-AB (push-pull) output stage can be represented conceptually by the insertion of a circuit that mimics a floating battery VBAT between the gates of the two output transistors as shown in the op-amp with an NMOS differential input stage of Fig. 3(a). In this scheme, the floating battery VBAT transfers voltage variations at the gate of the PMOS output transistor (node X) to the gate of the NMOS output transistor (node Y). Positive voltage changes in node X lead to positive changes in node Y. This causes the current in the NMOS output transistor to increase and at the same time, the current in the PMOS transistor to decrease. When X decreases, Y decreases too, causing the current in the PMOS output transistor to increase and that of the NMOS output transistor to decrease. This ‘‘push-pull’’ operation generates negative output currents which can be larger than the static current IMOutQ of the output stage. The practical implementation of the floating battery requires additional 69784 VOLUME 9, 2021 A. Paul et al.: Enhanced Gain-Bandwidth Class-AB Miller Op-Amp control circuitry to establish the desired nominal quiescent current IMOutQ at the output stage. This IMOutQ is set by the quiescent gate voltage Y of the NMOS output transistor. This control circuitry automatically adjusts the value of VBAT so that the quiescent gate-source voltage of the NMOS output transistor VGSQN =(VDD −VSS )−VSGQP −VBAT generates a quiescent current IMOutNQ,which matches the desired nominal quiescent current IMOutPQ of the PMOS output transistor, where VGSQN and VSGQP are the gate source voltages of MON and MOP. This is set by the quiescent value of the voltage at node X, which should match the quiescent voltage VZ at node Z. In a robust design this should be independent of the value of the total supply voltage Vsupply =VDD − VSS , of transistor/technology parameters and of temperature variations. A drawback of the basic scheme of Fig. 3(a) is that the peak positive variation of the voltage at node X is limited to a maximum value VSGQP (but it is smaller in practice). This relatively small positive change in X transferred to node Y can lead to just a modest boosting in the negative output current (and in the negative slew rate and CE). Therefore, this basic scheme is characterized by a relatively low current efficiency CE with reduced supply voltages. Another way to represent the scheme of Fig. 3(a) is in terms of a unity gain auxiliary buffer with level-shift connected between nodes X and Y as shown in Fig. 3(b). Many authors have reported staticclass-AB output stages based on direct implementations of the floating battery (i.e., [7]–[9]) of Fig. 3(a), where changes in X are transferred directly (in practice with attenuation) to Y as indicated before. The control circuitry increases the static power dissipation and the op-amp supply requirements and might not significantly boost the peak negative output current. For this reason, most of the reported schemes based on the direct battery implementation are characterized by a CE value that is not much higher than that of a conventional class-A op-amp. A typical representative implementation of the scheme of Fig.3(b) based on the utilization of a source follower MVF [9] is shown in Fig. 4 along with the required control circuit (enclosed in a box with dashed lines in Fig. 4b). In this implementation, the voltage follower transistor MVF transfers variations from node X to node Y. If there is a body effect, it causes the variations at Y to be attenuated by approximately 20-30% w.r.to the variations at X. The inclusion of MVF increases the op-amp’s minimum supply requirements from VDDsupplyMIN =VGS +2VDSsat to a value VDDsupplyMIN =3VGS which prevents this scheme from being used in low voltage applications. A quiescent output current control circuit based on replicating the branches with the voltage follower and output transistors is shown in Fig. 4(b). The addition of the control circuit in this and other class-AB approaches (i.e., in [4]) increases the total quiescent power dissipation of the op-amp, reducing current efficiency and leading to a relatively modest boost of the peak negative output current. In this paper, a power-efficient static-class-AB op-amp is reported that can drive both resistive and capacitive loads. Thus, it can provide static and dynamic positive and negative FIGURE 4. (a) Example of Class-AB output stage using a VF as a battery with level shift (b) Replica bias control circuit for generation of VCNTR so that quiescent output current is independent on VDD, technology parameters, and temperature. load currents, which can be much higher than the quiescent current of the output stage IMOutQ. This scheme uses a simple control circuit that does not increase the supply requirements and requires minimal additional quiescent current (15%). It is described in Section-II. The performance of the proposed op-amp is measured in terms of: a) the conventional small-signal Figure of Merit:FOMSS =fu·CL/PQhere fu denotes the unity gain frequency of the op-amp b) a large signal static current efficiency figure of merit: FOMCEStat = IoutMAXRL/PQand c) the conventional large signal dynamic current efficiency figure of merit:FOMCEDyn =SR ·CL/PQ which is related to the maximum dynamic output current in load capacitance CL.FOMCEStat is determined by the maximum DC output current in load resistor RL(denoted IoutMAXRL) relative to the total quiescent power PQof the opamp. Two additional figures of merit are also reported here in order to account for the Silicon area: a) AFOMCEDyn=(SR·CL)/(PQ·Area), b) AFOMSS =(fu·CL)/(PQ·Area). Where Area is the Silicon Area. Section-III shows the simulation results of the proposed class-AB amplifier in strong inversion and in subthreshold. Section-IV shows experimental results of a fabricated test chip prototype that VOLUME 9, 2021 69785 A. Paul et al.: Enhanced Gain-Bandwidth Class-AB Miller Op-Amp FIGURE 5. Proposed op-amp. includes a conventional class-A, a Free-AB, and the proposed op-amp. All of them were fabricated on the same chip and operated with the same supply and bias currents. Section-V provides conclusions. II. PROPOSED OP-AMP In the proposed approach, a simple auxiliary amplifier is used to provide amplified voltage variations at node Y that are in phase with those at node X and set the quiescent output current IMOutQ to a desired nominal value. The proposed op-amp is shown in Fig. 5. The auxiliary amplifier is formed by transistors M3-M6. Transistors M4and M4P form a differential stage with a tail transistor M3that delivers a bias current IB. The straightforward analysis shows that the small-signal gain from X to Y (assuming voltage at node Z is approximately constant) is given by AY=VY/VX=gm4/(2RY) where RYis the resistance at node Y, and gm4is the transconductance of M4,4P. Transistors M4,4P have their sources connected to their bulk terminals and large W/L ratios to provide headroom to the tail transistor M3and increase the transconductance gm4 of M4, M4P. The voltage Y at the gate of the load transistor M6drives the output NMOS transistor MON,which is scaled up by a factor N=2 (as well as the PMOS output transistor MOP) with respect to the unit size transistors used in the input stage. The quiescent voltage value of Y determines the quiescent current IMOutQ in the output branch of the opamp. The voltage VCNR at the gate of cascode transistor M5 is selected so that M6operates in triode mode close to the boundary of the saturation region. This causes the quiescent gate voltage Y to be higher than the value it would have if it were in saturated mode. Consequently, a factor 12 times higher quiescent current flows in the output branch than in M6(that has 0.5 times the size of unit size transistor) instead of a factor 4 times higher which would be the case if M6were in deep saturated mode. Positive signals in X larger than VSDsat4cause all the tail current of M3to flow through M6. This drives M6in deep triode mode and leads to a large positive voltage change in Y, resulting in large negative op-amp output currents. It can be seen that M6operates as an adaptive nonlinear load that increases its resistance (and the gain AY) for positive signals at node X. The nonlinear adaptive loads were introduced in [10] for applications in one-stage op-amps with improved slew rate and have been used since then by various authors [11], [12]. A telescopic differential input stage is used in order to achieve high open-loop gain even with low RLvalues. When the op-amp drives a high resistive load (low valued RL), the gain of the output stage is degraded. Consequently, the opamp could have low open-loop gain and large gain-error with the conventional input stage, as shown in Figs. 1 and 2. The use of a high gain telescopic input stage in the proposed op-amp alleviates this problem. A capacitor CBAT connected between the gates of MOP and MON acts as a short circuit at high frequencies and helps to provide large negative dynamic currents to the capacitive load. Additionally, CBAT eliminates the need for an additional compensation capacitor between node Y and the op-amp output as it is required in several reported class-AB op-amp implementations [12]–[14]. Conventional Miller compensation is used for stability purposes. A. OPERATION Class-AB operation. Let’s assume the op-amp is used as a voltage follower. For positive input signals, the voltage at node X decreases, and the voltage at node Y also decreases according to 1VY≈AY1VX. This increases the drain current of the PMOS output transistor MOP and reduces the current of the NMOS output transistor MON resulting in a large positive op-amp output current. For negative input signals, the voltage at node X increases, and the voltage at node Y also increases by approximately a factor AY. (In practice it increases by a higher factor due to the nonlinear gain of AYthat increases for large positive signals at X due to the operation of M6as nonlinear adaptive load). This reduces the current in the PMOS transistor and leads to a large increase in the drain current of 69786 VOLUME 9, 2021 A. Paul et al.: Enhanced Gain-Bandwidth Class-AB Miller Op-Amp FIGURE 6. Small signal model of proposed static op-amp. the NMOS output transistor MON. In this case, the op-amp can deliver peak negative output currents significantly higher than the quiescent current IMOutQ of the output branch. This proposed scheme can work efficiently for resistive as well as for capacitive and mixed loads. For example, when a negative input step is applied for a resistive load, the proposed op-amp can provide a negative output voltage for an extended period of time or indefinitely. Conversely, when a large capacitive load is used it requires large dynamic currents during the positive and negative edges. Assume a voltage follower with a resistive load RL=200biased with IB=15µA. If the input voltage changes from Vin =0V to a negative DC voltage Vin = −0.3V the output terminal of the op-amp should provide, besides the dynamic current required by the capacitive load during the transition, a DC negative output current with value Iout =Vout /RL= −1.5mA once the output settles to −0.3V. A conventional class-A op-amp with a quiescent current in the output branch IMOutQ =30µA can deliver a maximum negative output current limited to a value IoutMAXRL−= −30µA. At the same time, a Free-Class-AB amplifier with the same quiescent current can provide a large negative current IoutMAXRL−only during a period determined by the time constant τ=RLargeCBAT . B. AC ANALYSIS OF PROPOSED OP-AMP The proposed op-amp uses conventional Miller compensation and a capacitor CBAT like the Free-AB op-amp. This capacitor short circuits node X and Y at high frequencies, allowing high dynamic current efficiency and utilization of only one compensation capacitance CCinstead of two. It is common in several reported implementations of class-AB output stages [12]–[14]. A straightforward analysis leads to the well-known transfer function of a Miller op-amp given by (1). The small-signal model of the proposed op-amp is given in Fig. 6. AOL(s)= AOLDC 1+s ωz 1+s ωpDOMX 1+s ωpOut (1) The DC open-loop gain of the 1st stage of the proposed op-amp of Fig. 5 AIDC =VX/Vdis given by (2). AIDC =gmin (RX)=gm1(RX)≈(gmro)2.2 (2) where gmand roare the transconductance gain and the unit size transistor’s output resistance in the input stage (assuming for simplicity of notation equal gmand rofor PMOS and NMOS transistors). As indicated before, RYwas selected so that the small-signal gain from node X to node Y has moderate value AY≈1.5. As indicated previously, this gain increases for large positive signals at X due to the nonlinear adaptive load. The DC gain of the output stage AIIDC is expressed by (3). AIIDC =gmOut eff dc (ROut )(3) Here, (gmOut eff )dc is given by (gmOut eff )dc =gmOP +AYgmON and ROut is given by ROut =rOP||rON ||RL. Here, gmOP,gmON are the transconductance gains and rOP,rON are output resistances of the output transistors MOP and MON respectively. Hence, the total DC open-loop gain AOLDC can be expressed by (4). AOLDC =AIDC AIIDC =(gm1RX)gmOut eff dc ROut (4) The dominant pole at node X is given by (5). fPDOMX =1 2πRXCX (5) where CXis given by CX=(1-(-AIIDC ))CCand RXis expressed by RX=gmr2 o2. Thus, fPDOMX can be expressed as (6). fPDOMX =1 2πRXCX =1 2πRX(gmOP +AYgmON )ROut CC (6) The high-frequency pole at the output node is given by (7). fPout =(gmOP +gmON +GL) 2πCL (7) where GL=1/RL. The zero is given by (8). fz=1 2πCCRC−gmOut eff −1 hf (8) where the effective op-amp output conductance at high frequencies (at which CBAT bypasses the auxiliary amplifier) is given by (gmOut eff )hf =gmOP +gmON . From (4) and (6), the GBW of the proposed op-amp is given by (9). GBW =AOLDC fPDOM =gm1 2πCC (9) From (3) and (7) it can be seen that the open-loop gain and the high-frequency output pole fPOut of the op-amp are strongly dependent on RL. When the Op-amp drives a high load (low RL/ high GL) the DC gain of the output stage is degraded to low values AIIDC 1. This also degrades the op-amp DC open-loop gain. Thus, to prevent a large gain error in the proposed op-amp a telescopic input stage with high gain AI∼1,000V/V is used as indicated before. In this case, even VOLUME 9, 2021 69787 A. Paul et al.: Enhanced Gain-Bandwidth Class-AB Miller Op-Amp TABLE 1. Values of design parameters of the proposed op-amp. FIGURE 7. Open-loop frequency response of proposed op-amp in strong inversion for CL=5pF and resistive load RL=250and 1M. with low RLvalues the DC open-loop gain remains relatively high AOLDC =AIDC AIIDC 1. Table 1 shows the design parameters of the proposed op-amp, for strong inversion and sub-threshold conditions. III. SIMULATION RESULTS A. SIMULATION RESULTS IN STRONG INVERSION The proposed, the conventional Class-A(Conv-A), and the Free-Class-AB op-amps of Figs. 1, 2, and 5 were designed in 130-nm CMOS technology with NMOS and PMOS unit transistor sizes (W/L)N=10µm/0.27µm and (W/L)P= 40µm/0.27µm. They were all simulated with the same bias current IB=15µA and supply voltage 1.2V. The Conv-A and Free-Class-AB op-amp have conventional input stages with simple (non-cascoded) current mirror loads. Figs. 7, 8, and 9 show the open-loop responses of the proposed op-amp for various combinations of capacitive and resistive loads CLand RL. In the simulations, three values of capacitive loads: 5pF, 25pF, 300pF, and two values of resistive loads: 1Mand 250are used. Table 2 summarizes FIGURE 8. Open-loop frequency response of proposed op-amp in strong inversion for CL=25pF and resistive load RL=250and 1M. FIGURE 9. Open loop frequency response of proposed op-amp in strong inversion for CL=300pF and resistive load RL=250and 1M. the open-loop response parameters obtained from AC simulations for the proposed op-amp, the conventional class-A, and the Free-Class-AB(Free-AB) op-amps. It can be observed that the proposed op-amp is stable for the wide range of combinations of capacitive and resistive load values used. For the Conv-A and Free-AB op-amps, the DC open-loop gains degrade severely to only 9.6dB for low valued load resistors, while for the same resistive loading conditions, the proposed op-amp still provides a relatively high DC open-loop gain of 52.2dB. Fig. 10 shows the transient response of the proposed op-amp for 5pF, 25pF, and 300pF load capacitors 69788 VOLUME 9, 2021 A. Paul et al.: Enhanced Gain-Bandwidth Class-AB Miller Op-Amp TABLE 2. Open-loop response parameters of op-amps. FIGURE 10. Simulated transient response of proposed op-amp for different capacitive loading condition in parallel with a fixed resistive load RL=1Mfor ±300mV, 100kHz pulse. FIGURE 11. Output current of proposed op-amp for different CLfor RL= 1M. with 1Mload resistors for a 100kHz input pulse with 600mVpp (−300mV to 300mV) amplitude. Fig. 11 shows the capacitive load currents for different loading conditions. FIGURE 12. Proposed op-amp’s transient response for CL=300pF in parallel with RL=250for 100kHz (−300mV to 300mV) input pulse. FIGURE 13. Dynamic and static output currents of the proposed op-amp for RL=250and CL=300pF. For a 300pF load capacitor, the proposed op-amp provides 1.75mA positive and 1.8mA negative peak output currents at the expense of 105µA total op-amp quiescent current ItotQ. Positive and negative slew rates are 6V/µs and −6 V/µs. It can be seen that the proposed op-amp has a very high dynamic current efficiency CEDyn =IoutCL/ItotQ =16 where IoutCL is the load capacitor current. Now, Fig. 12 shows the proposed op-amp’s pulse response for CL=300pF and RL=250. It can be observed that the op-amp can drive high capacitive as well as low resistive loads. The ±0.1% positive and negative settling times of the op-amp are 0.3µs and 0.7µs, respectively. Fig. 13 shows VOLUME 9, 2021 69789 A. Paul et al.: Enhanced Gain-Bandwidth Class-AB Miller Op-Amp TABLE 3. Corner analysis of the proposed op-amp at T =900C. TABLE 4. Corner analysis of the proposed op-amp at T =270C. the output currents for RL=250and CL=300pF. The maximum positive and negative currents in RLare 1.2mA and −1.2mA, respectively. It can be seen that the proposed op-amp also has a high static current efficiency CEstat = IoutMAXRL/ItotQ =11. Thus, the op-amp can provide both dynamic and static output currents (to capacitive and resistive loads), which are much higher than its total quiescent current ItotQ. In order to verify the sensitivity of the op-amp to process parameters and temperature, corner analysis of the proposed op-amp at temperatures 90oC, 27oC, and −20oC were performed. Tables 3, 4, and 5 show the results of the corner analysis. TABLE 5. Corner analysis of the proposed op-amp at T = −200C. FIGURE 14. Transient response of the proposed op-amp for RL=50 || CL=1000pF for 100kHz (−300mV to 300mV) input pulse. From this analysis, it can be asserted that the proposed op-amp is robust against process and temperature variations. Remark: If lower load resistors/higher load capacitors are required to be driven for some application, the proposed opamp’s output transistors can be scaled up as needed. For example, Fig. 14 shows the op-amp’s transient response for a 50resistive load in parallel with a 1nF capacitor load with the output transistors scaled up by a factor 4 w.r.to the size of the transistors used in the previously described opamp. In this case, the op-amp has approximately three times higher total quiescent current ItotQ =330µA. Fig. 15 shows that the proposed op-amp can deliver a 5.8mA positive and 6mA negative output current to a 50resistive load. It can provide 5.8mA positive and 4.2mA negative current to a 1nF capacitive load as well. Fig. 16 shows the Conv-A and Free-AB op-amps’ transient response with a 250resistive load and 300pF capacitive load to a 100kHz 600mVpp input pulse in voltage follower 69790 VOLUME 9, 2021 A. Paul et al.: Enhanced Gain-Bandwidth Class-AB Miller Op-Amp FIGURE 15. Transient current at RL=50and CL=1000pF for 100kHz (−300mV to 300mV) input pulse in the proposed op-amp. FIGURE 16. Conv-A and Free-AB op-amp’s transient response for CL= 300pF in parallel with RL=250for 100kHz (−300mV to 300mV) input pulse. FIGURE 17. Currents in RL=250for Free-AB and Conv-A op-amp. configuration. The Conv-A op-amp’s output voltages go from −9.7mV to 276mV, and the output voltages of the Free-AB op-amp go from −275mV to 276mV. However, the proposed op-amp’s output can vary from −300mV to 300mV (shown in Fig. 12) for the same applied input. Notice that the Free-AB op-amp initially achieves −275mV output voltage during a short period of time and after approximately 1.2µs (that correspond to 3τ=3RLargeCBAT time FIGURE 18. Transient response of Free-AB and Conv-A op-amp for ±300mV 100kHz pulse when RL=1M || CL=300pF. FIGURE 19. Dynamic currents in CL=300pF for Free-AB and Conv-A op-amp. constants) CBAT discharges, and the negative output voltage goes to −9.7mV, just like the Conv-A op-amp. In both cases, it is due to the maximum negative static output current limitation determined by the quiescent current IMOutQ of the output branch. Fig. 17 shows the output currents in RL in the Free-AB and the Conv-A op-amps for RL=250. As expected, the current in RLfor the Conv-A op-amp is limited by the quiescent current IMOutQ =39µA. In the Free-AB op-amp the output current in RLafter 1.2µs returns to IMOutQ =39µA. The slew rate of the Conv-A and Free-AB op-amp for RL=1Mcan be obtained from Figs. 18 and 19. Fig. 18 shows the transient response of the Conv-A and Free- AB op-amps for RL=1M||CL=300pF. The positive output currents in CLfor the Free-AB and the Conv-A op-amps are 1.86mA and 1.76 mA. The negative output currents delivered to CLare −1.03mA for the Free-AB and only −39µA for the Conv-A. The negative slew rates of the Free-AB and Conv-A op-amps are 3.4V/µs and 0.13 V/µs. B. SIMULATION RESULTS IN SUBTHRESHOLD The proposed and conventional op-amps were also simulated in sub-threshold with 1.2V supply voltage and a factor 60 times lower bias current IB=250nA. In this case, the op-amp can drive 5pF-300pF capacitive loads and resistive loads down to 7k. Fig. 20 shows the transient VOLUME 9, 2021 69791