HVdc Circuit Breakers: Prospects and Challenges

applied sciences Review HVdc Circuit Breakers: Prospects and Challenges Ali Raza 1,2,* , Ali Mustafa 3, Umar Alqasemi 4, Kumars Rouzbehi 5, Raheel Muzzammel 1, Song Guobing 3 and Ghulam Abbas 1   Citation: Raza, A.; Mustafa, A.; Alqasemi, U.; Rouzbehi, K.; Muzzammel, R.; Guobing, S.; Abbas, G. HVdc Circuit Breakers: Prospects and Challenges. Appl. Sci. 2021,11, 5047. https://doi.org/10.3390/ app11115047 Academic Editor: Andreas Sumper Received: 26 February 2021 Accepted: 26 April 2021 Published: 29 May 2021 Publisher’s Note: MDPI stays neutral with regard to jurisdictional claims in published maps and institutional affiliations. Copyright: © 2021 by the authors. Licensee MDPI, Basel, Switzerland. This article is an open access article distributed under the terms and conditions of the Creative Commons Attribution (CC BY) license (https:// creativecommons.org/licenses/by/ 4.0/). 1Department of Electrical Engineering, University of Engineering and Technology, New Campus, Lahore 54000, Pakistan; [email protected] (R.M.); [email protected] (G.A.) 2Department of Electrical Engineering, University of Lahore, Lahore 54000, Pakistan 3Department of Electrical Engineering, Xi’an Jiaotong University, Xi’an 710049, China; [email protected] (A.M.); [email protected] (S.G.) 4 Department of Electrical and Computer Engineering, King Abdulaziz University, Jeddah 21589, Saudi Arabia; [email protected] 5Departamento de Ingeniería de Sistemas y Automática, Universidad de Sevilla, 41004 Seville, Spain; [email protected] *Correspondence: [email protected] Abstract: The integration of offshore wind farms has revitalized the interest in multi–terminal high voltage direct current (M–HVdc) transmission grids. HVdc breakers’ importance has increased as M–HVdc grids are now a commercial truth. Several HVdc circuit breaker technologies have been developed, published, and appeared as prototypes for HVdc networks. This paper summarizes the HVdc breaker technologies from the last two decades, distributed mainly in literature. A comparison of various state–of–the–art HVdc breakers is presented. Further, areas are identified where further research and development are required. The goal is to provide primary challenges and prospects in the HVdc breaker field. Keywords: dc grid protection; HVdc circuit breaker; multi–terminal HVdc transmission; power system protection 1. Introduction The successful and reliable maneuver of multi–terminal high voltage direct current (M– HVdc) systems will impose the evolution of efficient dc grid protection and flexible control infrastructures. This will compel the power electronics and power systems operators to evolve appropriate protection schemes with HVdc breakers and control approaches to enhance the dc grid operation efficiency and reliability [ 1 – 3 ]. Since 1950, almost 200 point– to–point HVdc transmission grids have already been installed worldwide [ 4 ]. During the last two decades, few two–terminal HVdc applications have been evolved to acquire functional multi–terminal HVdc (M–HVdc) grids [ 5 , 6 ]. The M–HVdc systems consisting of multiple voltage source converters (VSCs) stations have become a promising solution because of recent development and the increased accessibility to high power VSCs from multiple vendors [6]. Considerable advantages and application ideas have been recognized and proposed regarding the M–HVdc system/grid [ 7 – 9 ]. The M–HVdc systems can serve as the most promising solution for integrating harvested offshore wind energy into ac mainland grids [ 10 ]. Several ideas for the European dc super grid have been scrutinized, like the European Wind Energy Association (EWEA) [ 11 ]. DESERTEC EUMENA’s will develop cooperation between three continents; Europe, the Middle East, and North Africa. In [12–14] , M–HVdc connections are proposed for DESERTEC and EWEA visions. The M–HVdc grid can also find its applications for the interconnection of multiple non–synchronous ac areas [ 15 – 17 ]. However, the main obstacle in realizing M–HVdc networks on a large scale is their high vulnerability to dc faults. The rising fault current rate is high because of Appl. Sci. 2021,11, 5047. https://doi.org/10.3390/app11115047 https://www.mdpi.com/journal/applsci Appl. Sci. 2021,11, 5047 2 of 21 the small inductance, which demands fast interruption technology [ 18 ]. Thus, the recognition of the M–HVdc grid as a reliable and efficient network is forcefully subjected to the disposal of HVdc circuit breakers (DCCBs), making them one of the keys empowering technology [19–23]. There is a substantial difference between the needs and necessities of dc and ac breakers. Mainly because of the unavailability of natural zero crossings in dc systems. The DCCBs would interrupt dc fault currents swiftly and dissipate vast amounts of energy stored in the dc grid’s inductances. Today, only transfer and load switches are in use for the HVdc applications. However, DCCBs are available for low and medium–range dc applications. HVdc CBs are not commonly available, or proposed DCCBs have minimal current breaking capability. Numerous DCCB designs have been proposed based on parallel and series connections of classical ac interrupters, charging units, semiconductors, resonance circuits, and varistors—each concept associated with certain drawbacks and advantages. Most of the ideas investigated only a single or few aspect of many design requirements, but no literature has given an overall picture. The objective of this paper is to provide a comprehensive overview of HVdc circuit breaker technologies, including recent significant attempts in the development of modern HVdc circuit breakers, and, by this, to revive the discussion on this very topic. HVdc breakers from technology giants like ABB, Siemens, GE, etc. are assessed and a detailed performance–based comparison is provided, not available in the literature. Functional analysis of each technology is presented. Additionally, different technologies based on derived information from literature are compared. Finally, recommendations for the improvement of circuit breakers are presented. 2. High Voltage Direct Current Networks The first commercial installation of HVdc transmission technology is seen in 1954 [ 24 ]. HVdc technology is not only feasible and attractive from a technical point of view but also is economical. Typically, HVdc systems are employed for two reasons: (i) To transfer bulk power over large distances via long transmission lines; (ii) to connect unsynchronized ac networks and networks operating at different frequencies (back–back). The dc transmission has low losses than ac for long transmission lines. Mainly, HVdc converter technology can be divided into two: Classical technology—Thyristors–based line commutated converters (LCC) and recent technology—insulated gate bipolar transistors (IGBTs)–based (self–commutated converters) voltage source converters (VSCs) [25–29]. Power flow in LCC–HVdc is regulated by adjusting the firing and extinction time of gate signals before commutation to the next valve, as the thyristor is only a turn–on device. The flow of power is unidirectional; thereby, LCC is sometimes called a current source converter (CSC) [ 30 ]. Thus, the change in power flow direction would be problematic, as it requires a polarity change. Reactive power (Q) is consumed at both inverter and rectifier sides, which has to supply via filters and extra capacitors from the ac side. The LCC–HVdc substation produces less than 1% losses at rated current, of which 50% comes from the converter station transformer [ 31 ]. However, LCC technology is continuously advancing (e.g., capacitor commutated conversion consumes relatively less reactive power [ 32 , 33 ]), and the filter size is also compromised by employing tuned active dc and ac filters [25,32–34] . The recently installed LCC–HVdc transmission links are provided in Table 1. LCC has the highest power and voltage rating in HVdc converter topologies, blocking voltage of 10 kV with a current rating up to 6250 A [35–37]. Constant dc–link voltage is obtained from self–commutated voltage source converters, where large capacitors are used. Real power (P) is transmitted softly in both directions and can provide reactive power at both receiving (inverters) and sending ends, which reduces the filter size considerably. Filter size is also reduced as only high–frequency harmonics are present because of pulse width modulation (PWM) due to the availability of high power IGBTs. However, a VSC station contributes to losses by 1.6% [ 31 , 38 , 39 ], of which 70% comes from converter valves. Five terminal VSC–HVdc Zhoushan link is installed in 2014 Appl. Sci. 2021,11, 5047 3 of 21 with ± 200 kV [ 38 ]. Each station’s transmission capacity is 100, 400, 100, 300, and 100 MW, respectively. Details of some prominent VSC–HVdc transmission links are given in Table 2. Table 1. Point–point LCC–HVdc transmission link. Country Project Name Specifications Year Length (km) Rating (MW) Dc–Link (kV) China Jinpin Sunan 2012 2093 7200 ±800 Brazil Rio Madeira 2013 2375 2 ×3150 ±600 India Biswanath Agra 2014 1728 6000 ±800 China Xiluodu Zhejiang 2014 1688 8000 ±800 China Zhundong Sichuan 2015 2600 10,000 ±1100 Table 2. VSC–HVdc transmission systems. Country Project Name Specifications Year Length (km) Rating (MW) Dc–Link (kV) China Nan’ao 2013 09 subsea 200 ±160 China Dalian city 2013 43 subsea 1000 ±320 Namibia Caprivi link 2010 951 300 ±350 Norway Skagerrak 4 2014 244 700 ±500 France Inelfe 2013 65 1000 ±320 In the event of dc fault, anti–parallel diodes to IGBTs start acting as an uncontrolled rectifier. A high rate of dc fault current is experienced due to the small dc inductance of the system. Furthermore, dc capacitors discharge and aid the fault current [ 40 , 41 ]. VSCs are no longer well–regulated, and thus the fault current is only restricted by the ac breakers [ 28 ]. Here, the DCCBs should be doing the same, but HVdc CBs are not available. Table 3summarizes the dissimilarities between LCC–HVdc and VSC–HVdc transmission technologies. Significant differences concerning the DCCB are; loss of VSC control in dc fault and different sizes of the inductances and capacitances (result in a different rate of rising dc fault current). Table 3. An evaluation between VSC–HVdc and LCC–HVdc Transmission Systems. Property LCC–HVdc VSC–HVdc Basic building block Thyristor IGBT Control of dc grid in the event of dc fault Control phase angle Converter control is lost due to diodes Harmonics Strong low order harmonics Weak high order harmonics P/Q Unidirectional, consume a large amount of reactive power Fully controlled P and Q in both directions Available power ratings 800 kV, 6400 MW 400–800 MW, 300 kV Power flow direction Reversal of poles voltage Stiff voltage achieved by adjusting PWM Black start No Yes The dc inductors Large Small The dc capacitors Small Large The dc fault current The rate of increasing a fault current is low and controllable The rate of growth of a fault current is very high and uncontrollable VSC technology is rapidly advancing. New topologies are proposed to reduce converter losses (<1%), harmonics contents, and capability to extinguish the dc fault current [40–45] . R. Marquardt proposed a multi–modular converter (MMC) topology, an advanced form of VSC–HVdc circuits [ 46 , 47 ]. This topology is based on the cascaded connections of several sub–modules of two IGBTs and a parallel capacitor. Sub–modules arrangements may use full–bridge (FB) or half–bridge (HB) cascaded connections. FB–MMC can override the overcurrent fault condition of HB–MMC. Thus, dc fault reverse blocking is Appl. Sci. 2021,11, 5047 4 of 21 realized by blocking the flow of current through the switches during the dc fault [ 45 , 48 , 49 ] at the expense of high switching losses, which develops the need for fast–acting DCCB. Most of today’s HVdc interconnections are two terminals. A factual M–HVdc system consists of several onshore and offshore VSC’s positioned in different topographical locations. Thus, control, operation, and energy management are more complex and challenging. In the event of dc fault, to ensure the reliable and smooth operation of M–HVdc systems, it must be possible to isolate the faulty portion/system from a healthy system. The ac breakers can interrupt full/complete short circuit current, while HVdc circuit breakers have only limited ratings. The DCCBs are expensive and larger than ac CBs of the same rating. Thus, new methods are developed to extinguish the fault from today’s point–point dc–link based on; control [50] or by installing the ac CBs on the ac side to de–energize the system [ 51 ]. Such a protection scheme operation may take a few 100 ms [ 52 – 54 ] to a few seconds [ 53 ], but only suited to two terminals HVdc systems. De–energization of complete HVdc system is also suggested in [40,55–57] but limited to three to four terminals [58]. For reliable operation of the M–HVdc grid, the availability of dc circuit breakers would be vital. The first parallel M– HVdc system was anticipated, and a debate started in 1963 [ 59 – 61 ], whereas the series M–HVdc grid was discussed in 1965 [ 62 ]. However, major interest in M–HVdc emerges in 1980s [22,56,58], and [63–65]. More recent studies suggest VSC–based multi–terminal HVdc systems for integration of offshore wind farms [ 64 – 67 ]. Numerous challenges need to be dealt with before M–HVdc grid becomes a reality, which are: Communication between converter stations [ 64 – 68 ], control [69,70], and primary and back–up protection schemes [40–53,71–73]. It is challenging to decide unambiguously whether the HVdc link should be based on LCC or VSC as both technologies offer specific benefits and demerits. Table 4gives the pros and cons of the M–HVdc grid based on LCC and VSC, respectively. LCC–HVdc is mature and well established and shows fewer losses. However, in the event of a fault on the ac side, commutation failure is experienced, leading to dc–link’s ultimate devastation. Conversely, VSC–HVdc technology is vulnerable to dc faults, as explained earlier. Table 4. Advantages and disadvantages of constructing an M–HVdc system based on LCC or VSC technology. LCC–HVdc Benefits Demerits High power and voltage ratings dc–link collapse due to commutation failure Fewer losses Large consumption of reactive power Low rate of rising a fault current Vulnerable to ac side faults VSC–HVdc Suitable for cables than overhead lines Vulnerable to dc side faults The high rate of rising a fault current Soft power reversal No need for voltage polarity reversal Higher losses Stiff dc–link voltage Low power and voltage ratings HVdc technology is principally vital for DCCBs as it defines the needs for HVdc CB, which could be different for both technologies. For instance, in VSC–based technology, CB needs to be fast and must have a capacity to interrupt high fault currents. The needs of the breaker for both technologies are discussed in the subsequent section. 3. HVdc Circuit Breakers A neutral bus switch (NBS), ground return transfer breaker (GRTB), neutral bus ground switch (NBGS), high–speed bypass switch (HSBS) for parallel line switching, metal return transfer breaker (MRTB), and isolation switches [ 74 , 75 ] are the dc interrupters commonly used for various switching techniques in the present point–point topology of HVDC transmission networks. The dc interrupters have only been available in limited rating and number, which is merely approaching 1.6 times the nominal rating to interrupt the short circuit current. The maximum available rating is 500 kV, 4 kA, or 250 kV, 8 kA. In addition, dc breakers are comparatively expensive and bulky than ac breakers of the Appl. Sci. 2021,11, 5047 5 of 21 same rating. So, initially ac breakers and isolators were employed on ac side of converters as substitute of dc breakers in point–point HVdc configuration [ 76 ]. In a medium or low voltage dc applications, various techniques based on solid–state switches or switching arcs have been developed to interrupt the short circuit current [73]. The major problem encountered in the development of DCCBs is the absence of the usual zero–crossing phenomenon in the dc system [ 77 – 79 ]. The basic requirements which must be accomplished by the breakers are; 1. Develop a zero–crossing current to interrupt the fault current 2. Must dissipate the stored energy of the inductance 3. Able to hold the voltage profile of the system after the interruption of fault current The first two conditions form the dc circuit breaker basis, and the third particular attribute distinguishes them from ac breakers. Secondary requirements of the dc breaker in addition to the features mentioned above are as follows [80]; 1. The dc breaker must interrupt the fault current, as mentioned earlier, in the VSC–based M–HVdc system. 2. The maximum voltage produced across the breaker must be within safe limits to coordinate with the system’s insulation. This is of prime importance when the system operates at a nominal voltage to switch heavy load currents. Excessive developments and researches are being conducted on HVdc breakers from six decades [ 57 – 59 ], but interest in DCCBs is dropped significantly after 1985 due to no success in developing a fast and short interruption mechanism. However, new studies on DCCB appeared [ 80 – 83 ] recently boomed the interest in HVdc grids. Developments are made in technologies, which ultimately improve the DCCB design and configuration [ 84 , 85 ]. This paper focuses on the more recent dc breaker field developments, special attention to the latest VSC/MMC–based M–HVdc grids. Distinctiveness of HVdc Breakers DC limiting reactor is a major component of an HVdc circuit breaker. It is an inherently bulky element of the breaker that is expected to handle maximum dc fault current without getting itself damaged. When the limiting reactor is connected in an M–HVdc grid, the line impedance, as well as the grid stability is considerably affected. Moreover, an increase in transient voltage is observed at the breaker terminals. Apart from this, the fault current may face an initial rate of rising for both external as well as internal faults. The series impedance between the fault location and the converter is lower in an external fault as compared to an internal fault. Initially, for the first few milliseconds, an internal fault might give a higher fault current than an external fault. As for the protection of dc transmission lines, the external fault is considered outside of the protection zone defined by the dc reactor’s boundary. That is why, the impact of external fault is mitigated due to the inductor’s boundary effect and a smaller fault current is noticed under external fault as compared to an internal fault [ 86 , 87 ]. However, after several milliseconds of fault inception, due to lower series impedance, there will be a higher rise in the current level in case of an external fault than an internal fault. The HVdc breakers are designed to interrupt the fault current in the first few milliseconds only. An aggregated model of dc breaker is shown in Figure 1. Figure 1. An aggregated model for the HVdc breaker. Appl. Sci. 2021,11, 5047 6 of 21 4. HVdc Circuit Breaker Topologies Three kinds of HVdc breakers are reviewed in this paper: Solid–state, electro–mechanical, and hybrid HVdc circuit breakers. 4.1. Electro–Mechanical HVdc Breakers Electro–mechanical dc breakers are divided into active and passive resonance DCCBs as this type of breaker works on resonance phenomena. 4.1.1. Electro–Mechanical Passive Resonance HVdc Breakers The passive DCCB is an obsolete technology that was developed for the LCC–HVDC system [ 88 ]. These breakers have a slow response time and are bulky, massive, larger in size, thus interest is dropped to use this breaker for dc grid protection. But these breakers have comparatively low power losses than all other dc breakers. A passive resonance DCCB is shown in Figure 2. Figure 2. Electro–mechanical passive resonance HVdc breakers. The nominal current path is shown in Figure 2. Rated current (I s ) flows through this path when the switch (CB) is closed under normal operation. Normally, interrupting circuits are developed with the air blast circuit breaker. Condition of zero–crossings is established with a series resonant circuit connected to an inductor and a capacitor, this forming a commutation path. This condition is necessary for breaker interruption [ 89 ]. Energy is absorbed by the surge arrestor during the fault. The current oscillation between the nominal and the commutation path is enabled by the interruption. This interruption works at the natural frequency. When the amplitude of the oscillating current is greater than the input current, zero–crossings occur. At this stage, the switch stops the flow of current in the nominal path [18,74]. As a result, the capacitor will be charged by the flow of current (I o ). Consider the capacitor voltage exceeds a dc breaker’s voltage capability. Surge arrestor will respond, an ideal zero point will be created on the decrease of current. This will help in the interruption of current. The maximum voltage value is 500 kV for passive electro–mechanical HVdc breakers, being employed for many years. This breaker clears the 5 kA fault current within a fault clearing time of 60–100 ms [ 90 ]. However, the development of semiconductor technology has reduced the attraction of electromechanical breakers for short circuit faults in multi–terminal HVdc systems [91]. The interruption process can be clearly understood by the analysis of the current equation. The differential equation during fault interruption is [89]: Lcd2is di2+Rc+∂uarc ∂is dis dt +1 Csis=Io Cc(1) is=Io1+e1 2L(Rc+∂uarc dis )·Sinωct(2) Appl. Sci. 2021,11, 5047 7 of 21 where ωc=q1 Lc·Cc and if Rc+∂uarc dis < 0; then “i s ”is oscillating with growing amplitude. In this scenario, the first zero–crossing of current would be enough for the breaker to interrupt the dc fault. 4.1.2. Electro–Mechanical Active Resonance HVdc Breakers In this mode, a current oscillation supported by the pre–charged commutation capacitor C c would increase instantly. It will rise to oppose the main CB’s current when the current is commutated to the LC branch. This topology is also presented as a hybrid interruption technique. Typically, a thyristor is employed as a disconnector and commutator in this type of breaker. This notion is also termed a two–stage interruption method. As this concept has various variants, the two main topologies are introduced in [ 92 , 93 ]. The first variant of electro–mechanical active resonance CB is depicted in Figure 3[94,95]. Figure 3. Electro–mechanical active resonance HVdc breakers: Variant–1 [89]. Under a steady–state condition in this first variant, the breaker switches S 2 , S 3 ,and S 4 are open while the only main breaker switch S 1 is closed. The capacitor C c is pre–charged with a negative initial voltage V c0 . When fault current is encountered, S 1 is opened, while S 2 and S 3 would close simultaneously. Then the fault current is opposed by the reverse current rising through the LC branch, and a zero–crossing will occur, and thus the current is commutated to parallel branches. Whence the C c is charged, S 2 opens, and the current through it will reduce to zero. Subsequently, the switch S 4 will close, and discharging of C c will happen in the loop C c –S 4 –S 3 –L c – C c . When a current–zero happened in S 3 , it turns off, and the main breaker current again commutates into the loop R lim –L c –C c –S 4 . However, S 4 opens upon current–zero creation, resulting in a new power equilibrium in which the capacitor is completely charged. In the second variant of active resonance dc breakers, current interruption is realized by closing the switch S 3 only, as shown in Figure 4. When a fault is detected in the second variant, S 3 is closed, and S 1 is opened simultaneously to generate a current–zero in the main breaker. Eventually, S3will open when the capacitor is completely charged [94]. Figure 4. Electro–mechanical active resonance HVdc breakers: Variant–2 [89]. 4.2. Solid State HVdc Breakers The solid–state circuit breakers (SSCBs) are lighter, simpler to repair and maintain, and have a faster operating time than electro–mechanical dc breakers. SSCB is a dynamic era Appl. Sci. 2021,11, 5047 8 of 21 of research and the latest contribution is presented in [ 96 , 97 ]. Two topologies of SSCB are implemented and summarized in [ 96 ]. In the first topology, CB is connected in parallel with a surge arrestor, as shown in Figure 5. In contrast, in the second topology, a free–wheeling diode is connected, as shown in Figure 6. Figure 5. Solid–state HVdc breakers with parallel surge arrestors [95]. Figure 6. Solid–state HVdc breakers with free–wheeling diode [95]. 4.2.1. Solid State HVdc Breakers Employing Surge Arrestors (SA) Under the steady–state condition, the current flows from the dc source to the load through IGBTs (T) in SS–based HVdc breakers employing SA, as shown in Figure 5[ 95 , 97 ]. However, the semiconductor switch turns–off when a fault is detected. This results in a rapid rise in voltage until the surge arrester starts to conduct. The surge arrester is designed so that any voltage greater than the grid voltage is choked/blocked, leading to the de–energization of the line inductance [ 97 ]. Then the load current is commutated to the surge arrester. The IGBT voltage is quite limited to the surge arrester’s clamping voltage and is assumed to be V dc + V margin . The impedance at the fault point is also supposed to be small when IGBT turns–off at time t = 0. Vmargin is applied across Ldc and the inductor current is calculated as [89]: iL=Io−VMargin Ldc t (3) where Io is the amplitude of the fault current at t = 0. The time to turn off the fault current Topen is derived as follows: Topen =Ldc Vmargin Io(4) The energy absorbed by the surge arrestor can be given by: WR= Vdc Vmargin +1!1 2LdcI2 o(5) W R is giving total energy being absorbed and suppressed by the surge arrester at the time of fault clearance, I2 0 shows the short circuit current, and LC signifies the system’s Appl. Sci. 2021,11, 5047 9 of 21 inductance. In a high voltage system, larger values of V dc than V margin are used to suppress the voltage across IGBT and reduce the conduction losses. In such a scenario, the term in the bracket of (5) becomes large which means W R is enough higher than the stored energy in L dc at t = 0, 1 2LdcI2 0 . Thus, surge arrester’s high capacity is required to accommodate IGBT’s more suppressed energy. The more is voltage suppressed across the IGBT, the higher the capacity surge arrestor required [97]. 4.2.2. Solid State HVdc Breakers Employing Free–Wheeling Diode The second variant of SSCB employs a free–wheeling diode in parallel with the IGBT to bypass any reverse voltage impulse and protect the IGBT against the voltage spikes, as shown in Figure 6. A surge arrester is also used to absorb the dissipated heat during the fault. This quick action of dissipation and absorption of generated heat improves CB’s reliability. During normal operating conditions, IGBT (T) is on, and load current i L passes through it. However, on fault detection at t = 0, the fault current is commutated to D as T turns–off. So, the inductance L dc is gradually demagnetized by the R v , thus the fault current starts reducing. If V v expresses the clamping voltage of R v , the surge voltage across T will be Vdc + Vv . As no power flow through Tafter turning off, thus energy absorbed in this breaker during turn–off operation is equal to 1 2LdcI2 0. Thus, the energy WRis: WR=1 2LdcI2 o(6) Small values of W R in (6) than (5) suggest the small rating and volume of surge arrestor in the second topology with the reduced suppressed voltage across IGBT [94,95]. Several benefits are evolved for solid–state breakers compared to other circuit breaker technologies. The absence of mechanical structures improves the SSCB’s response time, resulting in lower turn–off time. Additionally, the higher voltage across the inductor allows the demagnetization process to be performed faster [ 98 ]. The fast turn–off method of SSCB reduces the peak current to a limited level compared to other breaker technologies. Thus, the solid–state breaker has a lower power loss for the same grid voltage. Therefore, it may be assumed that an SSCB is an optimal choice due to lower turn–off time, reduced component cost, and lower peak current irrespective of cable length and grid voltage. However, this is not the case because of one substantial shortcoming; the high on–state losses. It can be concluded from comparison graphs (grid voltage vs. time and grid voltage vs. maximum current) provided in [ 98 , 99 ] that for low to medium grid voltages, low turn– off time and low peak voltage are not quite enough to counter the power losses during the on–state. However, in high voltage grids, solid–state topology shows an advantage since the power saved per circuit breaker is sufficient to make them more economical than the other circuit breakers, even when the on–state losses are considered. 4.3. Hybrid HVdc Circuit Breakers This type of circuit CB opens new prospects for fast switching and extinguishing the arc. They employ solid–state devices and mechanical switches for switching operations, as suggested by its name, hybrid dc breakers. The hybrid circuit breaker theory is suggested to overcome the shortcomings of solid–state and electro–mechanical breakers. The use of electronic components that are sensitive to short–circuit faults makes the hybrid DCCB expensive. The steady–state reliability of hybrid DCCB is fairly high, but the failure rate is much greater than that of a similar voltage rating of ac breaker. The structure of a hybrid dc breaker is very complicated as it contains electronic devices and mechanical components that lead to a high failure rate, and the electronic components are also comparatively fragile [ 100 ]. However, the breaker’s failure to timely isolates the fault can be harmful to both human beings and the protected component. Hybrid DCCB continues to attract a lot of attention, as recently witnessed in [ 101 ]. Moreover, Alstom [ 102 ] and ABB [ 80 ] have established hybrid dc circuit breaker prototypes with significant enhancement in Appl. Sci. 2021,11, 5047 16 of 21 9. Conclusions In this paper, prospects and challenges to HVdc breaker development are presented along with a review of the main concepts of HVdc breaker and different contenders. This topic has been evolved rapidly over the last two decades. The research and advancements in HVdc breaker technology certainly increase with the emergence of real–life multi–terminal HVdc grids. The best HVdc breaker candidate would have low cost, after achieving the required performance level. Author Contributions: Conceptualization, A.R. and A.M.; methodology, A.R.; formal analysis, A.R., A.M., K.R., R.M. and S.G.; investigation, U.A. and G.A.; figure, K.R. and S.G.; resources, U.A.; data curation, A.R., A.M., R.M. and G.A.; writing—original draft preparation, A.R., A.M. and R.M.; writing—review and editing, U.A., G.A, K.R. and S.G.; funding acquisition, U.A. All authors have read and agreed to the published version of the manuscript. Funding: This research received no external funding. Institutional Review Board Statement: Not applicable. Informed Consent Statement: Not applicable. Data Availability Statement: Not applicable. Acknowledgments: The authors are thankful to the Department of Electrical Engineering, The University of Lahore–Pakistan, and King Abdulaziz University, Jeddah Saudi Arabia for providing facilities to conduct this research. Conflicts of Interest: The authors declare no conflict of interest. References 1. Chaudhuri, N.R.; Chaudhuri, B. Adaptive droop control for effective power–sharing in multi–terminal DC (MTDC) Grids. IEEE Trans. Power Syst. 2013,28, 21–29. [CrossRef] 2. Abdel–Khalik, A.S.; Massoud, A.M.; Elserougi, A.A.; Ahmed, S. Optimum power transmission–based droop control design for multi–terminal HVDC of offshore wind farms. IEEE Trans. Power Syst. 2013,28, 3401–3409. [CrossRef] 3. Raza, A.; Dianguo, X.; Yuchao, L.; Xunwen, S.; Williams, B.W.; Cecati, C. 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