Ramp-Rate Control of DRES employing Supercapacitors in Distribution Systems

Ramp-Rate Control of DRES employing Supercapacitors in Distribution Systems Kyriaki-Nefeli D. Malamakia kyriaki [email protected] Francisco Casado-Machadob [email protected] Manuel Barrag´ an-Villarejob [email protected] Andrei Mihai Grossb [email protected] Georgios C. Kryonidisa [email protected] Jose L. Martinez-Ramosb [email protected] Charis S. Demouliasa [email protected] aDept. of Electrical and Computer Engineering,Aristotle University of Thessaloniki, Thessaloniki, Greece bDept. of Electrical Engineering,Universidad de Sevilla, Sevilla, Spain Abstract—The increased penetration of Distributed Renewable Energy Sources (DRES) has posed several challenges into the electric power systems, the most important of which is the instability caused by the intermittent and stochastic nature of the primary sources (wind, sun). Since the System Operators have started to specify limits for the restriction of the Ramp-Rate (RR) at the Point of Common Coupling (PCC) of the DRES with the grid, several algorithms have been proposed to mitigate the power fluctuations using energy storage systems (ESS). Some drawbacks are: high computational effort in the calculation of RR, increased ESS size/decreased ESS operational life, etc. In this paper a new RR Limitation (RRL) algorithm is proposed to address gaps in the current state-of-the-art. This algorithm is based on the two-point calculation of RR and is performed considering the connection of a Supercapacitor (SC) at the DC-link of a DRES converter. The relationship between the SC voltage and the degree to which the RRL is achieved is established, which is something missing from the current state of the art and is essential if the RRL is to be treated as a new tradeable AS. The RR control is validated in a real experimental testbed. Finally, this control is modelled in Simulink in order to perform investigations on the influence that several parameters have on the achieved RRL at the DRES PCC. This is important, since the evaluation of the RRL impact at DRES level will allow for further investigations to evaluate the RRL impact at distribution system level and defer costs related to the installation of large-scale ESS. Index Terms—istribution system, energy storage system, inverter, power smoothing, ramp rate control, renewable energy source, supercapacitor, ultracapacitor, voltage source converter.istribution system, energy storage system, inverter, power smoothing, ramp rate control, renewable energy source, supercapacitor, ultracapacitor, voltage source converter.d I. INTRODUCTION The advent of Renewable Energy Sources (RES) and power electronics and the gradual replacement of fuel-driven power plants (PPs) has initiated a new, environmentally friendly era for the electric grid. However, this shift towards a decentralized non-synchronous generation jeopardizes the security and stability of power systems. One solution is the placement of central large-scale ESS at the Point of Interconnection of the distribution system (DS) with the transmission system (TS) or within a large-scale RES PP, in order to compensate the impact of DRES on the dynamic performance of TS by providing ancillary services (AS), similarly to the conventional PPs. However, this centralized approach has high cost, and the stakeholders involved are TS Operators (TSOs), DS Operators (DSOs) or other large energy market players. One of the main actions the ESS undertakes is the RRL -referred also as power smoothingat the PCC with the grid. With respect to the RR regulatory framework, there exist specifications for large-scale RES PPs - especially at TS level, [1], e.g. Ireland (EirGrid), Puerto Rico (PREPA), Hawaii (HECO), etc. However, there is no unified definition of RR considering either the time-interval ∆tor the power variation ∆P, [1]. Moreover, the grid codes and Standards do not provide specifications for RES PPs with nominal power below 1MW. Therefore, the RRL is currently vague at DS level. In the recent technical literature, there exist several methods to mitigate the fluctuations at DRES or microgrid level considering different RRL limits depending on the type of the primary source (sun, wind) and different types of ESS. In [2] a Gaussian Filter is proposed for smoothing the fluctuations of Wind Turbines (WTs), while in [3] Model Predictive Control is proposed for the same purpose. Both methods employ Battery ESS (BESS). In [4], [5], the moving average (MA) is proposed to smooth PV fluctuations using a BESS. In [6] the use of Low-Pass Filter (LPF) is proposed for PV systems (PVS) employing BESS and state-of-charge (SoC) restoration control, where an analysis is also performed to correlate the energy and SoC of the BESS with the filter time-constant. In [7] spectrum analysis is performed for a WT power profile, a band-pass filter (BPF) is used to distinguish high and low frequency components, while a Hybrid ESS (HESS), consisting of a BESS and a SC, is employed to absorb the high and low frequency components, respectively. In [8] the MA and a new RRL strategy are compared via simulations to highlight the superiority of RRL control. This is in accordance with the review conducted in [9], which stresses out the disadvantages of the MA and the filter-based methods: high computational complexity, exhibition of “memory effect” and oversmoothing. The latter causes the following impacts: (i)the ESS is forced to operate even when the DRES RR is within specific limits; (ii)the ESS capacity is increased; (iii)the ESS operating life is decreased. Hence, contrary to the filter-based methods, with the RRL-based algorithms the “memory effect” is eliminated and the ESS size is reduced, since the ESS does not operate unnecessarily, especially when equipped with SoC regulation. In [8] - except for the RRL strategy- a SoC restoration control is proposed, where the ESS is controlled using a linear SoC-RRL droop characteristic to consider the available capacity in selecting the desired RR. The proposed scheme is validated in an experimental test-bed considering lead-acid BESS and a single-phase converter. The main drawback is that this control does not check the SoC a-priori - before providing RRL. On the contrary, it mitigates the fluctuations independently of the SoC, and then tries to restore the SoC. Hence, it is not apriori known if the ESS is available to provide the required power. In [10], [11] the simple and step RRL are proposed for PVS with BESS assuming that the BESS returns to the initial SoC at the end of the day. However, the state-of-the-art RRL methods with SoC regulation, [9], do not guarantee that RR can be limited exactly to the prescribed level. Therefore, new RRL techniques should be developed to reduce the significant RRs at specific values. When involving BESS, slower dynamics are involved, hence, in [9] it is recommended that fast-acting ESS are used for the power smoothing. This is further supported in [12]: the use of the SCs is recommended for the RRL in LV networks, since the SCs can mitigate ramp-ups and ramp-downs faster than BESS, have longer useful life and are more economically profitable for smaller scale systems. A lab set-up is simulated in PSIM software, considering SCs as ESS in order to compare the LPF, the MA and the RRL and concluding that the RRL method presents the best performance for SCs as well. In this paper, a new direct RRL algorithm is proposed to reduce the high-frequency fluctuations of DRES in order to eliminate the “memory effect” and oversmoothing. An important aspect of the developed control, is that it does not use any LPF or any average function for deriving the smoothed power reference signal, but it directly restricts the power RR to a desired maximum value. This is important because, all grid codes on RRL/power smoothing are expressed by a ∆P/∆t. Therefore, although there is no clear definition for the RR and different ∆tmight lead to different RR calculations, using the RR as a parameter within the control strategy, makes is directly applicable to all requirements. The clear advantage of this method compared to filter-based or MA methods is that in the latter cases there is no clear relation between the cutoff frequency of the LPF or the time interval of the averaging function with the required RR. The degree to which the ESS can fulfil a pre-defined RRL as an AS depends on the SoC. Considering the SC as ESS, the SoC is reflected by the voltage level and the energy content. In all the aforementioned studies, the SoC is taken into account only after the RRL control action, i.e. a-posteriori. Hence, when the SoC reaches its limits, the ESS cannot achieve the requested RRL. For this reason, in this paper the proposed RRL control considers the SoC (i.e. the SC voltage level) a-priori: depending on the SC voltage level, the RRL control is continuously adjusted from the nominal value in order not to exhaust the technical limits of the SC recommended by the manufacturers. Such method ensures that the RR is limited exactly to a pre-determined value, something that is missing from the technical literature, as highlighted in [9]. To the authors’ best knowledge such method does not exist in the current literature. In addition, the developed RRL control is applied to a SC connected to the DC link of a 3-phase DRES Voltage Source Converter (VSC) via a dedicated bi-directional DC/DC converter (Fig. VSC + DC/DC converter DC bus UC DC Current Source LCL filter DC filterPCB board VSC AC Filter UC DC/DC DC Sourc. SC SC Fig. 1. Experimental Testbed. 1). The proposed scheme is validated via simulations and in a real experimental testbed in the lab of Universidad de Sevilla employing two measuring devices with different sampling rates. It should be noted at this point that experimental results of the RRL/power smoothing algorithms are presented only in [8] and they concern a lead-acid BESS. No experimental studies exist for HESS or other fast acting ESS, e.g. flywheels or SCs. Subsequently, simulations in Simulink are performed for further investigations considering different values of RRL and SC size. Finally, the proposed control has been implemented using basic arithmetic operations so as not to increase the computational burden. This is achieved by simply using the active power measured difference between two successive instants, [13]. This makes the proposed RRL method directly applicable to any DRES converter and to any grid code, which are clear advantages with respect to the above approaches. RRL Function Fig. 2. Dynamic RRL. II. PROPOSED RRL CONTROL The main control block is the RRL control depicted in Fig. 2. The inputs are the DRES power, u[t], the maximum (max[t]=+r(v)) and minimum (min[t] = −r(v)) limits of RRL defined by the RRL Function (Fig. 3) considering both ramp-ups and ramp-downs. The outputs of the control block are the smoothed power y[t]and rrsat[t]. The latter is I. Full Service II. Partial Service III. Service disabled Alert Warning Warning Alert II I II II II II III III III III Fig. 3. RRL Function: SC voltage versus the absolute value of RRL. a boolean output (true when RRL is achieved). In each time step ∆tthe RR is based on the 2-point calculation, [13]. RR2-point-calc[t] = y[t]−y[t−∆t] t[t]−t[t−∆t](1) The value y[t−∆t]is defined by a Unit Delay block z−1, which holds and delays its input by ∆t(discrete-time operation). The RRL function performed in the pink block is described via Algorithm 1. After performing the algorithm, the reference power for the SC is p⋆ SC[t] = u[t]−y[t]. Algorithm 1 Algorithm for RRL Function Require: u[t],y[t−∆t],min[t],max[t],∆t Ensure: y[t] 1: RR2-point-calc ←u[t]−y[t−∆t] ∆t 2: rrsat ←false 3: if RR < min[t]then 4: RR ←min[t] 5: rrsat ←true 6: else if RR > max[t]then 7: RR ←max[t] 8: rrsat ←true 9: else 10: RR ←RR2-point-calc 11: end if 12: y[t]←RR ·∆t+y[t−∆t] In many studies, e.g. [12], the SoC is related with the stored charge, i.e. a definition more directly related to the equivalent concept of BESS, [14]. From the power engineering point of view (and not the electrochemical), it is more useful to correlate the SC SoC with the SC energy content and respective voltage levels, since what really matters is the SC energy content, [14]. This correlation is expressed via: SoC =v2 SC −v2 min v2 max −v2 min ,(2) where vSC is the SC voltage, vmax and vmin the technical operational limits of the SC recommended by the manufacturer for safety reasons. The rated energy of the SC is Erated = 0.5·C·v2 max. The degree to which the SC can fulfil a predefined RRL rnas an offered AS depends on the SC voltage level and the associated energy content. It is considered that both ramp-ups and ramp-downs should be mitigated, hence, the SC should be charged at around 50% of the available energy to be used. This energy is equal to Eused =1 2·C·(v2 max −v2 min)(3) When no RRL is provided, the SC voltage should remain to the reference value, v⋆ SC. As depicted in Fig. 3, if the SC voltage is in Area I, the RRL is calculated to be in the predefined level, rn, and the AS is fully provided for both rampups (EUpp n) and ramp-downs (ELow n) with EUpp n=ELow n. The value rn>0 is the predefined, by the DSO or TSO, RRL. If the SC voltage lies within Area II (Warning Area) the RRL is deteriorated to a value equal to rw, which is a function of the voltages difference until the alert area with boundary limit ra=±k· |rn|,k > 0. In this area, the AS is partially provided for both ramp-ups (EUpp w) and ramp-downs (ELow w) with EUpp w=ELow w. As illustrated in Fig. 3, the voltage difference follows a linear approach rw(v). This approach have been especially suited to be implemented in the same microcontroller that performs the control of the VSC with execution time ∆t= 50µs. The linear approach is described: rUpp w(v) = rn+rn·(k−1) ·v−vUpp w vUpp a−vUpp w (4) rLow w(v) = −rn+rn·(k−1) ·v−vLow w vLow w−vLow a (5) In Area III (Alert) the AS is not provided at all, since the SC is close to its operational limits. The respective voltage limits are shown in Fig. 3. In order to ensure that the SC is able to return to v⋆ SC, the control scheme of [15] is employed. Time (s) 3 4 5 6 7 8 9 Power (kW) pin ps ( RRL = 75 W/s ) ps ( RRL = 100 W/s ) ps ( RRL = 150 W/s ) 0 100 200 300 400 Time (s) 3 4 5 6 7 8 9 Power (kW) pin pout ( RRL = 75 W/s ) pout ( RRL = 100 W/s ) pout ( RRL = 150 W/s ) Fig. 4. Comparison of Different rnvalues: Top plot: Input Power pin and grid power ps. Bottom plot: Input pin and RRL output pout. III. RESULTS A. System Under Study The RRL method is validated via simulations and experiments, as described in the following paragraphs. The parameters from Fig. 3 have been derived using (3) for the voltage areas and following a bottom-up approach in order to respect the limits recommended by the SC manufacturer: (i)vUpp w=145V and vUpp a=150V. This leads to EUpp a=4,425kWs (1.23Wh); (ii) Considering vUpp wwith v⋆ SC=130V leads to EUpp w=12,384kWs (3.44Wh); (iii)Considering v⋆ SC and ELow w=12,384kWs=EUpp w, Time (s) -2 -1 0 1 2 Power (kW) psc ( RRL = 75 W/s ) psc ( RRL = 100 W/s ) psc ( RRL = 150 W/s ) 0 100 200 300 400 Time (s) 100 110 120 130 140 150 Voltage (V) vsc vsc ( RRL = 75 W/s ) vsc ( RRL = 100 W/s ) vsc ( RRL = 150 W/s ) Fig. 5. Top plot: SC Power psc for different rnvalues. Bottom plot: SC Voltage vsc for different rnvalues, reference SC voltage v⋆ sc. Time (s) 6 8 Power (kW) pin ps ( RRL = 75) ps ( RRL = 100) ps ( RRL = 150) Time (s) -2 0 2 Power (kW) psc ( RRL = 75) psc ( RRL = 100) psc ( RRL = 150) 20 30 40 50 60 Time (s) 120 130 140 150 Voltage (V) vsc vsc ( RRL = 75) vsc ( RRL = 100) vsc ( RRL = 150) Fig. 6. Oscilloscope Measurements for different rnvalues - Zoom 60s: Top plot: Input Power pin and grid power ps. Middle plot: SC Power. Bottom plot: SC Voltage. Time (s) -200 0 200 RRL (W/s) ( RRL = 75 W/s ) ( RRL = 100 W/s ) ( RRL = 150 W/s ) Fig. 7. RR calculation based on (1) it is calculated vLow w=113.03V; (iv)Considering vLow wand ELow a=4,425kWs=EUpp a, it is calculated vLow a=106.3V. Fig. 8. Time-domain solar PV power profile of 29/9/2018 with 1sresolution, [16] - Zoom in 300s(14:31-14:36) used as input profile in the simulations B. Experimental Results - Evaluation of RRL Limit The studied topology is a real testbed in the University of Sevilla (Fig. 1) developed in the framework of H2020 Project EASY-RES, [17]. Its main components are: (i)A 20 kVA three-phase three-wire VSC with Vrated DC =750V and Vrated AC =400V; (ii)An SC of 6 F/160 V, [18], with maximum instantaneous power of 2kW; The total SC energy is 21.33Wh, however, due to the SC safety voltage limits recommended by the manufacturer, the total SC energy used for RRL control is equal to 9.33Wh; (iii)A controllable DC current source. The proposed algorithm has been implemented in a Texas Instruments TMS320F28335 Delfino microcontroller with a sampling frequency of 20 kHz. The other parameters of Fig. 1 can be found in [15]. The data of the experimental results were recorded into two devices: (i)an oscilloscope with a sampling time of 50µs to demonstrate transient experimental results with very high accuracy; (ii)the real-time platform Speed- Goat, which is more suitable for recording data in steady-state conditions, since it communicates with the microcontroller of the experimental testbed and exchanges data every 0.5s. The experimental validation targets at evaluating the efficiency of the RRL control and the effect of parameter rn. The input power signal pin has been chosen to exhibit step-changes - red curve in Fig. 4. The rnvalues that have been selected are 75, 100 and 150W/s. The effect of parameter kon the performance of the proposed RRL control will be evaluated via simulations in next section. Fig. 4, Fig. 5 and Fig. 7 have been derived using SpeedGoat, while Fig. 6 using the oscilloscope and zooming in the first 60sof the grid injected active power ps, the pin, the output power of the RRL algorithm pout (=y[t]of Fig. 2), the SC power psc and the SC voltage vsc depicted also in Figs. 4-5. Fig. 4-Top and Fig. 6-Top depict ps and pin (=u[t]of Fig. 2). Fig. 4-Bottom depicts pin together with pout. The psis around 1kW less than pout due to the power losses incurred on the lab testbed of Fig. 1. As it is observed in Fig. 4 and Fig. 6-Top, the RRL control works perfectly and injects smoothed power to the grid. Moreover, the lower the rn, the smoother is the active power pout and ps, as expected. This effect is very clear during ramp-ups (0−50sand 150 −200s), because the SC does not reach its power or voltage limits, i.e.: (i)the SC power reaches barely its maximum power limit -2kW (SC charging) in Fig. 5-Top and Fig. 6-Middle; (ii)the SC voltage does not reach 150V in Fig. 5-Bottom and Fig. 6-Bottom. During the successive ramp-downs (SC discharging) at time interval 50 −150sboth pout and psare smoother than pin, but the RRL is deteriorated (a) Active Power injected to the grid (b) SC Power (c) SC Voltage (d) RR Calculated with (1) Fig. 9. Aggregated results considering different values of kand SC size. according to (5) - especially during the 2nd ramp-down, since the SC limits are reached: (i)the SC power instantaneously exceeds its maximum power limit 2kW (discharge) in Fig. 5- Top and Fig. 6-Middle; (ii)the SC voltage reaches its lower limit 110V in Fig. 5-Bottom. The RRL method is evaluated with respect to the target RRL considering as performance index the RR(t)given in (1), [13], for ∆t= 1s. This is reflected in Fig. 7, where the resulting RRL in the grid power is depicted. It can be clearly observed that the target RRL (rn) is reached when the SC voltage (Fig. 5-Bottom) stays within the predefined limits ELow a−EUpp a, i.e. 106.3-150V. Only in the time period 100 −150s(2nd ramp-down) the SC voltage limits are reached, thus, the target rnis not achieved. Generally, it can be deduced that the RRL control is efficient and the target RRLs are well achieved respecting the SC safety limits. After the ramping events (t > 200s) the SC returns to v⋆ sc avoiding any oversmoothing and unnecessary operation. It should be mentioned that the studied target values of RRL (75, 100 and 150W/s) are not so strict considering the maximum pin, but they are too strict considering the specific SC limits and size. Imposing a target RRL of 10-50W/s would destroy the specific SC. Larger size of SC could allow such low target values. This is evaluated in the following sub-section. C. Results via Simulations and Investigations The RRL control and the complete lab topology of Fig. 1 is modelled in Matlab/Simulink. The input signal pin is a 300s profile with abrupt changes. These data have been isolated from the measured PV profile of Fig. 8 with 1sresolution, which corresponds to a 6.5kWpPVS in Germany (DSO data in [16]). This is considered as a typical Central European PV profile in a cloudy day. The target RRL has been selected as rn= 100W/s in all cases. The voltage limits are the same as the ones set in subsection III-A. Via simulations, the effect of parameter kand the SC size on the proposed RRL control is evaluated. More specifically, kis set equal to 1(no warning area) and 4, i.e. in the warning area there is linear variation between 100 −400W/s. With respect to the SC size, the SC sizes that have been considered are the real lab 6F/160V SC, [18] and the 8F/160V SC, [19] of the same manufacturer and with the same nominal voltage as [18]. Since the rated voltage is the same, the voltage limits of Fig. 3 are also the same, and only the capacitance size is evaluated. For this reason, the involved energy areas of the 8F SC in Fig. 3 increase at 8/6=1.33. Aggregated results appear in Fig. 9. The following observations can be made with respect to the efficacy of the algorithm: (i)In all cases psis very smoothed compared to pin - Fig. 9(a); more specifically, although pin has a RR varying ±1000W/s, the proposed control manages to pose the RRL of ±100W/s in case k= 1, while in case k= 4, the RRL <400W/s (absolute value); (ii)It can be noticed in Fig. 9(b) that in all cases the SC reaches its upper and lower power limits at t= 150sand t= 250s, respectively; (iii)After the very abrupt ramping events (t > 300s) the SC starts to return to v⋆ sc, because the RR of pin < rn, avoiding in this way any oversmoothing and unnecessary operation. The effect of parameters kand the SC size is very clear in the SC voltage - Fig. 9(c). For C=6F/k=1 the RRL control stresses the SC and it reaches its lower safety limit at t= 160s. Increasing k=4 leads the SC to operate in higher voltage values - a little bit closer to its upper voltage limits (at t= 260s)- but generally, the RRL control leads the SC operation into a safer area. Compared to C=6F/k=1, increasing Cto 8F achieves the same smoothing (±100W/s) but this allows the SC to operate in a much more safer region (110-140V). For the case C=8F/k=4 the SC again operates around 110-140V leading to the conclusion that with higher Cthe warning area could be omitted and the RRL could have a lower value (stricter RRL/better smoothing). Of course, increasing the SC size leads to better smoothing effect of the grid active power, however, larger sizes may lead to excessive ESS costs. This is discussed below. D. Discussion & suggestions for further research In the current state-of-the-art [10]–[12], the most frequent approach is to size the ESS considering the worst case scenario, i.e. for (i)RR=10%/min, which is the limit imposed by PREPA and it is considered very strict; (ii)an active power variation ∆P= 0.9p.u with respect to the maximum DRES power. These sizing approaches usually do not consider the ESS cost. For example in [12] an SC of 1kWh is simulated considering a 15kWpPVS without taking into account the associated cost involved. Here, the SC used energy is 9.3Wh and it should be noted that this specific SC size [18] in the lab was selected so as to cost around 10% of the total purchase/installation price of a PVS. Hence, the ESS cost is of high importance. Although there are many studies taking into account the ESS cost for power smoothing/RRL (probabilistic, [20], search-based [21], an extensive review exists in [16]) all of them consider for both DS-TS a RR = 10%/min without examining if such strict RRL limits are suitable for DS, where the effect of loads may eliminate fluctuations caused by DRES. This work is a part of the H2020 Project EASY-RES, [17], where new AS are envisioned for DRES within DS. More specifically, it is envisioned that SCs at DRES level perform RRL to the high-frequency components of the DRES power and BESS located at the MV/LV or HV/MV substations perform low-frequency RRL in order to compensate fluctuations caused by loads. This differentiation will lead to deferral of investments at DS and TS level and the engagement of both small DRES owners and large-scale ESS operators. Moreover, in the EASY-RES vision, the total cost of SCs should not exceed 10% of the total purchase/installation price of a DRES. Since there are no specifications for the RRL at DS level, in further studies, RRL can take different values considering also the associated purchase/installation cost of the SC. More specifically, a parametric cost-benefit analysis should be performed via simulations to correlate the achieved RRL with the SC size, and other parameters, e.g. different SC voltage limits. These evaluations will provide a further insight on the achieved RRL, so that it can be treated as a new AS within DS to be remunerated to the involved parties. IV. CONCLUSIONS In this paper, a novel RRL control method has been developed to mitigate active power fluctuations at DRES level. The control is performed by a a fast acting ESS, namely a SC. The RRL control is simple enough to be implemented in the microcontroller of a real DRES and it can be directly applicable to any grid code requirements for RRL. Another advantage of this method is that the SC voltage (i.e. SoC) is taken into account a-priori, i.e. before the service is provided. For this reason, specific RRL can be ensured at the DRES connection point, without exhausting any safety limits of the ESS. Hence, the problem of oversmoothing and decreased operational life can be avoided. The RRL control itself does not have any implementation restrictions, as long as suitable voltage limits and realistic target RRLs (with respect to a specific SC size) are set. The effectiveness of the proposed scheme is validated via experiments considering different values of RRL, while the effect of the SC size and the RRL deterioration when the SC limits are reached are also investigated via simulations. ACKNOWLEDGMENT This research is funded by the European Union under the Horizon 2020 project EASY-RES (GA 764090) and CERVERA Research Programme of CDTI, the Industrial and Technological Development Centre of Spain, under the research Project HySGrid+(CER-20191019). REFERENCES [1] Malamaki, K.-N. et al, “D1.1 description of the metrics developed for the quasi-steady-state operation and report on the review of the respective current grid codes,” H2020 EASY-RES Project Deliverable, Aug. 2018. [2] A. Addisu, L. George, P. Courbin, and V. Sciandra, “Smoothing of renewable energy generation using gaussian-based method with power constraints,” Energy Procedia, vol. 134, pp. 171 – 180, Jan. 2017. [3] A. V. Savkin, M. Khalid, and V. G. Agelidis, “Optimal size of battery energy storage and monotonic charging/discharging strategies for wind farms,” in 2014 IEEE Conference on Control Applications (CCA), pp. 1372–1376, 2014. [4] A. Ellis, D. Schoenwald, J. Hawkins, S. Willard, and B. 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