A General Subthreshold MOS Translinear Theorem
Abstract
This paper outlines the conditions under which the translinear principle can be fully exploited for MOS transistors operating in subthreshold. Due to the exponential nature of subthreshold MOS transistors the translinear principle applies immediately as long as the source-to-bulk voltages are made equal to zero (or constant). This paper addresses the conditions under which subthreshold MOS transistors still satisfy a translinear principle but without imposing this constraint. It is found that the translinear principle results in a more general formulation than the original for BJTs since now multiple translinear loops can be involved. The constraint of even number of transistors is no longer necessary.
Full text
A
Gene al Sub h eshold
MOS
T anslinea Theo em
Te esa Se ano-Go a edona’, Be nab6 Lina es-Ba anco’, and And eas
G.
And eou2
Na ional Mic oelec onics Cen e (CNM), Ed. CICA, AV. Reina Me cedes sln, 41012 Se illa, Spain
*
The Johns Hopkins Uni e si y,
3400
N. Cha les S ee , Ba on Hall, Bal imo e, MD 21218, USA
Abs ac
This pape ou lines he condi ions unde which
he T anslinea P inciple can be ully exploi ed o
MOS
ansis o s ope a ing in sub h eshold. Due o
he exponen ial na u e o sub h eshold
MOS
ansis o s he T anslinea p inciple applies
immedia ely as long as he
Sou ce- o-Bulk
ol ages
a e made equal o ze o
(o
cons an ). This pape
add esses he condi ions unde which sub h eshold
MOS
ansis o s s ill sa is y a T anslinea p inciple
bu wi hou imposing his cons ain . I is ound ha
he T anslinea p inciple esul s in a mo e gene al
o mula ion han he o iginal
o
BJTs since now
mul iple T anslinea loops can be in ol ed. The
cons ain
o
e en numbe o ansis o s is no longe
necessa y.
I. In oduc ion
The anslinea p inciple, in oduced by Ba y
Gilbe in 1975
[I],
is
one o he mos impo an ci cui
heo y con ibu ions in he elec onics e a. In i s o iginal
o mula ion, he anslinea p inciple p o ides a simple
and e icien way o analyze and syn hesize nonlinea
ci cui s based on bipola junc ion ansis o s (BJTs).
Due o hei exponen ial cha ac e is ics, he anslinea
p inciple can be ex ended o
MOS
ansis o s ope a ing
in
weak in e sion [2], [3] wi hou and wi h loa ing-ga e
de ices [4]. Fo MOS ansis o s ope a ing abo e
h eshold he e has also been ound a simila way o
analyze and syn hesize nonlinea ci cui s
[5].
Fo bipola ansis o s one p ac ical p oblem ha
may equi e some a en ion when applying he
anslinea p inciple is he nonze o base cu en
[6].
In
con as , he anslinea p inciple holds o
MOS
sub h eshold ansis o s in an exac manne i sou ce
and bulk a e sho -ci cui ed. Howe e , i has been ound
ha he p inciple holds as well in an exac manne unde
di e en ci cums ances [2]-[3], al hough a gene al
sub h eshold MOS anslinea heo em has no been
de ised un il now. In his pape we p o ide his gene al
heo em and ou line he condi ions unde which
sub h eshold MOS ansis o s, iewed as ou e minal
de ices, sa is y a gene al anslinea p inciple.
The ope a ion o a sub h eshold MOS can be
desc ibed by
he
ollowing
equa ion
[2],
[7]-[9]
whe e
V h
=
KTIq
is he mal ol age,
I,
is a posi i e
cons an cu en ,
S
is he ansis o size ac o
(S
=
WIL
,
whe e
W
is ansis o wid h and
L
is i s
leng h), and
K
is a echnology dependen posi i e
pa ame e . This equa ion holds ue as long as
whe e
@FB
is he de ice’s la band ol age [lo].
Vol age
VBs
can ake ei he posi i e o nega i e alues
as long as he pa allel PN diode junc ion is biased below
i s o wa d conduc ion h eshold ol age. Pa ame e
K
is known o ha e a sligh dependency on ol age
VBS
[2]. Howe e ,
in
his pape we will assume
K
o be
cons an , which is a easonable assump ion i ca e is
aken o make he VBs ol ages simila o all
ansis o s.
Fo ope a ion
in
sa u a ion eq. (1) can be simpli ied
o (i
VDs
>>
V h)
(3)
and be ew i en as
whe e
I
(a
“no malized cu en ”)
is ansis o cu en
no malized wi h espec o ansis o size ac o
S
=
WIL,
and
i,,
i,
a e dimensionless numbe s
called
pseudo-cu en s
and equal o
(5)
GS‘ Ih
.
‘BSI
‘1
h
i,
=
e
iB
=
e
Le us use he symbol in Fig. 1 o ep esen a weak-
in e sion MOS in sa u a ion. Le us call he pa h ha
goes om he ga e e minal
G
o he sou ce e minal
S
he
G
-
b unch
(o
Ga e-b unch),
and he pa h ha
goes om he bulk e minal
B
o e minal
S
he
B
-
b unch
(o
Bulk-b unch).
We a e using a diode-
like symbol o ep esen he exponen ial ela ionship
be ween he ol age o he b anch and he cu en
lowing ou o he de ice and a capaci i e-like
e mina ion o each diode symbol o ep esen he
capaci i e coupling na u e o he
Ga e
and
Bulk
e minals. I
Vss
=
0
(o cons an ) he e is an exac
exponen ial ela ionship be ween
VGs
and
ZDs
(see
eq.
(3)) and he o iginal BJT anslinea o mula ion can
be di ec ly and exac ly applied.
11. Gene alized T anslinea Theo em o
Sub h eshold
MOS
T ansis o s
In his sec ion we will conside he condi ions unde
which anslinea p inciples can be applied o ci cui s
PB
S
Fig.
1:
T anslinea Symbol Rep esen a ion o
Sub h eshold
MOS
Tkansis o in Sa u a ion
0-7803-5471
-0/99/$10.0001999
IEEE
11-302
Fig.
2: Example o Coupled
G-loops
using
anslinea symbol ep esen a ion
Fig.
3: Illus a ion o he
G-o de
concep . De ices ‘1-2-3-
6’ o m a
G-loop
which is coupled o
G-loop
o med by
de ices ‘2-4-5’, because de ices ‘1-2-3-4’ o m a
B-loop.
De ices ‘1-2-3-4-5-6’ o m a
Closed T anslinea Se ,
and
so
do de ices 6 and
7.
De ice 2 has a
G-o de
o
nc2
=
2
because i s
G-b anch
belongs o wo
G-loops
o he same
Closed T anslinea Se .
All o he de ices ha e
G-o de
one.
wi h sub h eshold
MOS
ansis o s bu wi hou
imposing he cons ain o making
Vss
=
0.
We will
in oduce i s some p elimina y heo ems and
de ini ions, and hen s a e and p oo he gene alized
anslinea heo em o sub h eshold
MOS
de ices.
The i s concep s o be in oduced a e
G-loop
and
B-loop.
A
G-loop
(o
Ga e-loop)
is a closed loop o
G-
b anches,
and a
B-loop
(o
Bulk-loop)
is a closed
loop
o
B-b anches.
Fo hese loops we can s a e anslinea
heo ems o hei
pseudo-cu en s,
whose p oo is
iden ical as o he o iginal BJT T anslinea Theo em.
Theo em:
In a G-loop con aining an
a bi a y
numbe o G-b anches, he p oduc o pseudo-
cu en s o b anches cpnnec ed in he
Clock-Wis~G(CW) di ec ion
is
equal o he
co esponding p oduc o b anches connec ed
in he Coun e -Clock-Wise (CCW) di ec ion.
No e ha since
pseudo-cu en s
a e dimensionless
en i ies we can ha e an a bi a y numbe o b anches
o ien ed
CW
and ano he a bi a y numbe o b anches
o ien ed CCW (as opposed o he case o eq.
(7)).
A
comple ely equi alen heo em holds di ec ly o
B-
Up o now hings a e simila o classical anslinea
loops, excep ha an a bi a y numbe o b anches a e
allowed. Howe e , he p esence o wo exponen ial
b anch ol ages in eq. (3)
is
wha makes sub h eshold
MOS
anslinea
loops
mo e gene al and complica ed
han he classical ones. A i s consequence
o
his ac is
he ollowing concep o
coupled loops:
De ini ion: Two
G-loops a e said o be
coupled i a leas one
MOS
de ice
o
he
i s G-loop and a leas one o he di e en
de ice o he second
G-loop
sha e hei
espec i e B-b anches in
a
common
B-loop.
loops.
This is illus a ed in Fig.
3.
De ices ‘1-3-5’ o m a
G-
loop
and de ices ‘2-4-6’ o m ano he
G-loop.
Howe e , de ices ‘1-2-3-4’ o m
a
B-loop,
hus making
he p e ious wo
G-loops
o be coupled h ough he
B-
b anches
o de ices
1,2,3
and 4.
An equi alen de ini ion applies o
coupled
B-
loops.
No e ha wo loops may ha e a common b anch
wi hou being necessa ily
coupled loops.
In he example o Fig. 3, we can w i e o he wo
G-loops
(
‘SS4
+
‘LIS6
-
‘BSZ)
=
Ioe
whe e all
pseudo-cu en s
i,
ha e cancelled ou by
applying he abo e Theo em. Howe e , due o
B-loop
‘1-2-3-4’,
‘BSI
+
‘BS4
=
‘LIS2
+
‘BS3
(7)
which in oduces a coupling be ween he wo equa ions
in
(Il),
and makes
G-loops
‘1-3-5’
and ‘2-4-6’ o be
coupled loops.
When de ices o m mul iple ouching loops i is no
clea which ones o choose o how many o choose. Fo
example, in Fig. 4 one can choose
G-loops
‘1-2-3-6’, ‘6-
7’,
and ‘2-4-5’. Bu why no conside ‘1-3-4-56’,
‘6-7’,
and ‘2-4-5’, o ‘1-3-4-5-7’ and ‘1-2-3-6’. One can y all
possible op ions as long as one chooses a se o
Non-
Redundan
(NR) loops:
De ini ion:
A
se
o
loops
is
said o be Non-
Redundan
(NR)
i he sum
o
b anch ol ages
o any loop canno be exp essed as a linea
combina ion
o
he sum
o
b anch ol ages
o
o he loops in he se .
Fo example, in Fig. 4, o
G-loops
‘1-2-3-6’, ‘2-4-
5’,
and ‘1-3-4-5-6’ hei espec i e sum
o
b anch
ol ages is,
‘GS6
+
‘GS,
=
‘CS2
+
‘GS3
“GS2
+
VGS4
=
VGSS
VGS6
+
VCSl+
VGS4
=
VGS3
+
VGSS
(8)
Any
o
hese h ee equa ions can be exp essed as a
linea combina ion o he o he wo. Thus he h ee
G-
loops
do no o m a
Non-Redundan se
o
G-loops.
Howe e , any wo o hese h ee
G-loops
do
o m a
Non-Redundan se
o
G-loops.
The ac ha sub h eshold
MOS
ansis o s can
o m
coupled loops
yields na u ally o he ollowing
concep o
Closed T anslinea Se ,
De ini ion:
Gi en a se
o
MOS
de ices, and
once a Non-Redundan se
o
loops has been
chosen, a Closed T anslinea Se
(CTS)
is
a
se
o
de ices such ha all loops hey o m
a e only coupled among hem, bu no
.o
loops
11-303
-I
A
+ L
BHCL
8
1V3TH
BF l
8T&J T-
Fig.
4
Example
o
Closed
3’5
T anslinea Se s.
MOS
De ices
7
and
8
o m
a
Closed T anslinea Se ,
and
so
do
MOS
De ices
1-7.
whe e b anches o o he de ices (no
belonging o he
CTS)
a e p esen .
This is illus a ed in Fig.
5.
Le us selec he NR se o
G-loops
‘1-2-3-7’, ‘4-5-6’, and ‘7-8’, and he NR se o
B-loops
‘1-2-3-4-56’, ‘7’, and
‘8’.
G-loops
‘1-2-3-7’
and ‘4-5-6’ a e coupled because he e is a e
B-b anches
o de ices o bo h
G-loops
ha a e sha ed in he
common
B-loop
‘1-2-3-4-5-6’. The wo
G-loops
‘1-2-3-
7’ and ‘4-5-6’, and he wo
B-loops
‘1-2-3-4-5-6’ and
‘7’ a e no coupled o o he loops (ei he
G-loop
‘7-8’
no
B-loop
‘8’), hus ( o he chosen NR se o loops)
de ices ‘1-2-3-4-5-6-7’ o m a
Closed T anslinea Se .
On he o he hand,
G-loop
‘7-8’ is no coupled o any
o he loop, no a e
B-loops
‘7’ and
‘8’.
The e o e,
de ices ‘7-8’ o m ano he
Closed T anslinea Se .
When wo king wi h mul iple
G-loops
and
B-loops,
wi h some o hem being coupled, i is no e y
con enien o classi y each b anch as being CW o
CCW o ien ed,
as
will become appa en la e . Le us
ins ead classi y all b anches in o wo o ien a ion g oups,
he
a-wise
o ien ed b anches and he
p-wise
o ien ed
b anches. Two b anches a e classi ied in o he same
g oup (ei he he
a-wise
o he
p-wise)
i hey appea in
he same loop wi h he same o ien a ion. On he
con a y, wo b anches a e classi ied each in o a
di e en g oup (one in o he
a-wise,
he o he in o he
p-
wise)
i hey appea
in
he same loop wi h opposi e
o ien a ion. No e ha now a CW b anch in one loop and
a CCW b anch
in
ano he loop can be classi ied in o he
same
a-wise
o
p-wise
g oup. I a b anch is sho -
ci cui ed, i o ms a one b anch loop and can be
classi ied as ei he
a-wise
o
p-wise.
Ano he concep ha is use ul o s a ing he
gene alized anslinea sub h eshold
MOS
heo em is
ha o
G-o de
and
B-o de
o
a
MOS
de ice in
a
Closed T anslinea Se :
De ini ion
4:
Once a
NR
se
o
loops
has been
chosen, a sub h eshold
MOS
ansis o which
is pa
o
a
Closed T anslinea Se
is said
o ha e a
G-o de
o
alue
nc,
i i s
G-
b anch
belongs o
nc
G-loops
o he gi en
Closed T anslinea Se .
An equi alen de ini ion o
B-o de
can be s a ed o
B-
loops.
The concep is illus a ed in Fig. 4. Le
us
choose
he NR se o
G-loops
‘1-2-3-6’, ‘2-4-5’, and ‘6-7’ and
o
B-loops
‘1-2-3-4’,
‘5’,
‘6’, and
‘7’.
G-loops
‘1-2-3-6’
and ‘2-4-5’ a e coupled because de ices ‘1-2-3-4’ o m
a
B-loop.
The e a e no o he couplings among he
chosen loops. Consequen ly, de ices
‘
1-2-3-4-5-6’ o m
a
Closed T anslinea Se
which consis s o
G-loops
‘1-
2-3-6’ and ‘2-4-5’ and
B-loops
‘1-2-3-4’,
‘5’,
and ‘6’.
De ices
6
and
7
o m one
G-loop
(‘6-7’) and wo
B-
loops
(‘6’
and
‘7’)
which a e no coupled o any o he
loop. The e o e de ices 6 and 7 o m ano he
Closed
T anslinea Se .
MOS
de ice 2 has
G-o de
nG2
=
2
because i s
G-b anch
appea s in wo
G-loops
o he
same
Closed T anslinea Se .
MOS
de ice 6 does no
ha e
G-o de
2 because, al hough i s
G-b anch
belongs
o wo di e en
G-loops,
hese wo loops do no belong
o he same
Closed T anslinea Se .
All
MOS
de ices
ha e
B-o de
one because hei
B-b anches
appea only
in one
B-loop.
When a
G-b anch
has
G-o de
g ea e han one i
belongs o mo e han one
G-loop
o
he same
Closed
T anslinea Se .
In such cases i is possible ha he
b anch be classi ied as
a-wise
in some
G-loops
and as
p-
wise
in o he
G-loops.
Unde hese ci cums ances i is
con enien o di ide i s
G-o de
in o wo pa s
(9)
nc
=
na.,+n
B,
G
whe e
na
(le
us
call i
G-a-o de )
deno es he imes
his
G-b hnch
is classi ied as
a-wise
in a CTS, and
n
(le us call i
G-p-o de )
deno es he imes i is
clhied as
p-wise
in CTS. Simila ly, o
B-b anches,
he
B-o de
can be sepa a ed in o he
B-a-o de
(
na,
)
and he
B-p-o de
(
nP,
B).
Using he concep s and p elimina y heo ems
in oduced un il now, i is possible o s a e and p oo he
gene alized anslinea heo em o sub h eshold
MOS
ansis o s’:
Theo em:
Gi en a se o sub h eshold
MOS
de ices and choosing o hem a se o
Non-
Redundan G-loops
and
B-loops,
o each
Closed T anslinea Se
he ollowing can be
s a ed:
I
i is possible
o
ind an
a-
and
p-wise
classi ica ion
o
hei
G-loops and B-loops
such ha
a) he
sum
o
G-a-o de s
equals he
sum
o
G-
P-o de s
Zna,,,
=
Cnp,cl
(10)
J
E
{
a-w se)
Is
{p-wise}
bland, e e y ime a de ice’s
G-b anch
is
classi ied as
a-wise
in a
G-loop
i s
B-b anch
can be classi ied as
a-wise
in some
B-loop,
and e e y ime a de ice‘s
G-b anch
is
classi ied as
P-wise
in a
G-loop
i s
B-b anch
can be classi ied as
p-wise
in some
B-loop,
hen he p oduc o no malized cu en s
aised o he powe o hei
G-a-o de
o
all ansis o s in he
CTS
whose
G-b anches
ha e been classi ied
a-wise
equals he
p oduc o no malized cu en s aised o he
powe o hei
G-P-o de
o all ansis o s
whose
G-b anches
ha e been classi ied
P-wise.
P oo :
Fo each
G-loop
in he
Closed T anslinea Se
he
ollowing holds:
11
iG1
le
{p-wise)
1.
The heo em will be s a ed using
G-b unches
as
p ima y b anches
and making
B-b anches
o depend on hem. Howe e , because
o
he symme y be ween
G-b unches
and
B-b unches
(due
o
he
symme y be ween
V,,
and
V,,
ol ages in eq.
(3)),
he heo em
can be s a ed
as
well by in e changing
G-b unches
and
B-
b unches.
11-304
Since his is ue o e e y single
G-loop
we can
mul iply hese equa ions o he chosen se
o
Non-
Redundan
G-loops
and hei p oduc will s ill be equal
o uni y,
Fu he mo e, we can aise i o he powe o
K,
and i
s ill be equal o uni y,
No e ha , since he de ices
o m
a CTS, all b anches
will be p esen and no b anch
o
ano he CTS appea s.
Consequen ly, eq.
(18)
includes all
G-b anches
o
he
CTS and only he b anches
o
his CTS. Equi alen ly,
he same can be s a ed o all
B-loops,
bu aising now o he powe o 1
-
IC,
o con enience.
No e ha , due o s a emen
b)
in Theo em 3, e e y ime
a de ice has i s
pseudo-cu en
iGj
in
he nume a o
o
eq.
(1
8), i s
pseudo-cu en
iBj
will also appea in he
nume a o
o
eq. (19), and bo h will appea
na,
cj
imes. And he same holds o
pseudo-cu en s
in he
denomina o s
o
eqs. (18) and (19). The e o e, le us
de ine
na,
and
n
such ha
1
Also, since he de ices o m a
Closed T anslinea Se ,
eq. (1 8) includes all de ices o he CTS, and
so
does eq.
(1
9). Consequen ly, we can mul iply eqs. (1 8) and
(1
9)
and index he
iG
and
i pseudo-cu en s
o
he same
de ice wi h he same su&c ip and use his subsc ip o
index he MOS de ice,
On he o he hand, due o s a emen a) in he
heo em he ollowing is sa is ied
By mul iplying eqs.
(21)
and
(22),
and using eq.
(4)
we
ob ain
which concludes he p oo
o
he
Gene alized
Sub h eshold MOS T anslinea Theo em.
0
111.
Re e ences
B. Gilbe , “T anslinea Ci cui s: A P oposed
Classi ica ion,”
Elec onics Le e s,
ol.
1
I,
No.
1,
pp. 14-16, 1975; e a a, ol.
11,
No.
1.
A. G. And eou and
K.
A. Boahen, “T anslinea
Ci cui s
in
Sub h eshold MOS,”
Jou nal
o
Analog
In eg a ed Ci cui s and Signal P ocessing,
ol. 9,
pp. 141-166, 1996.
E. A. Vi oz, “Analog VLSI Implemen a ion
o
Neu al Ne wo ks,” in
Handbook o Neu al
Compu a ion,
Ins i u e
o
Physics Publishing and
Ox o d Uni e si y P ess, USA.
B. A. Minch, C. Dio io, P. Hasle and
C.
Mead,
“T anslinea Ci cui s using Sub h eshold Floa ing-
Ga e
MOS
T ansis o s,”
Jou nal
o
Analog
In eg a ed Ci cui s and Signal P ocessing,
ol. 9,
pp. 167-179, 1996.
E. See inck and
R.
J. Wiege ink, “Gene alized
T anslinea Ci cui P inciple,”
IEEE Jou nal o
Solid-s a e Ci cui s,
SC-26, ol. 8, pp. 1198-1102,
Augus 1991.
D.
R.
F ey, “Log-Domain Fil e ing: An App oach o
Cu en -Mode Fil e ing,”
IEE
P oceedings, Pa -G,
ol. 140, pp. 406-416, Decembe 1993.
E.
A.
Vi oz and J. Fell a h, “CMOS Analog
In eg a ed Ci cui s based on Weak In e sion
Ope a ion,”
IEEE Jou nal o Solid-s a e Ci cui s,
SC-12(3), pp. 224-231, June 1977.
E.
A.
Vi oz, “Mic opowe Techniques,
“
in
Y.
P.
Tsi idis and P. An ogne i (Eds.),
VLSI Ci cui s o
Telecommunica ions,
P en ice Hall, 1985.
C.
A.
Mead,
Analog VLSI and Neu al Sys ems,
Addison Wesley: Reading, MA 1989.
[
101
Y.
Tsi idis,
Ope a ion and Modeling
o
he
MOS
T ansis o ;
McG aw Hill In . Edi ions, 1988.
11-305