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OTA-based non-linear function approximations

Sánchez Sinencio, Edgar; Ramírez Angulo, Jaime; Linares Barranco, Bernabé; Rodríguez Vázquez, Ángel Benito

Abstract

The suitability of operational transconductance amplifiers (OTAs) as the main active element to obtain basic building blocks for the design of programmable nonlinear continuous-time networks is examined. The main purpose is to show that the OTA, as the active element in basic building blocks, can be efficiently used for nonlinear continuous-time function synthesis. Two efficient nonlinear function synthesis approaches are presented. The first approach is a rational approximation, and the second is a piecewise-linear approach. Test circuits have been integrated using a 3-μm p-well CMOS process. The flexibility of the designed and tested circuits is confirmed.

Full text

OTA-B ased Non-linea Func ion App oxima ions Edga Shchez-Sinencio’, Jaime Rami ez-Angulo’, Be nabe‘ Lina es-Ba anco’*’, Angel Rod iguez-Viizquez2 ‘Depa men o Elec ical Enginee ing, Texas A&M Uni e si y College S a ion, Texas 77843-3128, USA. 2Depa amen o de Elec 6nica y Elec omagne ismo Uni e sidad de Se illa, 41012-Se illa, Spain Abs ac - The sui abili y o ope a ional anscon- duc ance ampli ie s (OTAs) as he main ac i e ele- men o ob ain basic building blocks o he design o p og ammable non-linea con inuous- ime ne - wo ks is p esen ed. The main pu pose is o show ha he OTA, as he ac i e elemen in basic build- ing blocks can be e icien ly used o non-linea con inuous- ime unc ions syn hesis. Two e icien non-linea unc ion syn heses app oaches a e p e- sen ed. The i s app oach is a a ional app oxima- ion and he second is a piecewise-linea app oach. Tes ci cui s ha e been in eg a ed using a 3j1 p-well CMOS p ocess. The lexibili y ci he designed and es ed ci cui s is con i med. I. INTRODUCTION La ely, se e al au ho s [I] - [5] ha e been success ully using he Ope a ional T ansconduc ance Ampli ie (OTA) as he main ac i e elemen in con inuous- ime ac i e il- e s. The OTA’s p og ammabili y na u e’ and he ac ha OTAs ha e only a single high impedance node, in con as o con en ional op amps make he OTA an excel- len de ice candida e o high equency and ol age (o cu en ) p og ammable analog basic building blocks. The applicabili y o OTAs as componen s o he design o lin- ea ne wo ks has been ex ensi ely discussed elsewhe e [l], [6] and no epea ed he e. The objec i e o his pape is o examine he applicabili y o OTAs as he basic elemen s o he design o non-linea ne wo ks. The e is no much epo ed in he li e a u e on he use o OTA o designing non-linea block componen s [7] -[8]. The e a e epo ed excellen con ibu ions 191 - [ll], I161 o non-linea ci cui s dealing wi h pa icula impo an non-linea p oblems. In ou p oposed app oach a he han y o ackle a speci ic p oblem, we ocus ou a en ion in a gene al app oach deal- ing wi h non-linea basic building blocks using OTAs as he main ac i e elemen s. A his poin no emphasis was done o op imize he ci cui pe o mance bu o explo e he po en ial and applicabili y o he OTA-based non-linea sys em app oach. ’ The ou pu cu en Io o an OTA due o a di e en ial inpu Vid is 10 = gmUid and gm is a ol age (cu en ) con ollable pa- ame e ll], [6], 171. 96 ISCAS ’89 11. BASIC BUILDING BLOCKS Mul iplie Block. A wo inpu ou quad an mul iplie has an ou pu (cu en ) gi en by whe e he mul iplie cons an KM has uni s o A/V2. I Vl and Vz can ake any posi i e o nega i e sign, he mul- iplie is called a ou -quad an mul iplie . This mul iplie is ep esen ed in Fig. l(a). The co esponding OTA-based implemen a ions a e shown in Fig. l(b). The block ‘an ep esen s a signal a enua o , i s unc ion is such ha he maximum ol age swing o Vl and V2 a e equalized, and -Vbb is he usual bias con ol o he OTA. An ac i e a - enua o can be implemen ed in CMOS echnology [15]. Al hough no indica ed in Fig. 1, assume he powe sup- plies o he OTAs a e VDD and -V~S. Fo he ci cui o Fig: l(b) we ob ain and I,=-g mZ 1 - - -K(VI, + VSST)Vl (2b) whe e K is a p ocess- and geome y-dependen cons an , Vss~ = Vss -V , and V is a ansis o h eshold ol age2. The ou pu cu en becomes IO = -aKVlV2 = -/KMIVIV~ whe e IKMI = aK. We ha e he lexibili y o making he sign o KM posi i e o nega i e by injec ing V2 o OTAl ins ead o o OTA2. Di ide Block. A wo inpu di ide has an ou pu which is he a io o he wo inpu s, mul iplied by a dimensional (in ol s) cons an KR, i.e., VO = KR~. A-symbol o he di ide is shown in Fig. 2(a), whe e he no a ion n and d s ands o nume a o and denomina o , espec i ely. The co esponding OTA-based ci cui implemen a ion us- ing he mul iplie symbol is shown in Fig. 2(b). Squa ing and High Powe s (Ezponen ia ion) Blocks. A one inpu squa e has an ou pu p opo ional o he squa e o We ha e Msumed equal K’s and h eshold ol ages ’s o he OTAs. CH2692-2/89/0000-00% $1.00 0 1989 IEEE Ucpa mn o Elcc ncal and Compu e EngLneenng and The coo dina ed Science Labo a o y he inpu , 10 = KMV:. The implemen a ion o he squa e is ob ained by simply using a mul iplie wi h equal inpu s. To ob ain an ezponen ia ion ( aising o a powe ) block op- e a o wi h an inpu V; and an ou pu o be p opo ional o Yp whe e p > 2, i is equi ed (p + 1)/2 mul iplie s o p odd and p/2 mul iplie s o p e en. Fu he mo e, since he p oposed mul iplie s a e o he ansconduc ance ype, he ou pu s mus be con e ed in o ol ages o be able o use hem as he inpu s o ollowing mul iplie s. This can be easily ob ained by connec ing an equi alen esis o a he ou pu . An equi alen esis o using an OTA [5] - [6] is implemen ed by connec ing he ou pu o he nega i e OTA inpu and g ounding he posi i e OTA inpu . Squa e-Roo e Block. A one inpu squa e- oo e has an ou pu wi h he nega i e o posi i e squa e oo o an inpu ol age mul iplied by a cons an o a p ope pola i y, e.g., o=*lGl , V,>Oo Vo=+IJqI , i< 0. Fig. 3(a) shows he implemen a ion o he squa e- oo e , whe e he ou pu VO is gi en by VO = KR~ which yields V, = 1-1. A mo e de ailed desc ip ion o he implemen a ion is shown in Fig. 3(b). Piecewise-Linea Func ion Gene a o s. Diodes in e con- nec ed wi h OTAs can simula e ideal diodes, hus allow- ing a piecewise-linea app oxima ion o any desi ed non- linea unc ion. The accu acy, na u ally, imp o es wi h he numbe o line segmen s in ol ed. The ideal basic building block o piecewise-linea unc ion app oxima ion is shown in Fig. 4. No e ha ID = 0 un il he b eaking poin ( ol age e e ence V,) is eached. .The slopes o he lin- ea segmen s a e p opo ional o he gm’s. The diodes can be implemen ed wi h MOS ansis o s wi h hei ga e and d ain ied oge he . I a s ep ype inpu -ou pu cha ac e - is ic is needed o implemen discon inui ies in he unc ion app oxima ion, he linea OTA can be subs i u ed by an OTA compa a o which ideally simula es a la ge gm and a sa u a ion (ou pu ) cu en o * biaS. 111. NONLINEAR FUNCTION SYNTHESES A a ional app ozima ion ha has he gene al o m o a polynomial unc ion o o a a io o polynomials,i.e., whe e i is a posi i e in ege numbe . In ac , he exponen i can be a ac ional exponen o he o m p/q, whe e p and q a e nega i e o posi i e in ege s. The exponen a ion blocks a e o he ype o Fig. 5. I a nega i e -p/q is needed, an addi ional di ide has o be used. A piecewise linea app ozima ion can be ob ained by using he basic building block o Fig. 4. Changing he PO- la i y o diodes and inpu e minals o OTA’s allow he ob en ion o nega i e and posi i e slopes. A bi a y unc ions wi h a iable posi i e and nega i e slopes can be app oxi- ma ed. Fu he mo e, he slopes a e ol age p og ammable3 which gi es an addi ional lexibili y in he unc ion app ox- ima ion design p oblem. One example o an a bi a y unc- ion app oxima ion con aining nega i e and posi i e slopes is discussed in he nex sec ion. De ails on he p ac ical conside a ions o he OTA-based piecewise-linea ci cui s a e unde conside a ion. I . EXPERIMENTAL RESULTS Se e al es -ci cui s con aining OTAs and ansis o s connec ed as diodes we e ab ica ed using a 3pm p-we11 CMOS p ocess by MOSIS. The linea ized OTA used o syn hesize he di e en non-linea analog unc ions is e- po ed in (31. The die a ea o each OTA is 220x700p nz and i consumes 10 mW o powe wi h 5V supply ol - ages. A chip pho omic og aph showing wo comple e OTAs o he es ci cui is depic ed in Fig 6. A. Pansconduc ance Mul iplie . The s uc u e used is shown in Fig. 6. The measu ed alue o KM is 2.4pA/V2. In all measu emen s desc ibed he e a LOOKS? load esis o was used. The la ge-signal cha ac e - is ics o he mul iplie a e shown in Fig 7. Vi was held cons an (a O.OV, &0.33V, 0.66V, l.OOV), while he inpu Vz a ied be ween klV. The non- linea i y e o is shown in Fig 8. Fo Vz, a iangula 2 ol s peak- o-peak signal was applied, while keeping Vi = 1V. The ou pu cu en p oduced a iangula ol age signal o 660 mV peak- o-peak. Subs ac ing his signal om an ideal iangula wa e, he esul ing peak- o-peak e o signal was 17 mV which yields a non-linea i y e o o nea ly 2%. Repea ing he mea- su emen bu in e changing VI and Vz and being Vi a iangula signal o 2 ol s peak- wpeak. A peak- o- peak e o signal wi h an ampli ude o 23 mV co e- sponding o a 3.5% non-linea i y e o was measu ed. Fig. 9 shows he mul iplie being used as a modula o o he case whe e bo h inpu signals a e sinusoidal. B. Piecewise Linea App ozima ion. The in ended ans- e cha ac e is ic o be conside ed is shown in Fig. lO(a) and consis s o h ee linea segmen s. The in- di idual slopes due o each OTA a e indica ed in he lowe pa o Fig. lO(a), and he composed esul ing ans e cha ac e is ics a e shown in he uppe pa o Fig. lO(a). The ac ual OTA ci cui implemen a ion is shown in Fig. 10(b) whe e an op ional diode and ol - age sou ces ha e been added a he OTA (2 and 3) and shown wi h b oken lines o imp o e high equency pe o mance o he ci cui . No e ha he slopes o he ans e cha ac e is ics can be easily modi ied by changing he OTA ol age-dependen ansconduc- ances. The expe imen al esul s a e shown in Fig. lO(c). V. CONCLUSIONS The sui abili y o OTAs as he main ac i e elemen o ob ain basic building blocks o he design o non-linea ne wo ks was es ablished. Me hods o implemen p ac- Addi ionally, i a esis i e load simula ed wi h an OTA is used, he slopes become a ios o ansconduc ances which p o ida a e y good empe a u e compensa ion and accu acy imp o emen . 97 ical non-linea ci cui s in a sys ema ic design app oach we e de eloped. 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Wassenea , ‘A Ve sa ile CMOS Linea Thnsconduc o /Squa e-Law Func ion Ci cui ’, IEEE J. Solid- S a e Cinui s, ol. SC-22, pp 3W377, June 1987. I. Fig. 1 Mul iplie (a) Symbol, (b) OTA Implemen a ion 1. . A Fig. 2 Di ide (a) Symbol, (b) OTA Implemen a ion. “D , I I T’ Fig. 3 Squa e-Roo e , (a) Implemen a ion, (b) OTA Implemen a ion. Fig. 4 Piecewise-Linea (PL) Func ion Gene a o Building Block . I (0) , **.: (b) Fig. 5 Exponen ia ion (C) (Raising o a powe ) Ope a ion, (a) Squa e , (b) Cubi , (c) p- h. 98 Depa men o ELecmcal and Compu e Enpeenng and The coo dina ed Science Labo a o y ~ Fig. 6 A Chip Pho o Mic og aph o Two Comple e OTAs. Fig. 7 La ge-Signal Cha ac e is ics o Mul iplie . VI = *{1.00, 0.66, 0.33, 0.O)V. (a) T ans e Cha ac e is ic Va iable T iangula Wa e o Vz. (e) Expe imen al Resul s. 99