scieee Open visual document viewer

A versatile sensor interface for programmable vision systems-on-chip

Rodríguez Vázquez, Ángel Benito; Liñán Cembrano, Gustavo; Roca Moreno, Elisenda; Espejo Meana, Servando Carlos; Domínguez Castro, Rafael

Abstract

This paper describes an optical sensor interface designed for a programmable mixed-signal vision chip. This chip has been designed and manufactured in a standard 0.35μm n-well CMOS technology with one poly layer and five metal layers. It contains a digital shell for control and data interchange, and a central array of 128 × 128 identical cells, each cell corresponding to a pixel. Die size is 11.885 × 12.230mm2 and cell size is 75.7μm × 73.3μm. Each cell contains 198 transistors dedicated to functions like processing, storage, and sensing. The system is oriented to real-time, single-chip image acquisition and processing. Since each pixel performs the basic functions of sensing, processing and storage, data transferences are fully parallel (image-wide). The programmability of the processing functions enables the realization of complex image processing functions based on the sequential application of simpler operations. This paper provides a general overview of the system architecture and functionality, with special emphasis on the optical interface.

Full text

A Ve sa ile Senso In e ace o P og ammable Vision Sys ems-on-Chip A. Rod íguez-Vázquez 1, G. Liñán, E. Roca, S. Espejo and R. Domínguez-Cas o Ins i u o de Mic oelec ónica de Se illa − CNM-CSIC Edi icio CICA-CNM, C/Ta ia s/n, 41012- Se illa, SPAIN ABSTRACT This pape desc ibes an op ical senso in e ace designed o a p og ammable mixed-signal ision chip. This chip has been designed and manu ac u ed in a s anda d 0.35µm n-well CMOS echnology wi h one poly laye and i e me al laye s. I con ains a digi al shell o con ol and da a in e change, and a cen al a ay o 128 x 128 iden ical cells, each cell co esponding o a pixel. Die size is 11.885 x 12.230mm2 and cell size is 75.7µm x 73.3µm. Each cell con ains 198 ansis o s dedica ed o unc ions like p ocessing, s o age, and sensing. The sys em is o ien ed o eal- ime, single-chip image acquisi ion and p ocessing. Since each pixel pe o ms he basic unc ions o sensing, p ocessing and s o age, da a ans e ences a e ully pa allel (image-wide). The p og ammabili y o he p ocessing unc ions enables he ealiza ion o complex image p ocessing unc ions based on he sequen ial applica ion o simple ope a ions. This pape p o ides a gene al o e iew o he sys em a chi ec u e and unc ionali y, wi h special emphasis on he op ical in e ace. 1. INTRODUCTION Al eady in 1997, o ecas s ega ding he nex wa e o In oTech Inno a ion [1] an icipa ed ha high-pe o mance senso s would shape he i s decade o he 3 d millenium. Thus, while in he 1980s inno a ions we e ocused on c ea ing p ocesso -based compu e “in elligences”, and in he 1990s on ne wo king hose in elligences oge he wi h lase - enabled bandwid h, inno a ions du ing his decade will mos likely be ocused on adding sensing and ac ua ing “o gans” o hese de ices and ne wo ks. In his a ea we ha e a lo o lea n om na u e. The close in eg a ion, o in e ac ing sensing, p ocessing and ac ing subs uc u es ea u ed by na u al beings p o ides an endless sou ce o inspi a ion o hese new gene a ions o senso ial in elligences [2]. Exploi ing his sou ce o inspi a ion may lead o e olu iona y changes in he concep ion and implemen a ion o hese sys ems. Thus, he ex ensi e usage o digi al p ocessing in oday’s con en ional a chi ec u es 2 is o eseen o be complemen ed in he u u e wi h an inc eased usage o pa allel analog p ocesso s capable o ope a ing concu en ly and in close in e ac ion wi h he senso y ci cui s. The inal a ge is o ealize comple e senso y/p ocessing (and ac ua ing) sys ems in a single chip h ough he sma syne gy o senso s, analog p ocessing and digi al p ocessing s uc u es. In his sense, du ing he las ew yea s signi ican ad ances ha e been made ega ding he implemen a ion o Vision Chips; i.e. chips which a e capable o acqui ing images and p ocessing hem using ci cui s embedded in he same silicon subs a e in which he image is cap u ed − called ocal-plane p ocessing. The design o hese chips can be unde aken ollowing wo al e na i e app oaches: • Pick up a speci ic ask and i s model and implemen i on silicon. This is he usual way, leading o e y use ul, ask- speci ic sma senso s [3] [4]. • Make gene al-pu pose mixed-signal image p ocessing de ices [5]. Tha is, de ices which, h ough p og amming, can be employed o ealize a my iad o image p ocessing asks, simila o he possibili y ea u ed by he ubiqui ous on Neumann digi al p ocesso . The chip epo ed co e ed in his pape , called ACE16k, belongs o his second g oup. I has a Single-Ins uc ion- Mul iple-Da a a chi ec u e (SIMD) and includes some o he mos ele an ea u es o he Cellula Nonlinea /Neu al Ne wo k Uni e sal Machine (CNNUM) pa adigm [6]. O he chips, also belonging o his g oup, ha e been epo ed in 1. [email protected]; phone: +34 95 5056666; ax: +34 95 5056686 2. These con en ional a chi ec u es employ analog blocks only a he on -end sec ions, while all p ocessing is ealized in he digi al domain. The o e all sequence o ope a ions is: Sensing − A/D Con e sion − Digi al-P ocessing − D/A Con e sion) Senso s and Came a Sys ems o Scien i ic, Indus ial, and Digi al Pho og aphy Applica ions IV, Mo ley M. Blouke, Ni in Sampa , Rica do J. Mo a, Edi o s, P oceedings o SPIE-IS&T Elec onic Imaging, SPIE Vol. 5017 (2003) © 2003 SPIE-IS&T · 0277-786X/03/$15.00 38 Downloaded F om: h ps://www.spiedigi allib a y.o g/con e ence-p oceedings-o -spie on 30 Jan 2020 Te ms o Use: h ps://www.spiedigi allib a y.o g/ e ms-o -use he las yea s [7]−[17], e c. Some o hem do no ha e senso y capabili ies, hey a e jus concei ed as p og ammable co- p ocesso s; o he s a e only designed o black-and-whi e image p ocessing; and o he s a e designed o e y la ge densi y, bu ea u e e y small analog accu acy in he in e nal p ocessing. This pape p esen s he new mul i-mode op ical senso which is used a he senso y pa o he chip ACE16k. The p esen ed pixel has he capabili y o acqui ing isual in o ma ion in e y di e en illumina ion condi ions since i p o ides bo h, linea in eg a ion and loga i hmic comp ession sensing schemes. 2. ACE16k ARCHITECTURE ACE16k ollows he SIMD-CNNUM pa adigm. As shown in Fig. 1, Single Ins uc ion Mul iple Da a sys ems consis o an a ay o iden ical P ocessing Elemen s (PE) which execu e he same ins uc ions a he same ime. Ins uc ions a e execu ed on da a which a e locally de ined, a he PE le el, while he ins uc ion sequence is issued by a con ol uni sha ed by all he PEs in he a ay. Mos commonly, he communica ion ne wo k among PEs is es ic ed o he nea es neighbo s. In he case o low-le el 1 image p ocessing, whe e he same ope a ion sequence is applied o all he p ocesso s in he a ay, he mos s aigh o wa d mapping be ween images and chips consis s o using one p ocessing elemen pe pixel, hus p o iding a e y compac , and e icien way o de ining algo i hms. ACE16K implemen s mos o he ele an unc ional ea u es o he CNNUM [6] pa adigm, namely: • non-linea dynamic coupling among he elemen a y p ocessing uni s, also called cells, • local, dis ibu ed memo ies o s o age o in e media e images, • local, dis ibu ed logical p ocessing, • inco po a ion o global, chip-le el s uc u es o s o age o ins uc ions and con ol o algo i hmic p ocessing lows. Thus, ACE16k is capable o ope a ing as a lexible, use -p og ammable algo i hmic p ocesso ; a kind o isual mic op ocesso [5]. A he ha dwa e le el, he ins uc ion se o such a mic op ocesso includes se ing he alues o he s engh s o he cell in e connec ions, called in e connec ion empla es which de ine he ac ual low-le el image p ocessing ask o be execu ed; also implies econ igu ing he in e connec ion opology o he s uc u es inco po a ed a cell le el, hus con olling da a lows and basic ci cui con igu a ion; and a anging local analog and digi al ope a ions be ween locally-s o ed images, which allows o he execu ion o bo h pixel-wise bina y in e sion in black and whi e images, o ins ance, and image-wise ope a ions - g ay-scale combina ions o wo images by linea a i hme ic ope a ions. The a chi ec u e o he sys em is depic ed in Fig. 2(a). He e, a ious unc ional subs uc u es a e iden i ied: • A senso y/p ocessing co e, which consis s o an a ay o iden ical PEs. These PEs ha e embedded ci - cui s uc u es o op ical sensing, p og ammable analog p ocessing (designed o a ound 7bi accu acy), p og am- mable bina y p ocessing, local memo y and signal low econ igu a ion. 1. This e e s o he p ocessing ealized a he ea ly s ages o he low, whe e he amoun o da a o p ocess has e y la ge dimen- sionali y, , whe e is he numbe o ows in he a ay o pixels, and is he co esponding numbe o columns. This low-le el p ocessing s age is c i ical o educing he dimensionali y o he da a o subsequen p ocessing s ages. Fig. 1. Typical SIMD A chi ec u e PE PE PE PE PE PE PE PE PE PE PE PE PE PE PE PE PE PE PE PE PE Con olle Ins uc ion Bus PE NM×NM 128 128× P oc. o SPIE Vol. 5017 39 Downloaded F om: h ps://www.spiedigi allib a y.o g/con e ence-p oceedings-o -spie on 30 Jan 2020 Te ms o Use: h ps://www.spiedigi allib a y.o g/ e ms-o -use • A ing o bo de cells used o es ablish spa ial bounda y condi ions o image p ocessing, and se e al bu e s d i - ing analog and digi al signals o he a ay. • A p og amming block, which con ains se e al SRAM digi al memo ies used o s o e he algo i hms o be execu ed by he chip. • A block o I/O image low con ol and o ma con e sion1. 128 Digi al o Analog (DAC) and Analog o Digi al (ADC) con e e s, one pe column, which cons i u e a digi al I/O po o images. • Digi al blocks o au oma ic add essing o ows and columns du ing image I/O p ocesses. The chip uses a 32-bi bidi ec ional da a bus o image communica ion pu poses, and se e al add ess buses o he di e en blocks wi hin he p og amming memo y. The I/O in e ace ollows e y simple hand-shaking p o ocols. Table 1 summa izes he main cha ac e is ics o he p o o ype. ACE16k is concei ed o be used in wo al e na i e ways. Fi s , whene e he images o be p ocessed a e di ec ly acqui ed by he op ical inpu module o he chip [5]; and second, as a con en ional image co-p ocesso wo king in pa allel wi h a digi al hos ing sys em which p o ides and ecei es he images in elec ical o m. 3. PHYSICAL FOUNDATIONS FOR LIGHT SENSING IN CMOS Pho o-de ices a e he elemen s which allow o he combina ion o senso y and p ocessing planes in a single chip. Se e al possibili ies o he a chi ec u e o he pho osenso exis , howe e , all o hem ely on he same physical phenomenon, he pho oelec ic e ec . Co alen bonds holding he elec ons a hei a omic si es in he la ice can be b oken by an inciden adia ion i he ene gy o he inciden pho on is g ea e han he silicon band gap. Since his ene gy le el is abou , hose pho ons wi h wa eleng hs below could be, heo e ically, powe ul enough o exci e ca ie s om he alence band in o he conduc ion one, hus p oducing he pho o-gene a ion. Un o una ely, no all he pho ogene a ed ca ie s a e de ec ed. Recombina ion phenomena make he numbe o c ea ed pai s o dec ease e y as . Typical ca ie li e imes in s anda d CMOS echnologies a e in he o de o o and, he e o e, e icien mechanisms o collec hem be o e hey ecombine mus be p o ided. The simples me hod o do his consis s o using e e se biased diodes. I pho o-gene a ion occu s wi hin he deple ed quasi-neu al egion o he p- n junc ion, he buil -in junc ion po en ial will quickly sepa a e elec ons and holes. These ca ie s o m a cu en whose alue can be quan i ied by he ollowing exp ession [18], (1) 1. F om digi al o analog and ice e sa. 128 x128 PEs A ay P og amming Block 32b Digi al Da a Bus Mem. Con ol. Bus Memo y Con ol Add essing Ci cui y I/O Con ol 2 x 128 S/H Bank 128 DA-AD Bank Figu e 2. A chi ec u e and mic opho og aph o ACE16k. Analog Coe . Bus Digi al Ins uc ion Bus (a) (b) 11.885mm 12.230mm 1.124eV 1.1µm 0.1µs10µs Iph ηqP i ⋅⋅ hυ⋅ -------------------- = 40 P oc. o SPIE Vol. 5017 Downloaded F om: h ps://www.spiedigi allib a y.o g/con e ence-p oceedings-o -spie on 30 Jan 2020 Te ms o Use: h ps://www.spiedigi allib a y.o g/ e ms-o -use whe e, is he quan um e iciency, is he elec on cha ge, is he densi y o powe o he inciden ligh , and is he ene gy o one pho on wi h equency . The quan um e iciency igu e, , exp esses he quo ien be ween he numbe o gene a ed pai s and he numbe o inciden pho ons wi h a ce ain equency . (2) which is always lowe han uni y in he isible and in a ed po ion o he spec um. The numbe o cha ges pho ogene a ed by an inciden ligh wi h a powe and a wa eleng h de ec ed du ing a gi en ime in e al by using a pho osenso o a ea and a quan um e iciency is gi en by [20], (3) whe e is a physical cons an de ined as and is a unc ion o he wa eleng h o he inciden ligh . The o al amoun o elec ical cha ge de ec ed is simply ob ained as, (4) while he equi alen cu en p oduced wi hin his in e al is, (5) Mos usually, he pho ogene a ed cu en is con e ed in o an equi alen ol age alue by using one o he ollowing me hods; he in eg a ion o he pho ogene a ed cu en on o a p e iously ini ialized capaci o , o he ans o ma ion o he Technology ST Mic oelec onics 0.35 µm 5M-1P Design S yle Full Cus om (Analog Co e) and S anda d Cells (Digi al I/O block) Package Ce amic QFP144 # o Cells 16384 (128 x 128 A ay) # o T ansis o s 3,748,170 # o T ansis o s pe cell 198 Cell Size 75.7 µm x 73.3 µm Cell Densi y 180 cells/mm2 Pixel Signal Swing [0.6, 1.4]V (P og ammable) Weigh Signal Swing [2.15, 2.95]V (P og ammable) Accu acy o Analog P ocessing Blocks ~1% Time-Cons an -linea . con ol.- ~160ns Time-Cons an -CT Dynamics- ~0.8µs I/O Mas e Clock 32 MHz Powe Supply 3.3V +/- 10% Powe / Speed / A ea Figu es 0.33x1012OPS, 0.18 x1012OP/J and 3.8x109 OPS/mm2 # o Analog Ins uc ions in mem. 32 # o Digi al Ins uc ions in mem. 64 x 64 Con igu a ions Die Size 11885.0 µm x 12230 µm Table 1. ACE16k Cha ac e is ics ηqP ihυ⋅ υ ηυ ηυ() no. o de ec ed cha ges no o inciden pho ons -------------------------------------------------------- = P0λ Tin ∆Aηλ() n∆AP 0Hξλ() Tin ∆⋅⋅⋅ ⋅= HHhc⋅() 1– =ξλ() ληλ()⋅≡ Qph qn∆⋅ Aξλ() Tin ∆⋅⋅[]P0qH⋅⋅⋅== Iph Qph Tin ∆() 1– ×Aξλ()⋅[]P0qH⋅⋅⋅== P oc. o SPIE Vol. 5017 41 Downloaded F om: h ps://www.spiedigi allib a y.o g/con e ence-p oceedings-o -spie on 30 Jan 2020 Te ms o Use: h ps://www.spiedigi allib a y.o g/ e ms-o -use cu en in o a ol age by d i ing some kind o esis i e load. In any case, a emp s o linea ly co e he huge ange o illumina ions exis ing in eal li e scenes1 − 6 o 8 decades − will always ail due o he undamen al limi s imposed by noise loo and powe supply le el. An in e es ing possibili y o expand he senso dynamic ange − by enouncing o linea i y − consis s o using a non- linea I-V con e sion block wi h a comp essi e-like cha ac e is ic. Among all he possible non-linea ans e unc ions, a e y sui able one o isual signal comp ession is he loga i hmic unc ion. I s sui abili y comes om he e idence [21] ha pho o- ecep o s in he human e ina exhibi a loga i hmic- ype esponse o ligh s imulus which p o ides a wide dynamic ange o ope a ion. We will see in he nex sec ions how o exploi he pho o-sensi i e de ices exis ing in s anda d CMOS echnologies o ob ain a mul i-mode pho osenso . 4. THE MULTIMODE OPTICAL SENSOR 4.1. Senso Schema ic Fig. 3 shows he a chi ec u e o p oposed senso which can be di ided in o h ee blocks. The i s one, a i-s a e eadou bu e , is used o con ol he communica ions among he senso and o he s blocks in he CNNUM cell − basically he LAM module. Senso eadou s a e con olled by he global p og amming signal ROPT − which co esponds o one bi in a Swi ch Con igu a ion Regis e SCR. The second pa o he senso is he ci cui y de o ed o he ansduc ion o he pho o-gene a ed cha ges in o ei he a cu en o a ol age le el. The use has he possibili y o selec ing he pho o- ansduc ion mechanism by means o con igu a ion signals , which a e also s o ed in he SCR, as will be explained la e . The hi d block includes he op ical senso i sel and wo con igu a ion swi ches used o selec one ou o he h ee a ailable pho osenso s. The selec ion o he senso is ca ied ou by o he SCR p og amming signals called DW and WS. 4.2. In eg a ion Modes In in eg a ion modes, he senso p o ides an ou pu ol age which linea ly depends on he in ensi y o he inciden ligh . Independen ly o he ac ual pho osenso selec ed, he sensing p ocedu e is always he same. Fi s o all, a e u ned o by making LOG1=LOG2=1. A e wa ds, swi ch p echa ges he in e nal node a o he use -de inable ol age VPCH. Finally, swi ch is u ned o and he pho ogene a ed cu en cha ges o discha ges he pixel capaci o . Fig. 4 shows he h ee di e en con igu a ions o linea in eg a ion. Fig. 4(a) shows he equi alen schema ic o he i s in eg a ion mode. I uses he N-Well/P-Subs pho odiode ( ) as ligh sensi i e de ice. The P-Di /N-Well diode is annulled by making signal WS=0, while he bipola ansis o is also o by he same signal since i o ces . Then, i is easy o ob ain ha , 1. In humans, sepa a e he gla e limi om he sco opic h eshold.~200dB Fig. 3. Rep esen a ion o he Mul imode Pixel. Schema ic. Ou pu ROPT LOG2 LOG1 VLOG VPCH PCH VNWELL WS DW Ms1 Ms2 Ms3 Ms4 Ms5 MLOG2 MLOG1 P-Subs. p + n - n + WS Ms2 VNWELL DW Ms1 a p -- DWS DDW Bip LOG1 LOG2 PCH,, Ms1 2, Ms5 4, Ms3 Ms3 Iph Cpix DWS VBE 0= 42 P oc. o SPIE Vol. 5017 Downloaded F om: h ps://www.spiedigi allib a y.o g/con e ence-p oceedings-o -spie on 30 Jan 2020 Te ms o Use: h ps://www.spiedigi allib a y.o g/ e ms-o -use (6) whe e is he sensing a ea o he N-Well/P-Subs pho odiode, is he powe o he inciden ligh pe a ea uni , and . Fig.4(b) shows he senso schema ic when he P-Di /N-Well pho odiode is used. By se ing WS=1, DW=0 and o he supply le el, we ensu e ha he N-Well/P-Di diode emains e e se biased, and ha he e ical bipola ansis o is OFF. Only he ca ie s collec ed by he P-Di /N-Well junc ion will con ibu e o he pho ocu en yielding, (7) Finally, Fig. 4(c) shows he schema ic o he senso when WS=DW=1. In his case, he base o he e ical BJT emains in open ci cui . Pho ogene a ed mino i y ca ie s in he base-emi e junc ion p oduce an emi e -base cu en which is ampli ied by he ansis o e ec . In his case, he ou pu is simply gi en by (8) The use o linea sensing schemes is limi ed o images whe e he exis ing dynamic ange is ela i ely na ow. The nex sec ion shows how he p oposed mul i-mode senso can be con igu ed o pe o m di e en log-comp ession sensing schemes. 4.3. Loga i hmic Comp ession wi h T ansis o -based Loads Loga i hmic- ype sensing has he ad an age o p oducing images in which he di e ence be ween pixels only depends on he di e ence in op ic con as and no on global illumina ion condi ions. Then, senso s exhibi a wide dynamic ange DR. Howe e , he p ice o be paid o ha DR inc ease is a educ ion o he con as in he image − mos ly due o he log unc ion. To be e unde s and he ad an ages o log comp ession ision i is necessa y o iden i y he e y basic na u e o he in o ma ion ha is p ocessed by ision sys ems. Excep in some e y special cases, his in o ma ion is a con as le el. In hose si ua ions whe e ansmission e ec s on he medium can be neglec ed, he ligh in ensi ies o e he objec a e he p oduc o he i adiance and he e lec ance o i s su ace a his poin . The esponse o a linea senso ocusing o objec poin is always p opo ional o he i adiance a his poin and he e lec ance o he su ace a his poin , hus, Fig. 4. A ailable Con igu a ions o In eg a ion Modes. Ou pu ROPT VLOG MLOG2 MLOG1 VPCH Ms3 Cpix VNWELL VNWELL VNWELL DW=1 WS=0 DW=1 WS=1 LOG2= 1 LOG1= 1 PCH WS=1 DW=0 Iph Iph Iph a aa a a) b) c) DWS DDW Bip TR Tin VaVPCH IPh Cpix ----------Tin –V=PCH Tin Cpix ----------AWS ξWS λ()⋅[]P0qH⋅⋅⋅×–= AWS P0 ξλ() λη WS λ()⋅≡ VNWELL VaVPCH IPh Cpix ----------Tin +VPCH Tin Cpix ----------ADW ξDW λ()⋅[]P0qH⋅⋅⋅×+== VaVPCH βTin Cpix ----------ADW ξDW λ()⋅[]P0qH⋅⋅⋅–= Eρ OLin xy,() xy,() Exy,() ρxy,() P oc. o SPIE Vol. 5017 43 Downloaded F om: h ps://www.spiedigi allib a y.o g/con e ence-p oceedings-o -spie on 30 Jan 2020 Te ms o Use: h ps://www.spiedigi allib a y.o g/ e ms-o -use (9) whe eas ha o a loga i hmic senso is (10) Hence, wo di e en egions o a su ace wi h di e en e lec ances and , bu he same i adiance would p oduce a di e en ial ou pu signal gi en by, (11) in he linea case while o he loga i hmic senso i would be, (12) As i can be seen, in his la e case, he di e en ial ou pu signal does no depend on he i adiance bu on he di e ence be ween he e lec ances. Ob iously, his is no ue o he linea senso , whe e he di e en ial ou pu signal also depends on he common i adiance le el. Hence, he same de ails − poin s wi h he same le el o − in an inpu image migh no be dis inguishable in linea senso s because o he i adiance le el which could e en make he senso o be o e -exposed -sa u a ed. Fig. 5 illus a es he ou pu images p o ided by linea and loga i hmic sensing schemes when cap u ing a wide dynamic ange day-ligh scene. I is seen how, a he expense o a loss o con as , he log- ype acqui ed image gi es in o ma ion abou a eas which couldn’ be iden i ied in he linea ly acqui ed one. Mos log- ype epo ed CMOS image senso s exploi he loga i hmic ela ionship exis ing be ween he cu en and he ga e o sou ce ol age when MOS ansis o s ope a e in he sub h eshold egime. This p ope y is used in ou senso as ollows. Fig.6 shows he con igu a ions a ailable o his ype o log-sensing in he p oposed ci cui . No ice ha he ese ansis o has been emo ed om he schema ic since log-mode acquisi ions wo k in con inuous ime − he ou pu ol age co esponds o he equilib ium poin o d i ing he non-linea esis i e load wi h he pho ogene a ed cu en . On he o he hand, he selec ion o he ac i e load mus be p ope ly done acco ding o he senso choice. Assuming ha he d ain o sou ce cu en o a sa u a ed PMOS ansis o − bulk e minal connec ed o − wi hin i s sub h eshold egion is app oxima ely gi en by1 [22], 1. The de ini ion o he pa ame e s in his exp ession can be ound in [22]. OLin xy,()Exy,()ρxy,()⋅= OLog xy,()Log ρxy,()Exy,()⋅[]= ρx1y1 ,() ρx2y2 ,() E ∆OLin E∆ρ⋅= ∆OLin Log ρ1 ()Log ρ2 ()–= ρ Fig. 5. Example o Log-Type Visual Acquisi ion. a) No mal Linea ly Acqui ed Image. b) Log-Type (a) (b) Ms3 Vdd 44 P oc. o SPIE Vol. 5017 Downloaded F om: h ps://www.spiedigi allib a y.o g/con e ence-p oceedings-o -spie on 30 Jan 2020 Te ms o Use: h ps://www.spiedigi allib a y.o g/ e ms-o -use (13) i can be ound ha he s eady s a e ou pu ol ages a e gi en by he se o exp essions displayed in Fig.6. In addi ion o he loss o con as p oduced by he loga i hmic unc ion, i is also obse ed ha he exp essions o he ou pu ol age con ain se e al echnological pa ame e s ela ed o he load ansis o . Un o una ely, misma ching phenomena make hose pa ame e s o a y om pixel o pixel and, consequen ly, he Fixed Pa e n Noise (FPN) igu es in hese kind o senso s a e wo s han hose o hei linea coun e pa s. An in e es ing al e na i e which pa ially sol es his p oblem consis s o using co ela ed-double sampling echniques [23] a he pixel le el by exploi ing he econ igu a ion and algo i hmic capabili ies o he CNNUM cell. Howe e , i may equi e adding new modules o he cell and he execu ion o a ce ain numbe o addi ional ope a ions, hus slowing- down he p ocessing. In he nex sec ion we will p esen a log senso which does no use any ansis o load and ha , consequen ly, exhibi s be e FPN igu es. 4.4. Loga i hmic Comp ession in he Pho o- ol aic Mode The idea o using he pho odiodes in he pho o- ol aic mode is ela i ely ecen . Up o ou knowledge, i was i s in oduced and es ed by D . Ni e al. in 1994 [24]. Expe imen al esul s demons a ed ha his kind o senso s exhibi a e y wide dynamic ange and good uni o mi y FPN pe o mances. The basic concep in oduced by his sensing scheme consis s o using a pho odiode in an open ci cui con igu a ion, and o le i o each i s s eady s a e. In ou case i wo ks as ollows. Suppose he ci cui in Fig.6(b). I no esis i e load is connec ed o node a and he ci cui is allowed o achie e i s s eady s a e, he cha ge conse a ion p inciple imposes ha he cu en lowing om VNWELL o node a, ha is 1, mus be equal o ha lowing h ough he diode. Assuming a ypical exponen ial exp ession o he diode cu en yields, Fig. 6. A ailable Con igu a ions o S anda d Log.Comp ession Modes. MLOG2 MLOG1 DW= 1 WS= 0 LOG2= 0 LOG1= 1 WS= 1 DW= 0 Iph Iph (a) MLOG2 MLOG1 LOG2= 1 LOG1= 0 (b) VLOG VLOG VLOG MLOG2 MLOG1 VNWELL DW= 1 WS= 1 LOG2= 0 LOG1= 1 Iph (c) VLOG VLOG VLOG VNWELL VNWELL Va np2 VLOG VT0M2 npM2 1–   Vdd –npM2 UTLn AWS ξWS λ()⋅P0qH⋅⋅⋅ ID0M2 ---------------------------------------------------------------- –– Fig. 3(a) VLOG VT0M1 npM1 1–   Vdd npM1 UTLn ADW ξDW λ()⋅P0qH⋅⋅⋅ ID0M1 ------------------------------------------------------------------- ++ + npM1 --------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------Fig. 3(b) npM2 VLOG VT0M2 npM2 1–   Vdd –npM2 UTLn βADW ξDW λ()⋅P0qH⋅⋅⋅ ID0M2 ------------------------------------------------------------------- –– Fig. 3(c)              = IDS ID0e npVSVG –VT0np1–()Vdd –– npUT ---------------------------------------------------------------------------------    ⋅= ISIph + P oc. o SPIE Vol. 5017 45 Downloaded F om: h ps://www.spiedigi allib a y.o g/con e ence-p oceedings-o -spie on 30 Jan 2020 Te ms o Use: h ps://www.spiedigi allib a y.o g/ e ms-o -use (14) which shows a log- ype ela ionship be ween he pixel ou pu ol age and he ligh in ensi y. The main ad an age o his log-comp ession scheme is ha he ob ained exp ession is simple , i in ol es only a ew e ms, han hose on Fig.6, and consequen ly, i s ope a ion is in insically mo e obus agains cell- o-cell disc epancies. 4.5. Layou The mul i-mode senso desc ibed in his pape has been included in o he cell used by he ACE16K [25] p o o ype. Fig.7(a) shows he layou o he senso in he ACE16K chip. The N-Well in which he senso is laid-ou is . A silicided p o ec ion a ea has been de ined all a ound he sensing a ea in o de o a oid a loss o sensi i i y o he senso . In addi ion, all he econ igu a ion swi ches a e PMOS ype and laid-ou in a di e en NWELL o isola ion pu poses. Finally, as can be seen in Fig. 7(b), all me al laye s con ain a hole jus in he a ea unde which he senso is placed in o de o allow he ligh o di ec ly each he sensing a ea. 5. CONCLUSIONS A new mul imode op ical senso a chi ec u e o he op ical in e ace o Focal Plane A ay P ocesso s chips ha e been p esen ed. The senso o e s he possibili y o selec ing he ac ual ligh -sensi i e de ice as well as he mechanism o ansducing he pho ogene a ed cha ges. Bo h linea and log comp ession acquisi ion modes a e a ailable, making he senso e y sui able o i in o e y di e en illumina ion condi ions. 6. ACKNOWLEDGMENTS This wo k has been pa ially unded by CE P ojec IST-1999-19007 (DICTAM) and ONR P ojec N000140210884. 7. REFERENCES 1 P. Sa o, “Senso s: The Nex Wa e o In oTech Inno a ion”. Ins i u e o he Fu u e, 1997 Ten-Yea Fo ecas . 2 B. Roska and F. We blin, “Ve ical In e ac ions Ac oss Ten Pa allel, S acked Rep esen a ions in he Mammalian Re - ina”. Na u e, No. 410, pp. 583-587, Ma ch 2001. 3 C. Koch and H. Li (Eds.), Vision Chips, Implemen ing Vision Algo i hms wi h Analog VLSI Ci cui s. IEEE P ess, 1995. 1. is he sa u a ion cu en o he diode.IS VaVNWELL nUTLn Iph IS + IS --------------------    += 9.8µm9.8µm× Senso s Swi ches T i-s a e Bu e Fig. 7. Layou Views. a) The senso . b) The Cell in ACE16K. (a) (b) 46 P oc. o SPIE Vol. 5017 Downloaded F om: h ps://www.spiedigi allib a y.o g/con e ence-p oceedings-o -spie on 30 Jan 2020 Te ms o Use: h ps://www.spiedigi allib a y.o g/ e ms-o -use