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Received 23 August 2021; revised 8 October 2021; accepted 18 October 2021. Date of publication 21 October 2021; date of current version 2 November 2021. The review of this paper was arranged by Associate Editor Jingang Lai. Digital Object Identifier 10.1109/OJIES.2021.3121764 Grid-Following Voltage Source Converters: Basic Schemes and Current Control Techniques to Operate With Unbalanced Voltage Conditions PABLO MONTERO-ROBINA 1, KUMARS ROUZBEHI 1(Senior Member, IEEE), FRANCISCO GORDILLO 1(Senior Member, IEEE), AND JOSEP POU 2(Fellow, IEEE) 1System and Automation Department, Universidad de Sevilla, 41092 Sevilla, Spain 2School of Electrical and Electronic Engineering, Nanyang Technology University, Singapore 639798, Singapore CORRESPONDING AUTHOR: PABLO MONTERO-ROBINA (e-mail: [email protected]). This work was supported in part by the Agencia Estatal de Investigación (AEI)-Spain under Grant PID2019-109071RB-C41/AEI/10.13039/501100011033 and in part by the Junta de Andalucía-FEDER under Grant US-1264655 (ECOMIR). ABSTRACT The growing relevance of voltage source converters (VSCs), and the deep impact they have on the development and maintenance of the electrical grid, increase the necessity of further research on how to deal with nonideal grid conditions from the VSCs control. This paper is aimed to summarize the basic techniques and schemes that might be required for a grid-connected VSC to work under these conditions: grid synchronization schemes, sequence decomposition, current reference generation, and current controllers. At the same time, some alternative schemes that improves the basic ones are cited. Modelling and the two typical current controllers design and tuning under stationary and synchronous reference frames are also exhibited. Given the importance of the current control stage in the VSC behaviour, five control schemes, designed to track negative sequence currents, are shown and tested in simulation and experiments. According to the experiments, it is shown that the standard proportional-resonant controller achieves the best performance in negative sequence tracking due to the robustness of its non-ideal version, the improved implementation thanks to the delta operator, and the non-dependence on grid-synchronization schemes. Alternatively, one approach based on dual synchronous reference frame is also highlighted for easiness of implementation and good performance. INDEX TERMS Current controller, current reference generation, negative sequence, unbalanced grid, voltage source converter (VSC). I. INTRODUCTION The development of power semiconductors and the flexibility required for power converters are the main reasons for the popularity of voltage source converters (VSCs) [1]. By modulating different voltage levels, they can control the power flow demanded by the design application [2], [3]. Either if VSCs are grid-connected or working in islanded operation mode [4], [5], the flow of energy is controlled by means of the phase currents. Thus, determination of the desired phase currents (current reference generation) and the design of the stage that regulates them (current controller) are crucial [6]. In the following, some fundamental concepts and the state-of-art of unbalanced grids are exhibited. A. UNBALANCED GRIDS 1) UNBALANCED GRID FORMULATION The constant enlargement of the electrical grid makes it more vulnerable to short-circuits [7], [8], voltage dips [9], imbalances [10] or any kind of faults. Therefore, VSCs are demanded to handle such situations whether by assisting on the grid restoration [11], [12], or by not worsening it [13], This work is licensed under a Creative Commons Attribution 4.0 License. For more information, see https://creativecommons.org/licenses/by/4.0/ 528 VOLUME 2, 2021
[14]. Such events can be regarded as distortion of the desired sinusoidal grid voltages, which can be mathematically derived as the addition of a negative and zero sequence to the balanced one, usually referred as positive one [15]. This transformation facilitates the modelling and control design under such conditions [16], and it is referred as sequence decomposition. Thus, sequence decomposition is vital to know the grid state and to develop proper control strategies [17], [18]. Similarly, the phase currents can be decomposed into positive and negative sequences, whereas zero sequence current component is not present in three-wire systems. Thanks to this transformation, their interaction with the phase voltages can be further analyzed [6], [8]. Harmonics and interharmonics are also a source for unbalanced voltage conditions that generate voltage drop along the line [19], which may require the use of additional VSCs as active power filters to compensate for such a condition [20]. Plenty of mitigation techniques have been developed to compensate the presence of harmonics that renewable energy sources may introduce into the grid [21]. Nevertheless, this paper focuses on the negative sequence presence as source of unbalance. 2) EFFECTS ON THE SYSTEM PERFORMANCE The effect the negative sequence voltage and current have on the system performance has been deeply explored [5]– [8], [22]–[24]. It generates oscillations of twice the fundamental frequency in the active power [6], which can have consequences on the dc bus, generating additional harmonics (namely 3 rd one) in the phase currents [7]. Unfortunately, it has been shown that achieving no power ripple and injecting positive balanced phase currents are opposite targets [25]. Several proposals have been presented to diminish the power ripple rModifying the current reference generation stage [23]– [29]. rBy means of averaged modelling techniques to design a control strategy [6], [30]. rModifying the voltage commands [8]. Some strategies based on modifying the current reference generation stage are exposed later. 3) SEQUENCE DECOMPOSITION TECHNIQUES The knowledge of the positive, negative and zero sequence components of the grid voltage facilitates the designing of control strategies that considers the voltage unbalance condition. However, such an obtention is not instantaneous and some voltage imbalances in a grid may appear due to sudden faults or unbalanced load connections [31]. Therefore, the voltage and current sequence decomposition computation should be fast enough to detect a grid fault on time [32]. On this matter, several solutions have been presented in the literature rThe use of delayed signal cancellation (DSC) tools [9], [18]. rSecond order generalized integrators with quadrature signal generation (SOGI-QSG) [33], [34]. rDerivation of a model from generic equations of the three sequences [17]. rThe use of filters or moving average windows [10], [35]. Nonetheless, filter-based approaches have been reported as the slowest and least reliable approach due to its dependence with the filter dynamic [10]. B. PHASECURRENTSUNDERUNBALANCEDVOLTAGE CONDITION 1) CURRENT REFERENCE GENERATION As it was stated, one strategy to deal with the power ripple generated under unbalanced voltage condition is by means of the current reference generation. These references can be defined for each sequence component allowing the control to achieve specific objectives, such as only positive sequence current [26], no active power ripple [27], a trade-off in active and reactive power ripple attenuation [25], or grid voltage support [24], among others. An issue that should not be underestimated is that the positive and negative reference value of the current may increase the rms value of any of the three-phase currents without increasing the effective energy flow. However, some of the previous control objectives require the injection of negative sequence current. Consequently, some constraints in the current reference generation might be necessary if the hardware limits require it. This can be done either dynamically, such as [22], which restricts each sequence component of the current reference proportionally to the nominal values; or, by using fixed limits, such as [7], which clamps the susceptance and conductance values used for current reference generation. It is worth noting that, due to these current limits, the active or reactive power capabilities might be compromised if the negative sequence current references are not zero [7]. 2) CURRENT CONTROLLERS Once the references are computed, the current controller (CC) should provide tracking capabilities of the positive and negative sequence components. Since the phase-amplitude control (PAC) [36] appeared as one of the first CC, plenty of CCs have been developed in the literature [5]–[10], [22]–[30], [37]–[43] targeting different objectives, although, it is always desired to achieve zero steady-state error and have the fastest and most damped transient as possible [10], [44]. Some CCs depend on the current sequence decomposition of the measured current and voltage as they track each sequence individually [24], [27]. In contrast, those approaches that do not depend on it [23], [28], [29] avoid the additional delay this process may introduce in the current closed-loop control [10]. In this paper, five CCs with negative sequence tracking capabilities are exposed and tested in simulation and experiments. VOLUME 2, 2021 529
MONTERO-ROBINA ET AL.: GRID-FOLLOWING VOLTAGE SOURCE CONVERTERS: BASIC SCHEMES AND CURRENT CONTROL TECHNIQUES TO OPERATE 3) COMMON CURRENT CONTROLLERS Regarding the most common linear controllers, two approaches are the most used ones due to its robustness and easiness of implementation rA proportional integral (PI) controller [1], [42] in synchronous reference frame (SyRF) [45]. rA proportional resonant (PR) controller [41], [46] in stationary reference frame (StRF) [15]. The former takes advantage of the fundamental component being a dc value in SyRF, whereas the later implements a resonant term that acts as an integrator for the resonant frequency. Thanks to this, the controller bandwidth covers the fundamental component in both cases. However, the PI controller bandwidth does not cover the negative sequence component, that appears as a component at twice the frequency in SyRF. To solve this, some modifications have been considered rAdding negative sequence feedforward terms in the closed loop [10]. rUsing full feed-forward schemes of the grid voltage for LCL-type grid-connected converters [47]. rUsing parallel PI schemes for each sequence [27], [43], referred as dual SyRF (DSRF). rUsing a PI+PR scheme in SyRF to track the component at twice the fundamental [48]. In contrast, when operating on the StRF using the PR scheme, the knowledge of the grid frequency can be used to properly track the positive and negative sequences at the same time [34]. However, the ideal behaviour of the resonant part narrows the controller bandwidth [49], and thus it is common to use a nonideal PR instead [50], where the bandwidth is widened at the cost of a more limited magnitude response. 4) ALTERNATIVE CURRENT CONTROLLERS Some additional linear current controllers for VSCs can be found in the literature as follows rThe plug-in repetitive controller, which tracks the fundamental component and its multiples [51], and can be used to cancel out the harmonic appearance [52]. rThose controllers based on state-feedback [53]. rControllers that are based on passivity with disturbance observer [6]. C. REFERENCE FRAME: STRF AND SYRF 1) PLL AND FLL In order to simplify the current control design, it is common to refer the ac variables in StRF (known as αβγ )usingthe Clarke transformation, where the zero sequence component can be isolated [15]. Alternatively, the SyRF (known as dq0) rotates the StRF using the Park transformation in such a way that the fundamental positive-sequence ac component appears as a dc magnitude, which further simplifies the modelling and control. However, the Park transformation requires the knowledge of the grid angle θg, which implies the use of a synchronization scheme. In this regard, a general classification can be derived whether they are open-loop, such as the transformation angle detector [45]; or closed-loop, such as the phase-locked loop (PLL) [54]. The closed-loops are the most common ones, however, in order to increase its robustness against harmonic presence, phase-shift or faults, some more complex schemes may be required [53], [55], [56]. Some PLL schemes are summarized as follows rBased on sequence decomposition [17], [57], [58]. rBased on delayed signal cancellation (DSC) [59], [60]. rBased on filters of moving average windows (MAF) [61]. rBased on second-order generalized integrator (SOGI) [62]. In contrast, the resonant term in the CC in StRF requires the knowledge of the fundamental frequency ωg. For this, a frequency-locked loop (FLL) is usually implemented [63]. Some FLL approaches are rBasedonSOGIs[64]. rBased on dual SOGI with quadrature-signal generation (SOGI-QSG). rBased on adaptive vectorial filters [65]. In general terms, the difference between FLL and PLL lies in the feedback loop: FLL tries to lock the frequency such that the output frequency equals the input one, while the PLL aims the same but for the input phase. Consequently, the FLL’s effect on the closed-loop system control is usually less noticeable than the PLL’s one, considering that the grid frequency does not have abrupt changes like the ones the grid phase may have under grid voltage sags. Besides, PLLs are more accurate than FLLs—a phase-locked variable implies to be frequency-locked, but not necessarily the opposite as it may exist some phase-shift [66]. 2) PI IN SYRF AND PR IN STRF Focusing on the two most typical CC schemes, PI in SyRF and PR in StRF [42], several comparisons have already been reported [38], [44], [57]. From this comparison, PR in StRF are highlighted for their simplicity in VSC applications, as they do not require the grid phase information [41]; but PI in SyRF are not undermined due to its easy tuning process and the well-established stability criteria of PI controllers [67]. It is also analytically shown that an ideal well-tuned PR in StRF has the same frequency response that the DSRF scheme [68]. Nevertheless, some applications may use both CCs and reference frames rScheme in [69] uses SyRF and StRF to control unbalanced and nonlinear loads in four-wire voltage source inverters. rWorks [48], [70] present a CC in SyRF that uses both PI and PR controllers and improves the transient behaviour under unbalanced grid voltages. rWork [71] proposes a modified SyRF such that the developed PLL transient performance is improved, specially against distortion, noise and grid disturbances. 530 VOLUME 2, 2021
FIGURE 1. Control diagram of a grid-connected VSC. D. CONTRIBUTIONS AND STRUCTURE This paper exhibits some of the basics techniques and fundamentals of VSCs to deal with unbalanced grid voltage conditions. For this, VSC modelling, control, and the two most typical CCs: PI and PR in SyRF and StRF, respectively, are initially exhibited. Some issues and solutions found in the literature related to unbalanced grid voltage conditions are exhibited and discussed: sequence decomposition, grid synchronization and current reference generation. Additionally, several current control schemes to operate under unbalanced voltage conditions are also presented and tested both in simulation and experiment. The rest of the paper is organized as follows. The basics of grid-connected VSCs, that are modelling, control schemes and tuning in SyRF and StRF are presented in Section II. Section III presents the unbalanced grid voltage conditions. For this, common strategies and approaches to deal with it are exhibited: sequence decomposition, and current reference generation with different objectives. Section IV shows five existing current controllers devoted to work under grid voltage unbalanced conditions, i.e. they are able to track negative sequence of the phase currents. Section V shows the results of testing these controllers in simulation with changes in the current references. Similarly, section VI shows the results of testing these controllers in experiments considering the same changes in the negative sequence current reference. II. VSC PRINCIPLES UNDER BALANCED CONDITIONS A. MODEL AND BASIC CONTROL SCHEME Fig. 1 depicts a generic grid-connected VSC scheme. The grid-side line impedance is denoted by Zg, while the VSC-side one is referred as Zl. The depicted variables are described as follows: Grid voltages vsabc ; phase currents iabc; phase voltages at the point of common coupling (PCC) vPCC abc ; dc-link voltage vdc; instantaneous active pand reactive qpower; plug-in filter inductance Land parasitic resistance R; current references i∗ abc; and converter output voltage vabc. Fig. 1 also depicts a generic control scheme based on a cascaded configuration with an outer controller (OC) and an inner current controller (ICC). The cascaded configuration is one of the most standard approach for the control of grid-connected VSC using linear controllers [72]. It is composed by the OC FIGURE 2. Generic diagram of the cascaded configuration with two linear feedback controllers. forwarded by the ICC, but it can be further expanded by including parallel or serial controllers/stages without losing generality. The OC along with the current reference generator determines the references for the ICC in such a way that the specific objectives of the VSC are fulfilled, such as grid voltage support or grid restoration [73], regulation of the dc-link voltage vdc [74], among others. The references that the OC generates may require to be transformed to current references, usually achieved by means of the instantanous power theory (IPT) [75], or the considered current reference generation strategy. The ICC takes the current references from the previous stages, and implements a control law to define the control action, which is a voltage vector that has to be modulated in the VSC output. In this way, ICC regulates iabc towards i∗ abc. Thanks to this, the OC loop, whose bandwidth is much smaller than the ICC one, can fulfill its control objectives. The modulation stage (usually PWM at a fixed switching frequency fs), that is placed before the ICC, is in charge of commanding the switching devices of the VSC in such a way that it reassembles such desired voltage vector. This is the common scheme of an inner current controller with modulator. However, there exist techniques that do not use a modulator [76] or explicitly model the modulator inside their formulation as an attempt to combine both strategies [77]. In case of a passive dc side, the task of regulating vdc towards v∗ dc is carried out by the OC which will define the active power reference p∗. Other objectives can be considered depending on the dc-link nature, such as charging/discharging an energy storage system, or supplying the grid in case of a blackout, among others [74]. The reactive power reference q∗ can be computed independently to v∗ dc to pursue different objectives, such as unity power factor (q∗=0), reactive power compensation, or grid voltage regulation [78]. A generic diagram of the cascaded configuration with the two controller loops is shown in Fig. 2. The transfer functions that appears in it are explained in the next section. Using this diagram, the noise induced by measurements or the implementation are modelled using variables ˆvsabc and ˆ iabc, respectively. VOLUME 2, 2021 531
MONTERO-ROBINA ET AL.: GRID-FOLLOWING VOLTAGE SOURCE CONVERTERS: BASIC SCHEMES AND CURRENT CONTROL TECHNIQUES TO OPERATE B. PI FOR DC-LINK VOLTAGE REGULATION Consider the active power balance of the system (Fig. 1), neglecting the losses and assuming that a resistor is attached to the dc-link Rdc, the following expression is obtained p=vdc vdc Rdc +Cdc dvdc dt ,(1) where pis the active power, and Cdc is the capacitance of the dc-link capacitor. From (1), the transfer function Gdc(s) can be obtained Gdc(s)= v2 dc(s) p(s)=1 Cdc 1 RdcCdc +s.(2) A PI controller acting on pcould regulate vdc towards a reference v∗ dc. Moreover, the neglected losses could be included in (2) as a proportional term to p, changing the model gain, but keeping the feasibility of using a PI controller. Work presented in [72] gives some guidance on how to tune the PI controller, resulting in kp=Cdc √3TsTi ,ki=Cdc 3TsT3 i ,Ti=α23Ts(3) where kpand kiare, respectively, the proportional and integral terms of the PI controller, Tsis the sampling time of the system (Ts=1/fs), and Tiis the integral time constant whose value should be tuned to limit the controller bandwidth to 1/50 and 1/10 of the ICC’s, i.e. α∈[10,50] [72]. For simplicity’s sake in the OC design, the closed-loop ICC transfer function was simplified to be a first-order system GICC(s)≈1 1+3Tss(4) with a bandwidth of 1/(2π(3Ts)) rad/s. C. TUNING AND DESIGN OF COMMON CC The current dynamic model of a grid-connected VSCs can be obtained from the Kirchhoff’s laws (KL) in Fig. 1 as follows vsi=Rtii+Lt dii dt +vi,i=a,b,c(5) where Rtrepresents the line and filter resistance, and Ltthe line and filter inductance. Defining v∗ ias the control output and Tf=Lt/Rtas the time constant of the system, the transfer function Gf(s) is extracted from (5) and commonly used to design and tune the ICC v∗ i:=vsi−vi Gf(s)=ii(s) v∗ i(s)=1 Rt+Lts=Tf Lt(1 +Tfs).(6) Besides, a transfer function Gd(s) that represents the delay of digital systems and PWM implementation is usually forwarded with Gf(s) in the model [79] as follows Gd(s)=1 (1 +1.5Tss).(7) In the following sections, the common current controllers used either in StRF or SyRF are shown. 1) PR IN STRF The common controller used in StRF is a proportionalresonant (PR) controller with control parameters kpand kr. It corresponds to a proportional term and a resonant term tuned at the target frequency. Ideally, it has infinite gain at this frequency, but the limited accuracy of digital systems and noise measurements requires a wider bandwidth to obtain a more robust controller [41]. Therefore, the resonant scheme is modified in such a way that its bandwidth is widened by ±ωf, resulting in the nonideal PR controller, whose transfer function is GSt c(s)=kp+krωfs s2+2ωfs+ω2 r ,(8) where the resonant frequency ωris selected to be equal to the grid one ωg. With this, the robustness against grid frequency variations is increased [50], [79]. The tuning of such controller can be made by designing the phase margin (PM) of the openloop system composed by (5), (7) and (8). Summarizing the procedure proposed in [79], the following equations can be used to tune the control parameters. As a result, a PM with the desired value PM∗ bw at the resulting bandwidth frequency fbw, and a minimum PM with value PM∗ res around the resonant frequency are achieved simultaneously fbw =2 31 4−PM∗ bw 360◦fs(9) kp=2πfbwLt(3Tsπfbw )2+1 (10) ∠Gst c(s)Gd(s)Gf(s)|s=j(ωg+ωf)=180◦−PM∗ res (11) Note that eqs. (9), (10) and (11) fix fbw,kpand krrespectively. For the tuning process, ωr=ωgcan be selected as the nominal of the grid, but a robust implementation of the PR controller [23] requires a more accurate value of ωg, which can be obtained by means of a FLL [33], [63], [65]. In terms of robustness against unbalanced and distorted grids, the SOGI-QSG scheme is gaining popularity [64]. The generic diagram of a FLL based on SOGI-QSG is depicted in Fig. 3(a). Basically, the SOGI-QSG performs as a filter tuned at a given frequency—selected as ωgfor the FLL application. The quadrature output (qv s) outputs such magnitude, but with a phase-delay of 90◦, as shown in the Bode plot of Fig. 3(b). Similarly, the same magnitude with no phase-shift can be obtained from this scheme, as shown in the Bode plot of Fig. 3(c). From this, a FLL scheme can be implemented as shown in Fig. 3(a) where an auto-tune block (gain γ)isused. In summary, the ICC diagram for StRF using the PR controller (8) and SOGI-based FLL is depicted in Fig. 4. 2) PI IN SYRF During normal operation, a vector represented in the αβγ frame is rotating with the grid angle θgat the fundamental 532 VOLUME 2, 2021
FIGURE 3. FLL based on SOGI-QSG with vsαas input: (a) General diagram, (b) Bode plot of SOGI quadrature qv s/vs, and (c) Bode plot of SOGI v s/vs. FIGURE 4. ICC diagram for StRF using the PR Controller with grid voltage feedforward term and SOGI-based FLL. frequency. By rotating the reference frame using the Park transformation, the vector will stay static in the SyRF, also known as direct-quadrature-zero (dq0) axes. Thus, the ac components at the fundamental frequency are transformed to dc ones. In this reference frame, the component of the γaxis is kept equal and referred as zero component. In contrast to StRF, this transformation modifies the VSC model (5) to vsd=Rtid+Lt did dt −ωgLtiq+vd(12) FIGURE 5. Diagram of a basic three-phase SRF-PLL with filter stage. Several types of filter stage are mentioned in [54]. vsq=Rtiq+Lt diq dt +ωgLtid+vq(13) where the cross-coupling terms (∓ωgLtiqd ) appear due to the derivative applied to the Park transformation matrix. For this, the control outputs are redefined as v∗ d:=vsd−vd+ωgLtiq,v∗ q:=vsq−vq−ωgLtid, in such a way that the same model (6) can be used for SyRF. As a result, each sequence dor qcan be controlled separately. Paper [80] makes a comparative of some cross-coupling decoupling techniques for SyRF that take parameter uncertainty into account. Given that the inputs have a dc nature, PI controllers can be used GSy c(s)=PI(s)=kp+ki s.(14) There exist several techniques for the tuning process of the PI control parameters. Following the procedure exhibited in [72], where the closed-loop ICC is formulated as a secondorder system with a damping ratio of 1/√2 and the integrator time constant Ti=kp/kiis selected to match Tf, the control parameters for the PI controller can be obtained as kp=Lt 3Ts (15) ki=Lt 3TsTf .(16) The SyRF scheme requires the knowledge of the grid angle θgto perform the Park transformation, which can be obtained by means of a PLL [40], [54], [55], [59]. The basic scheme usually comprises a phase detector (PD), a low-pass filter (LPF) and a voltage controlled oscillator (VCO) [45]. Accordingly, the most basic configuration of synchronous reference frame PLL (SRF-PLL) uses the abc to dq transformation as PD, a PI as LPF, and an integrator as VCO. This diagram of SRF-PLL with a filter stage for unbalanced and distorted grid rejection is shown in Fig. 5 [54]. Alternatively, more complex schemes can be used, such as the Dual SOGI-PLL (DSOGIPLL) [81], which combines the SOGI scheme to filter the grid voltage measurements and the conventional SRF-PLL, VOLUME 2, 2021 533
MONTERO-ROBINA ET AL.: GRID-FOLLOWING VOLTAGE SOURCE CONVERTERS: BASIC SCHEMES AND CURRENT CONTROL TECHNIQUES TO OPERATE FIGURE 6. ICC diagram for SyRF using the PI Controller with a SRF-PLL. FIGURE 7. (Left) Bode plot of PI and a nonideal PR controller tuned according to (10)–(11) and (15)–(16), respectively. (Right) Bode plot of the open-loop ICC. PM∗ bw =50, PM∗ res =30, Lt=2mH,Rt=0.02 ,wf=10 rad/s and Ts=1/5000 s. the Dual SRF-PLL (DSRF-PLL) [57] that decouples each sequence and implements the SRF-PLL in the positive one, or the complex-vector-filter that implements a prefilter in one single complex function to achieve sequence decomposition prior to the PLL [58]. In summary, the ICC diagram for SyRF using a PI controller and a SRF-PLL is shown in Fig. 6. Fig. 7 shows the Bode plot of both the non-ideal PR and the PI controller. Besides, the open-loop transfer function of the ICC considering (6) and (7) as ICCSt ol (s)=GSt c(s)Gd(s)Gf(s) is also depicted. As it can be seen, the PR controller can be tuned by selecting the corresponding values of the desired phase margin, while the PI controller can be tuned by knowing the system parameters. III. WORKING UNDER UNBALANCED VOLTAGE CONDITIONS This section will present some existing approaches of sequence decomposition, and current reference generation, which are used to operate under unbalanced grid voltage conditions. A. SEQUENCE DECOMPOSITION Sequence decomposition is the cornerstone to diagnose the grid voltage unbalanced state. Besides, some CCs rely on the voltage and current sequence decomposition affecting its performance. The sequence decomposition involves the use of a technique that separates one sequence from another, either by means of filtering or another analytical tool. Some of these techniques are rDelayed signal cancellation (DSC). rFilter-based techniques, usually low-pass (LPF) or Notch filters. rGradient descent method (GDM) rSchemes with SOGI-QSG. Considering the previous techniques, sequence decomposition schemes can be implemented using them. In the case of DSC, it is based on operating with the voltage vector (vsαβ ) and the delayed version—one fourth of the fundamental frequency period (Tg=2π/ωg)—in such a way that only the positively/negatively rotating vector remains [10]. However, any sudden change would take this delay time to be noticed, limiting its speed response. The technique based on DSC can also be used to filter out the harmonic content [60]. If the grid voltage vector is transformed to the SyRF, the positive/negative sequence component appear in the negative/positive SyRF as a ripple at twice the fundamental frequency. Therefore, a filter can be placed to suppress it, achieving sequence decomposition. Large variety of filters can be used for this purpose: band-stop, notch and low-pass, among others. However, the authors of [10] conclude that the transient of filter-based approaches are much slower and less accurate than those based on DSC. Alternatively, [17] uses the GDM, although its settling time of 50 ms is much larger than the one obtained with DSC, which makes it less appealing for sequence decomposition exclusively. SOGI-QSG schemes, which can be considered a particular type of filtering technique, are also a feasible option [33]. They are based on a similar principle to DSC-based techniques, where an operation with the filtered and quadrature outputs results in the positive or negative sequence. More complex schemes, such as the Dual SOGI-QSG (DSOGIQSG), stands out for its robustness and fast transient compared with other filter-based approaches. To depict the different properties, Fig. 8 shows a comparative between the techniques DSC, GDM, LPF, SOGI-based, and Notch filter for negative sequence extraction. The parameters for GDM are selected according to the guidelines provided in [17], the first-order LPF is tuned at 10 Hz and the notch filter is tuned with r=0.5 as shown in [10]. The Notch filter gives the fastest response at the cost of a considerable overshoot, followed by DSC with a transient time of its delay time Tg/4, and SOGI-QSG that takes a similar amount of time. The remaining solutions—LPF and GDM—are much slower or inaccurate at steady state, thus they are not recommended for sequence decomposition. Note that the GDM presented 534 VOLUME 2, 2021
FIGURE 8. Sequence decomposition techniques. Negative sequence detection response to sudden grid voltage imbalance at t=0.4s. in [17] was intended to be used as a FLL, and thus it is not optimized for this purpose. B. CURRENT REFERENCE GENERATION The current reference generation stage determines which general objectives are aimed, however some of them may not be accomplished simultaneously. The common objectives seen in the literature are: rVoltage support: The interaction of the current with the line and filter impedance contributes to compensate deviations from the nominal voltage conditions at the PCC. rBalanced current injection: The references are computed in such a way that they transfer the desired power but using only the positive sequence. rPower ripple attenuation: The current references achieve active power ripple attenuation, reactive power ripple attenuation, or both at the cost of injecting unbalanced currents. Note that a SyRF can be defined for each sequence, and thus, the current references can be computed in its corresponding SyRF as dc signals: i+∗ d,i+∗ q,i−∗ dand i−∗ q. The transformation to StRF can be performed as follows i∗ αβ =R(θg)i+∗ dq i+∗ αβ +R(−θg)i−∗ dq i−∗ αβ ,(17) R(θg)=cos(θg)−sin(θg) sin(θg) cos(θg)(18) where R(θ) is the rotation matrix. In the following, some approaches found in the literature to achieve the stated objectives are exhibited. 1) VOLTAGE SUPPORT With this objective, it is expected that the currents cause a voltage drop by the interaction with the line impedance achieving a compensation of the unbalanced grid voltages at the PCC. One technique, presented in [26], uses the knowledge of the line and filter impedance to achieve such compensation. Given a reference for the active (p∗) and reactive power (q∗), and the value of the sequences component of the grid voltage in StRF (v+ sα,v+ sβ,v− sα,v− sβ), the references can be computed in StRF as follows i∗ α i∗ βP=1 V+ k+rRV− kk+v+ sα+rRk−v− sα k+v+ sβ+rRk−v− sβp∗(19) i∗ α i∗ βQ=1 V+ k+rXV− k−k+v+ sβ−rXk−v− sβ k+v+ sα+rXk−v− sαq∗(20) V+ k=k+(v+ sα 2 +v+ sβ 2);V− k=k−(v− sα 2 +v− sβ 2) rR=Re(Zt)+R ||Zt+R+L|| ;rX=Im(Zt)+L ||Zt+R+L|| i∗ α i∗ β=i∗ α i∗ βP+i∗ α i∗ βQ;k++k−=1,(21) where rRand rXare respectively the normalized line and filter impedance between the VSC and the considered PCC; operator ||x|| = Re(x)2+Im(x)2provides the module of x; parameters k+and k−are tuning parameters; and variables V+ kand V− kare the quadratic amplitudes of the positive and negative sequence of the grid voltage scaled by parameters k+,k−, respectively. By means of k+, a trade-off between voltage support (values of k+close to zero) and balanced current injection (values of k+close to one) is given. In other words, parameters k+and k−balance which sequence of the grid voltage to use to transport the active and reactive power. Consequently, voltage support comes at the expenses of unbalanced phase currents and larger active and reactive power ripple. Another technique, given in [22], is based on the dynamics of an LC filter, which implements a control loop to regulate the positive voltage at the PCC towards its nominal value. However, it requires grid voltage sequence decomposition and notch filters to eliminate coupling terms, increasing its complexity and slowing its transient response. 2) POWER RIPPLE ATTENUATION These schemes aim to reduce the power ripple caused by the presence of negative sequence in the voltage grid. [23] proposes to compute the references in such a way that active and reactive power ripple are rejected simultaneously. However, the obtained references include negative sequence, and some VOLUME 2, 2021 535
MONTERO-ROBINA ET AL.: GRID-FOLLOWING VOLTAGE SOURCE CONVERTERS: BASIC SCHEMES AND CURRENT CONTROL TECHNIQUES TO OPERATE low-order harmonics which, apart from requiring the CC to be able to track such frequencies, might be unfeasible for the current harmonic injection limits established by the grid codes. Alternatively, active or reactive power ripple suppression may be aimed individually. In this line, [24], [28], [30] use a current reference generation approach in SyRF with a tuning parameter Kthat considers this trade-off as follows i∗ d i∗ qP =1 V+ dq −KV− dq v+ sd v+ sq−KR(−2θg)v− sd v− sqp∗(22) i∗ d i∗ qQ =1 V+ dq +KV− dq −v+ sq v+ sd+KR(−2θg)−v− sq v− sdq∗(23) V+ dq =v+ sd 2+v+ sq 2;V− dq =v− sd 2+v− sq 2 i∗ d i∗ q=i∗ d i∗ qP+i∗ d i∗ qQ ,(24) where v+ sd,v+ sq,v− sd,v− sqare the positive and negative sequence components of the grid voltage in SyRF; V+ dq and V− dq are their quadratic amplitudes, respectively; and R(−2θg)isthe rotation matrix that translates the components from the negative SyRF to the positive SyRF. Depending on the tuning parameter K, different objectives may be aimed rK=0 yields only positive balanced current references and no power ripple attenuation. rK=−1 results in no reactive power ripple. rK=1 results in no active power ripple. Notice that hybrid solutions can be adopted by selecting K∈[−1,1]. In this regard, [25] proposes a particle swarm optimization to obtain the value of Kaiming to reduce the reactive ripple as much as possible, while fulfilling a predefined maximum active power ripple. Work [7] presents a similar approach by means of the susceptance (b±) and conductance (g±) for each sequence i+∗ dqP=g+v+ sdq (25) i−∗ dqP=g−v− sdq (26) i+∗ dqQ=−Jb+v+ sdq (27) i−∗ dqQ=−Jb−v− sdq,(28) where Jis the 90◦rotation matrix. Parameters g+,g−,b+,b− are computed and related between them in [7] resulting in a similar trade-off than the previous technique. 3) BALANCED CURRENT INJECTION This objective is considered in the previous approaches for a particular value of the corresponding tuning parameter. Accordingly, either k+=1 in (19)–(21) or K=0 in (22)–(24) would aim for balanced currents. Similarly, making the negative susceptance and conductance equal to zero in (26)–(28) would have the same result. In other words, the references FIGURE 9. SyRF-SS scheme extracted from [48] where a resonant term is used for the negative sequence tracking. have only positive sequence and only the positive sequence of the grid voltage is considered to achieve the desired active and reactive power. In this line, a droop controller would keep the currents balanced while aiming for grid voltage and frequency support by modifying the references of active and reactive power [38]. IV. CCS UNDER UNBALANCED GRID VOLTAGE CONDITIONS In this section different CCs that have negative sequence tracking capabilities are exposed. The two most common approaches for balanced grid operation were presented previously, however, when the current references have positive and negative sequence components, both sequences have to be tracked, which may require some modifications. The following CCs are classified according to the controller that provides this capability: resonant or integral. A. PR-BASED ICC The transfer function of the nonideal PR controller was shown in (8), whose digital implementation based on the delta operator can be extracted from [23]. Some papers exhibit that the resonant term is equivalent to an integrator for the components at frequencies ωgand −ωg[46]. Thus, it is expected to achieve tracking capabilities at ±ωgwith the only requirement of proper ωgobtention. The nonideal PR widens the bandwidth around ±ωgand makes the gain noninfinite, which increases the robustness of the closed-loop scheme. This paper considers two control schemes that uses resonant terms for ICC under unbalanced grid voltage conditions. 1) The non-ideal PR in StRF (PR) [46] depicted in Fig. 4. 2) A resonant term added to the standard PI in SyRF, whose resonant frequency is twice the fundamental one. Given that only one SyRF is used, this scheme is referred as SyRF single stage (SyRF-SS) [48], and it is depicted in Fig. 9. The first approach achieves negative sequence tracking thanks to the resonant term in StRF. The second one achieves 536 VOLUME 2, 2021
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MONTERO-ROBINA ET AL.: GRID-FOLLOWING VOLTAGE SOURCE CONVERTERS: BASIC SCHEMES AND CURRENT CONTROL TECHNIQUES TO OPERATE grid connected inverter,” J. Modern Power Syst. Clean Energy,vol.4, no. 1, pp. 87–93, Jan. 2016. [85] H. Nian, Y. Shen, H. Yang, and Y. Quan, “Flexible grid connection technique of voltage-source inverter under unbalanced grid conditions based on direct power control,” IEEE Trans. Ind. App., vol. 51, no. 5, pp. 4041–4050, Sep. 2015. [86] N. Chen, T. Wei, K. Shang, and R. Wang, “Digital controller based on delta operator for high-frequency DC-DC switching converters,” IET Power Electron., vol. 11, no. 7, pp. 1224–1230, 2018. PABLO MONTERO-ROBINA received the M.Eng. and Ph.D degrees in industrial engineering from the University of Seville, Seville, Spain, in 2016 and 2021, respectively. He has also collaborated in teaching activities in the public and private sector. He has also held several international collaborations with other authors from different institutions. He was previously a Researcher with the Electronic Engineering Department, University of Seville and also with several innovation companies related to the field of power electronics. He has also setup and tested real grid-connected power converters. His research interests include control, design, and development of grid-connected power converters, multilevel power converters, in addition to applications for electric vehicles, aircrafts, and renewable energy. KOUMARS ROUZBEHI (Senior Member, IEEE) received the Ph.D. degree in electric energy systems from the Technical University of Catalonia (UPC), Barcelona, Spain, in 2016. Prior to this, he was with the Faculty of Electrical Engineering, as a Academic Staff, Islamic Azad University (IAU), Iran, from 2002 to 2011. In parallel with teaching and research with IAU, he was the CEO of Khorasan Electric and Electronics Industries Research Company from 2004 to 2010. From 2017 to 2019, he was an Associate Professor with Loyola Andalucía University, Seville, Spain. In 2019, he joined the Department of Systems and Automatic Control Engineering, University of Seville, Seville, Spain. He holds a patent in AC grid synchronization of voltage source power converters, and has authored or coauthored almost 100 technical books, book chapters, journal papers, and technical conference proceedings. Dr. Rouzbehi is an Associate Editor of the IEEE SYSTEMS JOURNAL,IET Generation, Transmission & Distribution,IET Renewable Power Generation, IET High Voltage,andIET Energy Systems Integration. He was the recipient of the Second Best Paper Award 2015 from the IEEE Power Electronics Society and from the IEEE JOURNAL OF EMERGING AND SELECTED TOPICS IN POWER ELECTRONICS. He has been a TPC Member of the International Conference on Electronics, Communication, Control, and Power Engineering (IEEE-ECCP) since 2014 and a Scientific Board Member of the (IEA) International Conference on Technology and Energy Management since 2015, and TPC Member of COMPEL 2020. FRANCISCO GORDILLO (Senior Member, IEEE) received the M.Eng. and Ph.D. degrees in industrial engineering from the University of Seville, Seville, Spain, in 1988 and 1994, respectively. Since 1989, he has been with the Department of Automatic Control, Escuela Superior de Ingenieros, Universidad de Sevilla, where he is currently a Full Professor. He is the coauthor of the Dinámica de Sistemas (Madrid: Alianza Editorial, 1997), the Co-Editor of the Stability Issues in Fuzzy Control (Berlin: Physica-Verlag, 2000), and the author or coauthor of more than 150 publications, including book chapters, journal articles, and conference proceedings. His research interests include nonlinear control with applications to mechanical, electromechanical, and power electronic systems. JOSEP POU (Fellow, IEEE) received the B.S., M.S., and Ph.D. degrees in electrical engineering from the Technical University of Catalonia (UPC)- Barcelona Tech, Spain, in 1989, 1996, and 2002, respectively. In 1990, he joined the Faculty of UPC, as an Assistant Professor, where he became an Associate Professor in 1993. From February 2013 to August 2016, he was a Professor with the University of New South Wales (UNSW), Sydney, NSW, Australia. He is currently a Professor with Nanyang Technological University (NTU), Singapore, where he is the Program Director of power electronics with Energy Research Institute, NTU (ERIN) and the Co-Director of Rolls-Royce, NTU Corporate Lab. From February 2001 to January 2002, and from February 2005 to January 2006, he was a Researcher with the Center for Power Electronics Systems, Virginia Tech, Blacksburg, VA, USA. From January 2012 to January 2013, he was a Visiting Professor with Australian Energy Research Institute, UNSW. He has authored more than 350 published technical papers and has been involved in several industrial projects and educational programs in the fields of power electronics and systems. His research interests include modulation and control of power converters, multilevel converters, renewable energy, energy storage, power quality, HVdc transmission systems, and more-electrical aircraft and vessels. He is currently an Associate Editor for the IEEE JOURNAL OF EMERGING AND SELECTED TOPICS IN POWER ELECTRONICS. He was the Co-Editor-inChief and an Associate Editor for the IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS. He was the recipient of the 2018 IEEE Bimal Bose Award for Industrial Electronics Applications in Energy Systems. 544 VOLUME 2, 2021